# Session 6: Solid State Physics. Diode

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1 Session 6: Solid State Physics Diode 1

2 Outline A B C D E F G H I J 2

3 Definitions / Assumptions Homojunction: the junction is between two regions of the same material Heterojunction: the junction is between two different semiconductors Approximations used in the step-junction model 1. The doping profile is a step function. On the n-type side, and is constant. On the p side, and is constant. 2. All impurities are ionized. Thus the equilibrium electron concentration on the n side is. The equilibrium hole concentration on the p side is. 3. Impurity-induced band-gap narrowing effects are neglected. 3

4 Planar (1-D) pn Junction n A A n p n p (a) (b) (c) p step approximation (d) (a) The physical picture of a planar pnjunction; (b) cross section through A A ; (c) schematic representation of the pnjunction; (d) typical doping profile showing a p-type substrate with implanted donors (the junction occurs where ); (e) the net doping concentration for this junction, and the step approximation (dashed line). ( = metallurgical junction) (e) 4

5 pn Junction Graded junction n p (d) (e) 5

6 PN junctions Before Being Joined p n Χ Φ Χ Φ electrically neutral in every region electron affinity : Χ work function Φ: Φ Φ Φ 6

7 PN junctions (Qualitative) p n 7

8 PN junctions (Qualitative) p n 8

9 PN junctions (Qualitative) p n Depletion region Remember 0 under equilibrium. Band bending occurs around the metallurgical junction! 9

10 PN junctions (Qualitative) p n depletion region 10

11 PN junctions (Qualitative) Reverse Biased p n depletion region 11

12 PN junctions (Qualitative) Forward Biased p n depletion region 12

13 PN junctions (Qualitative) p depletion region n 13

14 PN junctions - Assumptions The Depletion Approximation : Obtaining closed-form solutions for the electrostatic variables Charge Distribution : p n Note that (1) : p & n are negligible ( exist). (2) or : 0 14

15 How to Find,, 1. Find the built-in potential 2. Use the depletion approximation (depletion-layer widths, unknown) 3. Integrate to find boundary conditions 0, 0 4. Integrate to obtain boundary conditions 0, 5. For to be continuous at 0, solve for, 15

16 Built-In Potential For non-degenerately doped material: ln ln ln ln ln What shall we do for (or ) junction?!?!? : :

17 The Depletion Approximation The electric field is continuous at 0 Charge neutrality condition as well! 17

18 Electrostatic Potential in the Depletion Layer 0: :

19 Depletion Layer Width 0: 0 : Summing, we have:

20 Depletion Layer Width If as in a junction: Note: 2 ln 20

21 Example A junction has 10 and 10. What is a) its built in potential, 2 ln 1 b), c), and 0.12 d) ~ 0 21

22 Biases pn Junction (assumptions) p depletion region n Negligible voltage drop (Ohmic contact) dropped here 1) Low level injection 2) Zero voltage drop ( 0) will apply continuity equation in this region Since ( 0) may apply minority carrier diffusion equations Note: should be significantly smaller than (Otherwise, we cannot assume low-level injection) 22

23 Effect of Bias on Electrostatics p n Energy Band Diagram 1) The Fermi level is omitted from the depletion region because the device is no longer in equilibrium: We need the quasi Fermi energy level. 2)

24 Va Applied Voltage Now as we assumed all voltage drop is in the depletion region (Note that VA Vbi)

25 W vs. Va The junction width for one-sided step junctions in silicon as a function of junction voltage with the doping on the lightly doped side as a parameter. Depletion width (µm)

26 W vs. Na Junction width for a one-sided junction is plotted as a function of doping on the lightly doped side for three different operating voltages. Depletion width (µm)

27 pn Junction: I-V Characteristic (assumptions) Assumption : 1) low-level injection: ~ (or, ~ in p-type) ~ (or, ~ in n-type) 2) In the bulk, ~, ~ 3) For minority carriers in quasi-neutral region 4) Nondegenerately doped step junction 5) Long-base diode in 1-D (both sides of quasi-neutral regions are much longer than their minority carrier diffusion lengths, or ) 6) No Generation/Recombination in depletion region 7) Steady state 0 8) 0 27

28 pn Junction: I-V Characteristic Game plan: i) continuity equations for minority carriers 1 1 ii) minority carrier current densities in the quasi-neutral region ~ ~ 28

29 pn Junction: I-V Characteristic Steady-State solution is: p 0 diode is long enough! n 0 29

30 pn Junction: I-V Characteristic p 0 0 n 0 0 Now! we need to find and vs ln ln ln ln ln 30

31 pn Junction: I-V Characteristic p n log, forward log, reverse 31

32 pn Junction: I-V Characteristic 0 0 ; 1 ; ; 1 ;

33 pn Junction: I-V Characteristic 1 1 asymmetrically doped junction If diode ( ), then If diode ( ), then That is, one has to consider only the lightly doped side of such junction in working out the diode I-V characteristics. 33

34 pn Junction: I-V Characteristic V=0 V>0 34

35 pn Junction: I-V Characteristic The minority carrier concentrations on either side of the junction under forward bias 35

36 Minority-Carrier Charge Storage p n forward

37 Charge Control Model In general:, 0 Steady state: similarly 1 37

38 38

39 Deviations from Ideal I-V Thermal generation in the depletion region Avalanche or Zener process log high level injection slop= 2 Ideal slop= Bulk ohmic drop Diode in break down has application! Diffusion current slop= 2 Thermal recombination in the depletion region 39

40 Avalanche Breakdown occurs when the minority carriers that cross the depletion region under the influence of the electric field gain sufficient kinetic energy to be able to break covalent bands in atoms with which they collide. multiplication factor :

41 Zener Breakdown ~ exp 2 2 For 0 For non-degenerately doped material:, 41

42 Generation in Depletion Region Reminder1: Thermal equilibrium Reminder 2: log, reverse In depletion region: Generation > Recombination Effective carrier life time

43 Recombination in Depletion Region Reminder1: Thermal equilibrium Reminder 2: log, forward In depletion region: Recombination > Generation p n

44 High Level Injection Low level injection, All of the relations was based on the low level injection condition as: Minority << Majority In High level injection condition we should add recombination current to the continuity equations for the minority carriers, result will be as: High level injection, 44

45 Series Resistance We assumed that the electric field outside the depletion region is zero; which means as semiconductor is treated as a perfect(ideal) conductor. But actually the conductivity is limited to p n Hence the ohmicvoltage drop outside depletion region becomes considerable 45

46 Forward Bias 1 100mA 1mA Ge 1 Minority Carrier Diffusion 1 Series Resistance Limitations 10µA Si 2 100nA 1nA 0 GaAs 2 Recombination Current

47 Small Signal p n A small ac signal ( ) is superimposed on the DC bias. This results in ac current (). Then, admittance is given by 47

48 Reverse Bias Admittance : Junction (depletion layer) capacitance : Reverse bias conductance p n A pn junction under reverse bias behaves like a capacitor. Such capacitors are used in ICs as voltage-controlled capacitors / where step junction linear junction C-V curve is very useful for characterization of the devices 48

49 Reverse Bias Admittance - Characterization C-V data from a pnjunction is routinely used to determine the doping profile on the lightly doped side of the junction Slope= [ ] 1 [] Intercept= If the doping on the lightly doped side is uniform, a plot of 1/ versus should be a straight line with a slope inversely proportional to and an extrapolated 1 0 intercept equal to. 49

50 Reverse Bias Admittance : Junction (depletion layer) capacitance : Reverse bias conductance 1 Hence, in reverse bias, ideally ~ ~0 50

51 Forward Bias Admittance : ohmic(physical) resistance : Junction capacitance : diffusion conductance : diffusion capacitance Function of bias point and frequency,,,,, 0 51

52 Forward Bias Admittance Phasor representation, 1 where 1 0, one-sided diode

54 pn Junction Transient Response Turn-off transient 0.1 D 0, : slope ~ storage time recovery time,

55 pn Junction Transient Response charge control for p+n diode for 0 ln 1 0 But for 0 : ln 1, 55

56 pn Junction Transient Response Turn-on transient 1,,, : slope 1 1 ln 1 1 If we define : 0 0.9, 56

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