CAT93C46B. EEPROM Serial 1-Kb Microwire

Transcription

1 PROM Srial 1-K Mirowir sription Th CT93C46B is a 1 K Mirowir Srial PROM mmory dvi whih is onfigurd as ithr 64 rgistrs of 16 its (ORG pin at V CC ) or 128 rgistrs of 8 its (ORG pin at GN). ah rgistr an writtn (or rad) srially y using th (or ) pin. Th CT93C46B faturs a slf timd intrnal writ with auto lar. On hip Powr On Rst iruit protts th intrnal logi against powring up in th wrong stat. Faturs High Spd Opration: 4 MHz 1.8 V (1.65 V*) to 5.5 V Supply Voltag Rang Sltal x8 or x16 Mmory Organization Slf Timd Writ Cyl with uto Clar Squntial Rad Softwar Writ Prottion Powr up Inadvrtant Writ Prottion Low Powr CMOS Thnology 1,000,000 Program/ras Cyls 100 Yar ata Rtntion Industrial and xtndd Tmpratur Rangs 8 pin PP, SOIC, TSSOP and 8 pad UFN and TFN Pakags This vi is P Fr, Halogn Fr/BFR Fr and RoHS Compliant ORG V CC CT93C46B GN Figur 1. Funtional Symol *CT93C46Bxx xxl (T = 20 C to +85 C) For additional information on our P Fr stratgy and soldring dtails, plas download th ON Smiondutor Soldring and Mounting Thniqus Rfrn Manual, SOLRRM/. PP 8 L SUFFIX 646 SOIC 8 X SUFFIX 751B PIN CONFIGURTIONS 1 V CC NC 1 NC V CC ORG GN PP (L), SOIC (V, X), TSSOP (Y), UFN (HU4), TFN (VP2)** (Top Viw) Pin Nam V CC GN ORG TSSOP 8 Y SUFFIX 948L UFN 8 HU4 SUFFIX 517Z PIN FUNCTION Chip Slt Clok Input Srial ata Input Srial ata Output Powr Supply Ground SOIC (W)** (Top Viw) Funtion Mmory Organization SOIC 8 V, W** SUFFIX 751B TFN 8** VP2 SUFFIX 511K ** Not rommndd for nw dsigns. ORG GN NC No Conntion Not: Whn th ORG pin is onntd to V CC, th x16 organization is sltd. Whn it is onntd to ground, th x8 organization is sltd. If th ORG pin is lft unonntd, thn an intrnal pullup dvi will slt th x16 organization. ORRING INFORMTION S dtaild ordring and shipping information in th pakag dimnsions stion on pag 8 of this data sht. Smiondutor Componnts Industris, LLC, 2014 May 2018 Rv. 4 1 Puliation Ordr Numr: CT93C46B/

2 Tal 1. BSOLUT MXIMUM RTINGS Paramtr Valu Units Storag Tmpratur 65 to +150 C Voltag on ny Pin with Rspt to Ground (Not 1) 0.5 to +6.5 V Strsss xding thos listd in th Maximum Ratings tal may damag th dvi. If any of ths limits ar xdd, dvi funtionality should not assumd, damag may our and rliaility may afftd. 1. Th C input voltag on any pin should not lowr than 0.5 V or highr than V CC V. uring transitions, th voltag on any pin may undrshoot to no lss than 1.5 V or ovrshoot to no mor than V CC V, for priods of lss than 20 ns. Tal 2. RLIBILITY CHRCTRISTI (Not 2) Symol Paramtr Min Units N N (Not 3) nduran 1,000,000 Program / ras Cyls T R ata Rtntion 100 Yars 2. Ths paramtrs ar tstd initially and aftr a dsign or pross hang that affts th paramtr aording to appropriat C Q100 and JC tst mthods. 3. Blok Mod, V CC = 5 V, 25 C Tal 3..C. OPRTING CHRCTRISTI (V CC = +1.8 V to +5.5 V, T = 40 C to +125 C, V CC = V to +5.5 V, T = 20 C to +85 C unlss othrwis spifid.) Symol Paramtr Tst Conditions Min Max Units I CC1 Supply Currnt (Writ) Writ, V CC = 5.0 V 1 m I CC2 Supply Currnt (Rad) Rad, opn, f = 2 MHz, V CC = 5.0 V 500 I SB1 I SB2 Standy Currnt (x8 Mod) Standy Currnt (x16 Mod) V IN = GN or V CC = GN, ORG = GN V IN = GN or V CC = GN, ORG = Float or V CC T = 40 C to +85 C 2 T = 40 C to +125 C 5 T = 40 C to +85 C 1 T = 40 C to +125 C 3 I LI Input Lakag Currnt V IN = GN to V CC T = 40 C to +85 C 1 I LO Output Lakag Currnt V OUT = GN to V CC = GN T = 40 C to +125 C 2 T = 40 C to +85 C 1 T = 40 C to +125 C 2 V IL1 Input Low Voltag 4.5 V V CC < 5.5 V V V IH1 Input High Voltag 4.5 V V CC < 5.5 V 2 V CC + 1 V V IL2 Input Low Voltag 1.65 V V CC < 4.5 V 0 V CC x 0.2 V V IH2 Input High Voltag 1.65 V V CC < 4.5 V V CC x 0.7 V CC + 1 V V OL1 Output Low Voltag 4.5 V V CC < 5.5 V, I OL = 3 m 0.4 V V OH1 Output High Voltag 4.5 V V CC < 5.5 V, I OH = V V OL2 Output Low Voltag 1.65 V V CC < 4.5 V, I OL = 1 m 0.2 V V OH2 Output High Voltag 1.65 V V CC < 4.5 V, I OH = 100 V CC 0.2 V Produt paramtri prforman is indiatd in th ltrial Charatristis for th listd tst onditions, unlss othrwis notd. Produt prforman may not indiatd y th ltrial Charatristis if opratd undr diffrnt onditions. Tal 4. PIN CPCITNC (T = 25 C, f = 1 MHz, V CC = 5 V) Symol Tst Conditions Min Typ Max Units C OUT (Not 4) Output Capaitan () V OUT = 0 V 5 pf C IN (Not 4) Input Capaitan (,,, ORG) V IN = 0 V 5 pf 4. Ths paramtrs ar tstd initially and aftr a dsign or pross hang that affts th paramtr aording to appropriat C Q100 and JC tst mthods. 2

3 Tal 5..C. CHRCTRISTI (V CC = +1.8 V to +5.5 V, T = 40 C to +125 C, V CC = V to +5.5 V, T = 20 C to +85 C unlss othrwis spifid.) Symol Paramtr V CC < 3.3 V V CC > 3.3 V T = 40 C to +85 C Min Max Min Max t S Stup Tim ns t H Hold Tim 0 0 ns t S Stup Tim ns t H Hold Tim ns t P1 Output lay to s t P0 Output lay to s t HZ (Not 5) Output lay to High Z ns t W Program / ras Cyl Tim WRIT, RS 3 3 ms WRL, RL 5 5 t MIN Minimum Low Tim s t HI Minimum High Tim s t LOW Minimum Low Tim s t SV Output lay to Status Valid s MX Maximum Clok Frquny C 2000 C 4000 khz 5. This paramtr is tstd initially and aftr a dsign or pross hang that affts th paramtr. Units Tal 6. POWR UP TIMING (Nots 6 and 7) Symol Paramtr Max Units t PUR Powr up to Rad Opration 0.1 ms t PUW Powr up to Writ Opration 0.1 ms 6. Ths paramtrs ar tstd initially and aftr a dsign or pross hang that affts th paramtr aording to appropriat C Q100 and JC tst mthods. 7. t PUR and t PUW ar th dlays rquird from th tim V CC is stal until th spifid opration an initiatd. Tal 7..C. TST CONTIONS Input Ris and Fall Tims 50 ns Input Puls Voltags 0.4 V to 2.4 V 4.5 V V CC 5.5 V Timing Rfrn Voltags 0.8 V, 2.0 V 4.5 V V CC 5.5 V Input Puls Voltags 0.2 V CC to 0.7 V CC 1.65 V V CC 4.5 V Timing Rfrn Voltags 0.5 V CC 1.65 V V CC 4.5 V Output Load Currnt Sour I OLmax /I OHmax ; C L = 100 pf 3

4 vi Opration Th CT93C46B is a 1024 it nonvolatil mmory intndd for us with industry standard miroprossors. Th CT93C46B an organizd as ithr rgistrs of 16 its or 8 its. Whn organizd as X16, svn 9 it instrutions ontrol th rading, writing and ras oprations of th dvi. Whn organizd as X8, svn 10 it instrutions ontrol th rading, writing and ras oprations of th dvi. Th CT93C46B oprats on a singl powr supply and will gnrat on hip th high voltag rquird during any writ opration. Instrutions, addrsss, and writ data ar lokd into th pin on th rising dg of th lok (). Th pin is normally in a high impdan stat xpt whn rading data from th dvi, or whn hking th rady/usy status during a writ opration. Th srial ommuniation protool follows th timing shown in Figur 2. Th rady/usy status an dtrmind aftr th start of intrnal writ yl y slting th dvi ( high) and polling th pin; low indiats that th writ opration is not ompltd, whil high indiats that th dvi is rady for th nxt instrution. If nssary, th pin may plad ak into a high impdan stat during hip slt y shifting a dummy 1 into th pin. Th pin will ntr th high impdan stat on th rising dg of th lok (). Plaing th pin into th high impdan stat is rommndd in appliations whr th pin and th pin ar to tid togthr to form a ommon /O pin. Th Rady/Busy flag an disald only in Rady stat; no hang is allowd in Busy stat. Th format for all instrutions snt to th dvi is a logial 1 start it, a 2 it (or 4 it) opod, 6 it addrss (an additional it whn organizd X8) and for writ oprations a 16 it data fild (8 it for X8 organization). Rad Upon riving a R ommand (Figur 3) and an addrss (lokd into th pin), th pin of th CT93C46B will om out of th high impdan stat and, aftr snding an initial dummy zro it, will gin shifting out th data addrssd (MSB first). Th output data its will toggl on th rising dg of th lok and ar stal aftr th spifid tim dlay (t P0 or t P1 ). ftr th initial data word has n shiftd out and rmains assrtd with th lok ontinuing to toggl, th dvi will automatially inrmnt to th nxt addrss and shift out th nxt data word in a squntial R mod. s long as is ontinuously assrtd and ontinus to toggl, th dvi will kp inrmnting to th nxt addrss automatially until it rahs to th nd of th addrss spa, thn loops ak to addrss 0. In th squntial R mod, only th initial data word is prodd y a dummy zro it. ll sunsqunt data words will follow without a dummy zro it. ras/writ nal and isal Th CT93C46B powrs up in th writ disal stat. ny writing aftr powr up or aftr an WS (writ disal) instrution must first prdd y th WN (writ nal) instrution. On th writ instrution is nald, it will rmain nald until powr to th dvi is rmovd, or th WS instrution is snt. Th WS instrution an usd to disal all CT93C46B writ and ras instrutions, and will prvnt any aidntal writing or laring of th dvi. ata an rad normally from th dvi rgardlss of th writ nal/disal status. Th WN and WS instrutions timing is shown in Figur 4. Tal 8. INSTRUCTION ST ddrss ata Instrution Start Bit Opod x8 x16 x8 x16 Commnts R Rad ddrss N 0 RS Clar ddrss N 0 WRIT Writ ddrss N 0 WN XXXXX 11XXXX Writ nal WS XXXXX 00XXXX Writ isal RL* XXXXX 10XXXX Clar ll ddrsss WRL* XXXXX 01XXXX Writ ll ddrsss * Not availal at V CC < 1.8 V 4

5 t HI t LOW t H t S t H VLI VLI t S t S t P0, t P1 t MIN T VLI Figur 2. Synhronous ata Timing N N 1 0 on t Car t P0 ummy or Figur 3. Rad Instrution Timing ddrss or ddrss or ddrss + n or 7... STNBY * * NBL = 11 SBL = 00 Figur 4. WN/WS Instrution Timing 5

6 Writ ftr riving a WRIT ommand (Figur 5), addrss and th data, th (Chip Slt) pin must dsltd for a minimum of t MIN. Th falling dg of will start th slf loking for auto lar and data stor yls on th mmory loation spifid in th instrution. Th loking of th pin is not nssary aftr th dvi has ntrd th slf loking mod. Th rady/usy status of th CT93C46B an dtrmind y slting th dvi and polling th pin. Sin this dvi faturs uto Clar for writ, it is NOT nssary to ras a mmory loation for it is writtn into. ras Upon riving an RS ommand and addrss, th (Chip Slt) pin must d assrtd for a minimum of t MIN (Figur 6). Th falling dg of will start th slf loking lar yl of th sltd mmory loation. Th loking of th pin is not nssary aftr th dvi has ntrd th slf loking mod. Th rady/usy status of th CT93C46B an dtrmind y slting th dvi and polling th pin. On lard, th ontnt of a lard loation rturns to a logial 1 stat. ras ll Upon riving an RL ommand (Figur 7), th (Chip Slt) pin must dsltd for a minimum of t MIN. Th falling dg of will start th slf loking lar yl of all mmory loations in th dvi. Th loking of th pin is not nssary aftr th dvi has ntrd th slf loking mod. Th rady/usy status of th CT93C46B an dtrmind y slting th dvi and polling th pin. On lard, th ontnts of all mmory its rturn to a logial 1 stat. Writ ll Upon riving a WRL ommand and data, th (Chip Slt) pin must dsltd for a minimum of t MIN (Figur 8). Th falling dg of will start th slf loking data writ to all mmory loations in th dvi. Th loking of th pin is not nssary aftr th dvi has ntrd th slf loking mod. Th rady/usy status of th CT93C46B an dtrmind y slting th dvi and polling th pin. It is not nssary for all mmory loations to lard for th WRL ommand is xutd. t MIN STTUS VRIFY STNBY N N 1 0 N t SV BUSY t W RY t HZ Figur 5. Writ Instrution Timing 6

7 N N 1 0 t MIN STTUS VRIFY STNBY t SV BUSY RY t HZ t W Figur 6. ras Instrution Timing STTUS VRIFY STNBY t MIN t SV BUSY RY t HZ t W Figur 7. RL Instrution Timing STTUS VRIFY STNBY t MIN N 0 t SV t HZ BUSY RY t W Figur 8. WRL Instrution Timing 7

8 xampl of Ordring Information vi Ordr Numr Spifi vi Marking Pakag Typ Tmpratur Rang CT93C46BLI G 93C46P PP 8 I = Industrial ( 40 C to +85 C) CT93C46BL G 93C46P PP 8 = xtndd ( 40 C to +125 C) CT93C46BV GT3 93C46P SOIC 8, JC = xtndd ( 40 C to +125 C) CT93C46BVI GT3 93C46P SOIC 8, JC I = Industrial ( 40 C to +85 C) CT93C46BVI GT3L 93C46P SOIC 8, JC I = Industrial ( 20 C to +85 C) Lad Finish Shipping Tu, 50 Units / Tu Tu, 50 Units / Tu 3,000 Units / Rl 3,000 Units / Rl 3,000 Units / Rl CT93C46BVP2I GT3 (Not 8) M0T TFN 8 I = Industrial ( 40 C to +85 C) 3,000 Units / Rl CT93C46BWI GT3 (Not 8) 93C46P SOIC 8, JC I = Industrial ( 40 C to +85 C) 3,000 Units / Rl CT93C46BXI T2 93C46P SOIC 8, IJ I = Industrial ( 40 C to +85 C) CT93C46BX T2 93C46P SOIC 8, IJ = xtndd ( 40 C to +125 C) CT93C46BYI GT3 M46P TSSOP 8 I = Industrial ( 40 C to +85 C) CT93C46BYI GT3L M46P TSSOP 8 I = Industrial ( 20 C to +85 C) CT93C46BY GT3 M46P TSSOP 8 = xtndd ( 40 C to +125 C) CT93C46BHU4I GT3 M0U UFN 8 I = Industrial ( 40 C to +85 C) Matt Tin Matt Tin 2,000 Units / Rl 2,000 Units / Rl 3,000 Units / Rl 3,000 Units / Rl 3,000 Units / Rl 3,000 Units / Rl CT93C46BHU4 GT3 M0U UFN 8 = xtndd ( 40 C to +125 C) 3,000 Units / Rl 8. Not rommndd for nw dsigns. 9. ll pakags ar RoHS ompliant (Lad fr, Halogn fr). 10. Th standard lad finish is. 11. For additional pakag and tmpratur options, plas ontat your narst ON Smiondutor Sals offi. 12. For information on tap and rl spifiations, inluding part orintation and tap sizs, plas rfr to our Tap and Rl Pakaging Spifiations Brohur, BR8011/. 13. For dtaild information and a rakdown of dvi nomnlatur and numring systms, plas s th ON Smiondutor vi Nomnlatur doumnt, TN310/, availal at 8

9 PCKG MNSIONS PP 8, 300 mils ISSU SYMBOL MIN NOM MX PIN # 1 INTIFICTION B BSC L TOP VIW 2 1 L 2 B SI VIW N VIW Nots: (1) ll dimnsions ar in millimtrs. (2) Complis with JC MS

10 PCKG MNSIONS SOIC 8, 150 mils 751B 01 ISSU O SYMBOL MIN NOM MX BSC h PIN # 1 INTIFICTION L θ 0º 8º TOP VIW h 1 θ L SI VIW N VIW Nots: (1) ll dimnsions ar in millimtrs. ngls in dgrs. (2) Complis with JC MS

11 PCKG MNSIONS SOIC 8, 208 mils 751B 01 ISSU O SYMBOL MIN NOM MX BSC L θ 0º 8º PIN#1 INTIFICTION TOP VIW 1 L SI VIW N VIW Nots: (1) ll dimnsions ar in millimtrs. ngls in dgrs. (2) Complis with IJ R

12 PCKG MNSIONS TSSOP8, 4.4x3 948L 01 ISSU O SYMBOL MIN NOM MX BSC L 1.00 RF L1 θ º 8º TOP VIW 2 1 SI VIW 1 L1 N VIW L Nots: (1) ll dimnsions ar in millimtrs. ngls in dgrs. (2) Complis with JC MO

13 PCKG MNSIONS UFN8, 2x3 XTN P 517Z 01 ISSU O L P SIZ 1.8 x PIN #1 INTIFICTION PIN #1 INX R 1 2 TOP VIW SI VIW BOTTOM VIW SYMBOL MIN NOM MX RF RF TIL FRONT VIW RF L Nots: (1) ll dimnsions ar in millimtrs. (2) Rfr JC MO-236/MO TIL RF Coppr xposd 13

14 PCKG MNSIONS TFN8, 2x3 511K 01 ISSU 2 PIN#1 INTIFICTION PIN#1 INX R 1 2 L TOP VIW SI VIW BOTTOM VIW SYMBOL MIN NOM MX RF FRONT VIW TYP L Nots: (1) ll dimnsions ar in millimtrs. (2) Complis with JC MO

15 ON Smiondutor and ar tradmarks of Smiondutor Componnts Industris, LLC da ON Smiondutor or its susidiaris in th Unitd Stats and/or othr ountris. ON Smiondutor owns th rights to a numr of patnts, tradmarks, opyrights, trad srts, and othr intlltual proprty. listing of ON Smiondutor s produt/patnt ovrag may assd at /sit/pdf/patnt Marking.pdf. ON Smiondutor rsrvs th right to mak hangs without furthr noti to any produts hrin. ON Smiondutor maks no warranty, rprsntation or guarant rgarding th suitaility of its produts for any partiular purpos, nor dos ON Smiondutor assum any liaility arising out of th appliation or us of any produt or iruit, and spifially dislaims any and all liaility, inluding without limitation spial, onsquntial or inidntal damags. Buyr is rsponsil for its produts and appliations using ON Smiondutor produts, inluding omplian with all laws, rgulations and safty rquirmnts or standards, rgardlss of any support or appliations information providd y ON Smiondutor. Typial paramtrs whih may providd in ON Smiondutor data shts and/or spifiations an and do vary in diffrnt appliations and atual prforman may vary ovr tim. ll oprating paramtrs, inluding Typials must validatd for ah ustomr appliation y ustomr s thnial xprts. ON Smiondutor dos not onvy any lins undr its patnt rights nor th rights of othrs. ON Smiondutor produts ar not dsignd, intndd, or authorizd for us as a ritial omponnt in lif support systms or any F Class 3 mdial dvis or mdial dvis with a sam or similar lassifiation in a forign jurisdition or any dvis intndd for implantation in th human ody. Should Buyr purhas or us ON Smiondutor produts for any suh unintndd or unauthorizd appliation, Buyr shall indmnify and hold ON Smiondutor and its offirs, mploys, susidiaris, affiliats, and distriutors harmlss against all laims, osts, damags, and xpnss, and rasonal attorny fs arising out of, dirtly or indirtly, any laim of prsonal injury or dath assoiatd with suh unintndd or unauthorizd us, vn if suh laim allgs that ON Smiondutor was nglignt rgarding th dsign or manufatur of th part. ON Smiondutor is an qual Opportunity/ffirmativ tion mployr. This litratur is sujt to all applial opyright laws and is not for rsal in any mannr. PUBLICTION ORRING INFORMTION LITRTUR FULFILLMNT: Litratur istriution Cntr for ON Smiondutor nd Pkwy, urora, Colorado US Phon: or Toll Fr US/Canada Fax: or Toll Fr US/Canada mail: ordrlit@onsmi.om N. mrian Thnial Support: Toll Fr US/Canada urop, Middl ast and fria Thnial Support: Phon: ON Smiondutor Wsit: Ordr Litratur: For additional information, plas ontat your loal Sals Rprsntativ CT93C46B/