CAT93C86B. 16-Kb Microwire Serial EEPROM

Transcription

1 16-K Mirowir Srial PROM sription Th CT93C86B is a 16 K Srial PROM mmory dvi whih is onfigurd as ithr rgistrs of 16 its (ORG pin at V CC ) or 8 its (ORG pin at GN). ah rgistr an writtn (or rad) srially y using th I (or O) pin. Th CT93C86B faturs a slf timd intrnal writ with auto lar. On hip Powr On Rst iruit protts th intrnal logi against powring up in th wrong stat. Faturs High Spd Opration: 4 MHz (5 V), 2 MHz (1.8 V) 1.8 V (1.65 V*) to 5.5 V Supply Voltag Rang Sltal x8 or x16 Mmory Organization Slf timd Writ Cyl with uto lar Squntial Rad Hardwar and Softwar Writ Prottion Powr up Inadvrtnt Writ Prottion ow Powr CMOS Thnology Program nal (P) Pin 1,000,000 Program/ras Cyls 100 Yar ata Rtntion Industrial and xtndd Tmpratur Rangs 8 pin PIP, SOIC, MSOP, TSSOP, 8 pad UFN, and WCSP 6 all Pakags This vi is P Fr, Halogn Fr/BFR Fr, and RoHS Compliant V CC MSOP 8 Z SUFFIX CS 846 PIP 8 SUFFIX CS 646 CS 1 I O SOIC 8 X SUFFIX CS 751B TSSOP 8 Y SUFFIX CS 948 PIN CONFIGURTION V CC P ORG GN PIP (), SOIC (V, X), TSSOP (Y), UFN (HU4), MSOP (Z) PIN FUNCTION UFN 8 HU4 SUFFIX CS 517Z SOIC 8 V SUFFIX CS 751B Pin B C WCSP 6 C6 SUFFIX PRIMINRY VCC GN CS I O WCSP*, ** (C6) *ORG intrnally onntd to GN **P float Pin Nam Funtion ORG I CS Chip Slt CS CT93C86B O I Clok Input Srial ata Input P O Srial ata Output V CC Powr Supply GN GN Ground Figur 1. Funtional Symol ORG Mmory Organization P Program nal *CT93C86Bxx xx (T = 20 C to +85 C) For additional information on our P Fr stratgy and soldring dtails, plas download th ON Smiondutor Soldring and Mounting Thniqus Rfrn Manual, SORRM/. Not: Whn th ORG pin is onntd to V CC, th x16 organization is sltd. Whn it is onntd to ground, th x8 pin is sltd. If th ORG pin is lft unonntd, thn an intrnal pull up dvi will slt th x16 organization. ORRING INFORMTION S dtaild ordring and shipping information in th pakag dimnsions stion on pag 14 of this data sht. Smiondutor Componnts Industris, C, 2013 Sptmr, 2013 Rv. 3 1 Puliation Ordr Numr: CT93C86B/

2 Tal 1. BSOUT MXIMUM RTINGS Paramtrs Ratings Units Storag Tmpratur 65 to +150 C Voltag on ny Pin with Rspt to Ground (Not 1) 0.5 to +6.5 V Strsss xding Maximum Ratings may damag th dvi. Maximum Ratings ar strss ratings only. Funtional opration aov th Rommndd Oprating Conditions is not implid. xtndd xposur to strsss aov th Rommndd Oprating Conditions may afft dvi rliaility. 1. Th C input voltag on any pin should not lowr than 0.5 V or highr than V CC V. uring transitions, th voltag on any pin may undrshoot to no lss than 1.5 V or ovrshoot to no mor than V CC V, for priods of lss than 20 ns. Tal 2. RIBIITY CHRCTRISTICS (Not 2) Symol Paramtr Min Units N N (Not 3) nduran 1,000,000 Program / ras Cyls T R ata Rtntion 100 Yars 2. Ths paramtrs ar tstd initially and aftr a dsign or pross hang that affts th paramtr aording to appropriat C Q100 and JC tst mthods. 3. Blok Mod, V CC = 5 V, 25 C. Tal 3..C. OPRTING CHRCTRISTICS (V CC = +1.8 V to +5.5 V, T = 40 C to +125 C, V CC = V to +5.5 V, T = 20 C to +85 C unlss othrwis spifid.) Symol Paramtr Tst Conditions Min Max Units I CC1 Supply Currnt (Writ) Writ, V CC = 5.0 V 2 m I CC2 Supply Currnt (Rad) Rad, O opn, f = 2 MHz, V CC = 5.0 V 500 I SB1 I SB2 Standy Currnt (x8 Mod) Standy Currnt (x16 Mod) V IN = GN or V CC CS = GN, ORG = GN V IN = GN or V CC CS = GN, ORG = Float or V CC T = 40 C to +85 C 2 T = 40 C to +125 C 5 T = 40 C to +85 C 1 T = 40 C to +125 C 3 I I Input akag Currnt V IN = GN to V CC T = 40 C to +85 C 1 I O Output akag Currnt V OUT = GN to V CC CS = GN T = 40 C to +125 C 2 T = 40 C to +85 C 1 T = 40 C to +125 C 2 V I1 Input ow Voltag 4.5 V V CC < 5.5 V V V IH1 Input High Voltag 4.5 V V CC < 5.5 V 2 V CC + 1 V V I2 Input ow Voltag 1.65 V V CC < 4.5 V 0 V CC x 0.2 V V IH2 Input High Voltag 1.65 V V CC < 4.5 V V CC x 0.7 V CC + 1 V V O1 Output ow Voltag 4.5 V V CC < 5.5 V, I O = 3 m 0.4 V V OH1 Output High Voltag 4.5 V V CC < 5.5 V, I OH = V V O2 Output ow Voltag 1.65 V V CC < 4.5 V, I O = 1 m 0.2 V V OH2 Output High Voltag 1.65 V V CC < 4.5 V, I OH = 100 V CC 0.2 V Tal 4. PIN CPCITNC (Not 4) Symol Tst Conditions Min Typ Max Units C OUT Output Capaitan (O) V OUT = 0 V 5 pf C IN Input Capaitan (CS,, I, ORG) V IN = 0 V 5 pf Tal 5. POWR UP TIMING (Nots 4, 5) Symol Paramtr Max Units t PUR Powr up to Rad Opration 1 ms t PUW Powr up to Writ Opration 1 ms 2

3 Tal 6..C. TST CONITIONS Input Ris and Fall Tims 50 ns Input Puls Voltags 0.4 V to 2.4 V 4.5 V V CC 5.5 V Timing Rfrn Voltags 0.8 V, 2.0 V 4.5 V V CC 5.5 V Input Puls Voltags 0.2 V CC to 0.7 V CC 1.65 V V CC 4.5 V Timing Rfrn Voltags 0.5 V CC 1.65 V V CC 4.5 V Output oad Currnt Sour I Omax /I OHmax ; C = 100 pf 4. Ths paramtrs ar tstd initially and aftr a dsign or pross hang that affts th paramtr. 5. t PUR and t PUW ar th dlays rquird from th tim V CC is stal until th spifid opration an initiatd. Tal 7..C. CHRCTRISTICS (V CC = +1.8 V to +5.5 V, T = 40 C to +125 C, V CC = V to +5.5 V, T = 20 C to +85 C unlss othrwis spifid.) Symol Paramtr V CC < 4.5 V V CC > 4.5 V Min Max Min Max t CSS CS Stup Tim ns t CSH CS Hold Tim 0 0 ns t IS I Stup Tim ns t IH I Hold Tim ns t P1 Output lay to s t P0 Output lay to s t HZ (Not 6) Output lay to High Z ns t W Program/ras Puls Width 5 5 ms t CSMIN Minimum CS ow Tim s t HI Minimum High Tim s t OW Minimum ow Tim s t SV Output lay to Status Valid s MX Maximum Clok Frquny C 2000 C 4000 khz 6. This paramtr is tstd initially and aftr a dsign or pross hang that affts th paramtr. Tal 8. INSTRUCTION ST Instrution Start Bit Opod ddrss ata x8 x16 x8 x16 Commnts R Rad ddrss N 0 RS Clar ddrss N 0 WRIT Writ ddrss N 0 WN XXXXXXXXX 11XXXXXXXX Writ nal WS XXXXXXXXX 00XXXXXXXX Writ isal R* XXXXXXXXX 10XXXXXXXX Clar ll ddrsss WR* XXXXXXXXX 01XXXXXXXX Writ ll ddrsss *Not availal at V CC < 1.8 V Units 3

4 vi Opration Th CT93C86B is a 16,384 it nonvolatil mmory intndd for us with industry standard miroprossors. Th CT93C86B an organizd as ithr rgistrs of 16 its or 8 its. Whn organizd as X16, svn 13 it instrutions ontrol th rading, writing and ras oprations of th dvi. Whn organizd as X8, svn 14 it instrutions ontrol th rading, writing and ras oprations of th dvi. Th CT93C86B oprats on a singl powr supply and will gnrat on hip, th high voltag rquird during any writ opration. Instrutions, addrsss, and writ data ar lokd into th I pin on th rising dg of th lok (). Th O pin is normally in a high impdan stat xpt whn rading data from th dvi, or whn hking th rady/usy status aftr a writ opration. Th rady/usy status an dtrmind aftr th start of a writ opration y slting th dvi (CS high) and polling th O pin; O low indiats that th writ opration is not ompltd, whil O high indiats that th dvi is rady for th nxt instrution. If nssary, th O pin may plad ak into a high impdan stat during hip slt y shifting a dummy 1 into th I pin. Th O pin will ntr th high impdan stat on th falling dg of th lok (). Plaing th O pin into th high impdan stat is rommndd in appliations whr th I pin and th O pin ar to tid togthr to form a ommon I/O pin. Th format for all instrutions snt to th dvi is a logial 1 start it, a 2 it (or 4 it) opod, 10 it addrss (an additional it whn organizd X8) and for writ oprations a 16 it data fild (8 it for X8 organizations). Not: Th Writ, ras, Writ all and ras all instrutions rquir P = 1. If P is lft floating, 93C86B is in Program nald mod. For Writ nal and Writ isal instrution P = don t ar. Rad Upon riving a R ommand and an addrss (lokd into th I pin), th O pin of th CT93C86B will om out of th high impdan stat and, aftr snding an initial dummy zro it, will gin shifting out th data addrssd (MSB first). Th output data its will toggl on th rising dg of th lok and ar stal aftr th spifid tim dlay (t P0 or t P1 ). ftr th initial data word has n shiftd out and CS rmains assrtd with th lok ontinuing to toggl, th dvi will automatially inrmnt to th nxt addrss and shift out th nxt data word in a squntial R mod. s long as CS is ontinuously assrtd and ontinus to toggl, th dvi will kp inrmnting to th nxt addrss automatially until it rahs to th nd of th addrss spa, thn loops ak to addrss 0. In th squntial R mod, only th initial data word is prdd y a dummy zro it. ll susqunt data words will follow without a dummy zro it. Writ ftr riving a WRIT ommand, addrss and th data, th CS (Chip Slt) pin must dsltd for a minimum of t CSMIN. Th falling dg of CS will start th slf loking lar and data stor yl of th mmory loation spifid in th instrution. Th loking of th pin is not nssary aftr th dvi has ntrd th slf loking mod. Th rady/usy status of th CT93C86B an dtrmind y slting th dvi and polling th O pin. Sin this dvi faturs uto Clar for writ, it is NOT nssary to ras a mmory loation for it is writtn into. 4

5 t HI t OW t CSH t IS t IH I VI VI t CSS CS t IS t P0, t P1 t CSMIN O T VI Figur 2. Synhronous ata Timing CS N N 1 0 on t Car I O HIGH Z ummy or Figur 3. Rad Instrution Timing ddrss or ddrss or ddrss + n or 7... t CSMIN CS I N N 1 0 N 0 STTUS VRIFY STNBY O HIGH Z t SV BUSY RY t HZ HIGH Z t W Figur 4. Writ Instrution Timing 5

6 ras Upon riving an RS ommand and addrss, th CS (Chip Slt) pin must dassrtd for a minimum of t CSMIN. Th falling dg of CS will start th slf loking lar yl of th sltd mmory loation. Th loking of th pin is not nssary aftr th dvi has ntrd th slf loking mod. Th rady/usy status of th CT93C86B an dtrmind y slting th dvi and polling th O pin. On lard, th ontnt of a lard loation rturns to a logial 1 stat. ras/writ nal and isal Th CT93C86B powrs up in th writ disal stat. ny writing aftr powr up or aftr an WS (writ disal) instrution must first prdd y th WN (writ nal) instrution. On th writ instrution is nald, it will rmain nald until powr to th dvi is rmovd, or th WS instrution is snt. Th WS instrution an usd to disal all CT93C86B writ and lar instrutions, and will prvnt any aidntal writing or laring of th dvi. ata an rad normally from th dvi rgardlss of th writ nal/disal status. ras ll Upon riving an R ommand, th CS (Chip Slt) pin must dsltd for a minimum of t CSMIN. Th falling dg of CS will start th slf loking lar yl of all mmory loations in th dvi. Th loking of th pin is not nssary aftr th dvi has ntrd th slf loking mod. Th rady/usy status of th CT93C86B an dtrmind y slting th dvi and polling th O pin. On lard, th ontnts of all mmory its rturn to a logial 1 stat. Writ ll Upon riving a WR ommand and data, th CS (Chip Slt) pin must dsltd for a minimum of t CSMIN. Th falling dg of CS will start th slf loking data writ to all mmory loations in th dvi. Th loking of th pin is not nssary aftr th dvi has ntrd th slf loking mod. Th rady/usy status of th CT93C86B an dtrmind y slting th dvi and polling th O pin. It is not nssary for all mmory loations to lard for th WR ommand is xutd. CS N N 1 0 t CS STTUS VRIFY STNBY I O t SV HIGH Z BUSY RY t W Figur 5. ras Instrution Timing t HZ HIGH Z 6

7 PCKG IMNSIONS PIP 8, 300 mils CS ISSU SYMBO MIN NOM MX PIN # 1 INTIFICTION B BSC TOP VIW B SI VIW N VIW Nots: (1) ll dimnsions ar in millimtrs. (2) Complis with JC MS

8 PCKG IMNSIONS SOIC 8, 150 mils CS 751B 01 ISSU O SYMBO MIN NOM MX BSC h PIN # 1 INTIFICTION θ 0º 8º TOP VIW h 1 θ SI VIW N VIW Nots: (1) ll dimnsions ar in millimtrs. ngls in dgrs. (2) Complis with JC MS

9 PCKG IMNSIONS SOIC 8, 208 mils CS 751B 01 ISSU O SYMBO MIN NOM MX BSC θ 0º 8º PIN#1 INTIFICTION TOP VIW 1 SI VIW N VIW Nots: (1) ll dimnsions ar in millimtrs. ngls in dgrs. (2) Complis with IJ R

10 PCKG IMNSIONS TSSOP8, 4.4x3 CS ISSU O SYMBO MIN NOM MX BSC 1.00 RF 1 θ º 8º TOP VIW 2 1 SI VIW 1 1 N VIW Nots: (1) ll dimnsions ar in millimtrs. ngls in dgrs. (2) Complis with JC MO

11 PCKG IMNSIONS UFN8, 2x3 XTN P CS 517Z 01 ISSU O P SIZ 1.8 x PIN #1 INTIFICTION PIN #1 INX R 1 2 TOP VIW SI VIW BOTTOM VIW SYMBO MIN NOM MX RF RF TI FRONT VIW RF Nots: (1) ll dimnsions ar in millimtrs. (2) Rfr JC MO-236/MO TI RF Coppr xposd 11

12 PCKG IMNSIONS MSOP 8, 3x3 CS ISSU O SYMBO MIN NOM MX BSC RF 2 θ 0.25 BSC 0º 6º TOP VIW 2 TI 1 SI VIW N VIW 2 Nots: (1) ll dimnsions ar in millimtrs. ngls in dgrs. (2) Complis with JC MO-187. TI 1 12

13 PCKG IMNSIONS WCSP 6, 0.96 x 1.17 CS TB ISSU O 13

14 ORRING INFORMTION Ordr Numr Spifi vi Marking Pakag Typ Tmpratur Rang CT93C86BI G 93C86 PIP 8 I = Industrial ( 40 C to +85 C) CT93C86B G 93C86 PIP 8 = xtndd ( 40 C to +125 C) CT93C86BVI GT3 93C86 SOIC 8, JC I = Industrial ( 40 C to +85 C) CT93C86BVI GT3 93C86 SOIC 8, JC I = Industrial 20 C to +85 C CT93C86BV GT3 93C86 SOIC 8, JC = xtndd ( 40 C to +125 C) CT93C86BYI GT3 M86 TSSOP 8 I = Industrial ( 40 C to +85 C) CT93C86BYI GT3 M86 TSSOP 8 I = Industrial ( 20 C to +85 C) CT93C86BY GT3 M86 TSSOP 8 = xtndd ( 40 C to +125 C) CT93C86BHU4I GT3 M4U UFN 8 I = Industrial ( 40 C to +85 C) CT93C86BHU4 GT3 M4U UFN 8 = xtndd ( 40 C to +125 C) ad Finish NiPdu NiPdu NiPdu NiPdu NiPdu NiPdu NiPdu NiPdu NiPdu NiPdu Shipping Tu, 50 Units / Tu Tu, 50 Units / Tu 3,000 Units / Rl 3,000 Units / Rl 3,000 Units / Rl 3,000 Units / Rl 3,000 Units / Rl 3,000 Units / Rl 3,000 Units / Rl 3,000 Units / Rl CT93C86BC6TR (Not 9) M4 WCSP 6 I = Industrial ( 40 C to +85 C) SngCu 5,000 Units / Rl CT93C86BZI GT3 M4 MSOP 8 I = Industrial ( 40 C to +85 C) CT93C86BZ GT3 M4 MSOP 8 = xtndd ( 40 C to +125 C) CT93C86BXI T2 93C86 SOIC 8, IJ I = Industrial ( 40 C to +85 C) NiPdu NiPdu Matt Tin 3,000 Units / Rl 3,000 Units / Rl 2,000 Units / Rl CT93C86BX T2 93C86 SOIC 8, IJ = xtndd ( 40 C to +125 C) Matt Tin 2,000 Units / Rl 7. ll pakags ar RoHS ompliant (ad fr, Halogn fr). 8. Th standard lad finish is NiPdu. 9. Prliminary. Plas ontat fatory for availaility. 10. For additional pakag and tmpratur options, plas ontat your narst ON Smiondutor Sals offi. 11. For information on tap and rl spifiations, inluding part orintation and tap sizs, plas rfr to our Tap and Rl Pakaging Spifiations Brohur, BR8011/. 12. For dtaild information and a rakdown of dvi nomnlatur and numring systms, plas s th ON Smiondutor vi Nomnlatur doumnt, TN310/, availal at ON Smiondutor and ar rgistrd tradmarks of Smiondutor Componnts Industris, C (SCIC). SCIC owns th rights to a numr of patnts, tradmarks, opyrights, trad srts, and othr intlltual proprty. listing of SCIC s produt/patnt ovrag may assd at Marking.pdf. SCIC rsrvs th right to mak hangs without furthr noti to any produts hrin. SCIC maks no warranty, rprsntation or guarant rgarding th suitaility of its produts for any partiular purpos, nor dos SCIC assum any liaility arising out of th appliation or us of any produt or iruit, and spifially dislaims any and all liaility, inluding without limitation spial, onsquntial or inidntal damags. Typial paramtrs whih may providd in SCIC data shts and/or spifiations an and do vary in diffrnt appliations and atual prforman may vary ovr tim. ll oprating paramtrs, inluding Typials must validatd for ah ustomr appliation y ustomr s thnial xprts. SCIC dos not onvy any lins undr its patnt rights nor th rights of othrs. SCIC produts ar not dsignd, intndd, or authorizd for us as omponnts in systms intndd for surgial implant into th ody, or othr appliations intndd to support or sustain lif, or for any othr appliation in whih th failur of th SCIC produt ould rat a situation whr prsonal injury or dath may our. Should Buyr purhas or us SCIC produts for any suh unintndd or unauthorizd appliation, Buyr shall indmnify and hold SCIC and its offirs, mploys, susidiaris, affiliats, and distriutors harmlss against all laims, osts, damags, and xpnss, and rasonal attorny fs arising out of, dirtly or indirtly, any laim of prsonal injury or dath assoiatd with suh unintndd or unauthorizd us, vn if suh laim allgs that SCIC was nglignt rgarding th dsign or manufatur of th part. SCIC is an qual Opportunity/ffirmativ tion mployr. This litratur is sujt to all applial opyright laws and is not for rsal in any mannr. PUBICTION ORRING INFORMTION ITRTUR FUFIMNT: itratur istriution Cntr for ON Smiondutor P.O. Box 5163, nvr, Colorado US Phon: or Toll Fr US/Canada Fax: or Toll Fr US/Canada mail: ordrlit@onsmi.om N. mrian Thnial Support: Toll Fr US/Canada urop, Middl ast and fria Thnial Support: Phon: Japan Customr Fous Cntr Phon: ON Smiondutor Wsit: Ordr itratur: For additional information, plas ontat your loal Sals Rprsntativ CT93C86B/