256K (32K x 8) OTP EPROM AT27C256R

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Marjory Greene
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1 Faturs Fast Rad Accss Tim 45 ns Low-Powr CMOS Opration 100 µa Max Standby 20 ma Max Activ at 5 MHz JEDEC Standard Packags 28-lad PDIP 32-lad PLCC 28-lad TSOP and SOIC 5V ± 10% Supply High Rliability CMOS Tchnology 2,000V ESD Protction 200 ma Latchup Immunity Rapid Programming Algorithm 100 µs/byt (Typical) CMOS and TTL Compatibl Inputs and Outputs Intgratd Product Idntification Cod Industrial and Automotiv Tmpratur Rangs Grn (Pb/Halid-fr) Packaging Option 256K (32K x 8) OTP EPROM 1. Dscription Th is a low-powr, high-prformanc 262,144-bit on-tim programmabl rad-only mmory (OTP EPROM) organizd 32K by 8 bits. It rquirs only on 5V powr supply in normal rad mod opration. Any byt can b accssd in lss than 45 ns, liminating th nd for spd rducing WAIT stats on high-prformanc microprocssor systms. Atml s scald CMOS tchnology provids low-activ powr consumption, and fast programming. Powr consumption is typically only 8 ma in Activ Mod and lss than 10 µa in Standby. Th is availabl in a choic of industry-standard JEDEC-approvd on tim programmabl (OTP) plastic DIP, PLCC, SOIC, and TSOP packags. All dvics fatur two-lin control (CE, OE) to giv dsignrs th flxibility to prvnt bus contntion. With 32K byt storag capability, th allows firmwar to b stord rliably and to b accssd by th systm without th dlays of mass storag mdia. Atml s has additional faturs to nsur high quality and fficint production us. Th Rapid Programming Algorithm rducs th tim rquird to program th part and guarants rliabl programming. Programming tim is typically only 100 µs/byt. Th Intgratd Product Idntification Cod lctronically idntifis th dvic and manufacturr. This fatur is usd by industry-standard programming quipmnt to slct th propr programming algorithms and voltags.

2 2. Pin Configurations Pin Nam A0 - A14 O0 - O7 CE OE NC Function Addrsss Outputs Chip Enabl Output Enabl No Connct lad PDIP/SOIC Top Viw lad TSOP Top Viw Typ 1 VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND VCC A14 A13 A8 A9 A11 OE A10 CE O7 O6 O5 O4 O3 OE A11 A9 A8 A13 A14 VCC VPP A12 A7 A6 A5 A4 A A10 CE O7 O6 O5 O4 O3 GND O2 O1 O0 A0 A1 A lad PLCC Top Viw A6 A5 A4 A3 A2 A1 A0 NC O A8 A9 A11 NC OE A10 CE O7 O6 O1 O2 GND NC O3 O4 O5 A7 A12 VPP NC VCC A14 A13 Not: PLCC Packag Pins 1 and 17 ar Don t Connct. 2

3 3. Systm Considrations 4. Block Diagram Switching btwn activ and standby conditions via th Chip Enabl pin may produc transint voltag xcursions. Unlss accommodatd by th systm dsign, ths transints may xcd datasht limits, rsulting in dvic non-conformanc. At a minimum, a 0.1 µf high frquncy, low inhrnt inductanc, cramic capacitor should b utilizd for ach dvic. This capacitor should b connctd btwn th V CC and Ground trminals of th dvic, as clos to th dvic as possibl. Additionally, to stabiliz th supply voltag lvl on printd circuit boards with larg EPROM arrays, a 4.7 µf bulk lctrolytic capacitor should b utilizd, again connctd btwn th V CC and Ground trminals. This capacitor should b positiond as clos as possibl to th point whr th powr supply is connctd to th array. 5. Absolut Maximum Ratings* Tmpratur Undr Bias C to +125 C Storag Tmpratur C to +150 C Voltag on Any Pin with Rspct to Ground V to +7.0V (1) Voltag on A9 with Rspct to Ground V to +14.0V (1) *NOTICE: Strsss byond thos listd undr Absolut Maximum Ratings may caus prmannt damag to th dvic. This is a strss rating only and functional opration of th dvic at ths or any othr conditions byond thos indicatd in th oprational sctions of this spcification is not implid. Exposur to absolut maximum rating conditions for xtndd priods may affct dvic rliability. V PP Supply Voltag with Rspct to Ground V to +14.0V (1) Not: 1. Minimum voltag is -0.6V DC which may undrshoot to -2.0V for pulss of lss than 20 ns. Maximum output pin voltag is V CC V dc which may ovrshoot to +7.0 volts for pulss of lss than 20 ns. 3

4 6. Oprating Mods Mod/Pin CE OE Ai V PP Outputs Rad V IL V IL Ai V CC D OUT Output Disabl V IL V IH X (1) V CC High Z Standby V IH X (1) X (1) V CC High Z Rapid Program (2) V IL V IH Ai V PP D IN PGM Vrify (2) X (1) V IL Ai V PP D OUT Optional PGM Vrify (2) V IL V IL Ai V CC D OUT PGM Inhibit (2) V IH V IH X (1) V PP High Z V Idntification Cod Product Idntification (4) V IL V IL A0 = V IH or V IL (3) A9 = V H A1 - A14 = V IL CC Nots: 1. X can b V IL or V IH. 2. Rfr to Programming Charactristics. 3. V H = 12.0 ± 0.5V. 4. Two idntifir byts may b slctd. All Ai inputs ar hld low (V IL ), xcpt A9 which is st to V H and A0 which is toggld low (V IL ) to slct th Manufacturr s Idntification byt and high (V IH ) to slct th Dvic Cod byt. 7. DC and AC Oprating Conditions for Rad Opration Oprating Tmp. (Cas) Ind. -40 C - 85 C -40 C - 85 C Auto. -40 C C V CC Supply 5V ± 10% 5V ± 10% 8. DC and Oprating Charactristics for Rad Opration Symbol Paramtr Condition Min Max Units Ind. ±1 µa I LI Input Load Currnt V IN = 0V to V CC Auto. ±5 µa Ind. ±5 µa I LO Output Lakag Currnt V OUT = 0V to V CC Auto. ±10 µa (2) (1) I PP1 V PP Rad/Standby Currnt V PP = V CC 10 µa I SB I (1) SB1 (CMOS), CE = V CC ± 0.3V 100 µa V CC Standby Currnt I SB2 (TTL), CE = 2.0 to V CC + 0.5V 1 ma I CC V CC Activ Currnt f = 5 MHz, I OUT = 0 ma, E = V IL 20 ma V IL Input Low Voltag V V IH Input High Voltag 2.0 V CC V V OL Output Low Voltag I OL = 2.1 ma 0.4 V V OH Output High Voltag I OH = -400 µa 2.4 V Nots: 1. V CC must b applid simultanously with or bfor V PP, and rmovd simultanously with or aftr V PP.. 2. V PP may b connctd dirctly to V CC, xcpt during programming. Th supply currnt would thn b th sum of I CC and I PP. 4

5 . 9. AC Charactristics for Rad Opration Symbol Paramtr Condition Not: 1. S AC Wavforms for Rad Opration Min Max Min Max t ACC (1) Addrss to Output Dlay CE = OE = V IL ns t CE (1) CE to Output Dlay OE = V IL ns t OE (1) OE to Output Dlay CE = V IL ns t DF (1) t OH OE or CE High to Output Float, Whichvr Occurrd First Output Hold from Addrss, CE or OE, Whichvr Occurrd First Units ns 7 7 ns 10. AC Wavforms for Rad Opration (1) Nots: 1. Timing masurmnt rfrnc lvl is 1.5V for -45 dvics. Input AC driv lvls ar V IL = 0.0V and V IH = 3.0V. Timing masurmnt rfrnc lvls for all othr spd grads ar V OL = 0.8V and V OH = 2.0V. Input AC driv lvls ar V IL = 0.45V and V IH = 2.4V. 2. OE may b dlayd up to t CE - t OE aftr th falling dg of CE without impact on t CE. 3. OE may b dlayd up to t ACC - t OE aftr th addrss is valid without impact on t ACC. 4. This paramtr is only sampld and is not 100% tstd. 5. Output float is dfind as th point whn data is no longr drivn. 5

6 11. Input Tst Wavforms and Masurmnt Lvls For -45 dvics only: t R, t F < 5 ns (10% to 90%) For -70 dvics: t R, t F < 20 ns (10% to 90%) 12. Output Tst Load Not: 1. C L = 100 pf including jig capacitanc, xcpt for th -45 dvics, whr C L = 30 pf. 13. Pin Capacitanc f = 1 MHz, T = 25 C (1) Symbol Typ Max Units Conditions C IN 4 6 pf V IN = 0V C OUT 8 12 pf V OUT = 0V Not: 1. Typical valus for nominal supply voltag. This paramtr is only sampld and is not 100% tstd. 6

7 14. Programming Wavforms (1) Nots: 1. Th Input Timing Rfrnc is 0.8V for V IL and 2.0V for V IH. 2. t OE and t DFP ar charactristics of th dvic but must b accommodatd by th programmr. 3. Whn programming th a 0.1 µf capacitor is rquird across V PP and ground to supprss spurious voltag transints. 15. DC Programming Charactristics T A = 25 ± 5 C, V CC = 6.5 ± 0.25V, V PP = 13.0 ± 0.25V Symbol Paramtr Tst Conditions Limits I LI Input Load Currnt V IN = V IL,V IH ±10 µa V IL Input Low Lvl V V IH Input High Lvl 2.0 V CC + 1 V V OL Output Low Volt I OL = 2.1 ma 0.4 V V OH Output High Volt I OH = -400 µa 2.4 V I CC2 V CC Supply Currnt (Program and Vrify) 25 ma I PP2 V PP Currnt CE = V IL 25 ma V ID A9 Product Idntification Voltag V Min Max Units 7

8 16. AC Programming Charactristics T A = 25 ± 5 C, V CC = 6.5 ± 0.25V, V PP = 13.0 ± 0.25V Symbol Paramtr Tst Conditions (1) Min Max Units Limits t AS Addrss Stup Tim 2 µs t OES OE Stup Tim Input Ris and Fall Tims 2 µs t DS Data Stup Tim (10% to 90%) 20 ns 2 µs t AH Addrss Hold Tim Input Puls Lvls 0 µs t DH Data Hold Tim 0.45V to 2.4V 2 µs t DFP OE High to Output Float Dlay (2) ns t Input Timing Rfrnc Lvl VPS V PP Stup Tim 2 µs 0.8V to 2.0V t VCS V CC Stup Tim 2 µs t PW CE Program Puls Width (3) Output Timing Rfrnc Lvl µs t OE Data Valid from OE (2) 0.8V to 2.0V 150 ns t PRT V PP Puls Ris Tim During Programming 50 ns Nots: 1. V CC must b applid simultanously or bfor V PP and rmovd simultanously or aftr V PP. 2. This paramtr is only sampld and is not 100% tstd. Output Float is dfind as th point whr data is no longr drivn s timing diagram. 3. Program Puls width tolranc is 100 µsc ± 5%. 17. Atml s Intgratd Product Idntification Cod Cods Pins A0 O7 O6 O5 O4 O3 O2 O1 O0 Manufacturr E Dvic Typ C Hx Data 8

9 18. Rapid Programming Algorithm A 100 µs CE puls width is usd to program. Th addrss is st to th first location. V CC is raisd to 6.5V and V PP is raisd to 13.0V. Each addrss is first programmd with on 100 µs CE puls without vrification. Thn a vrification/rprogramming loop is xcutd for ach addrss. In th vnt a byt fails to pass vrification, up to 10 succssiv 100 µs pulss ar applid with a vrification aftr ach puls. If th byt fails to vrify aftr 10 pulss hav bn applid, th part is considrd faild. Aftr th byt vrifis proprly, th nxt addrss is slctd until all hav bn chckd. V PP is thn lowrd to 5.0V and V CC to 5.0V. All byts ar rad again and compard with th original data to dtrmin if th dvic passs or fails. 9

10 19. Ordring Information 19.1 Standard Packag t ACC (ns) Activ I CC (ma) Standby JI -45PI -45RI -45TI JI -70PI -70RI -70TI JA -70PA -70RA Ordring Cod Packag Opration Rang 32J 28P6 28R (1) 28T 32J 28P6 28R (1) 28T 32J 28P6 28R (1) Industrial (-40 C to 85 C) Industrial (-40 C to 85 C) Automotiv (-40 C to 125 C) Not: Not rcommndd for nw dsigns. Us Grn packag option Grn Packag (Pb/Halid-fr) t ACC I CC (ma) (ns) Activ Standby JU -45PU -45RU -45TU JU -70PU -70RU -70TU Not: 1. Th 28-pin SOIC packag is not rcommndd for nw dsigns. Ordring Cod Packag Opration Rang 32J 28P6 28R (1) 28T 32J 28P6 28R (1) 28T Industrial (-40 C to 85 C) Industrial (-40 C to 85 C) Packag Typ 32J 28P6 28R 28T 32-lad, Plastic J-Ladd Chip Carrir (PLCC) 28-lad, 0.600" Wid, Plastic Dual Inlin Packag (PDIP) 28-lad, 0.330" Wid, Plastic Gull Wing Small Outlin (SOIC) 28-lad, Thin Small Outlin Packag (TSOP) 10

11 20. Packaging Information J PLCC 1.14(0.045) X 45 PIN NO. 1 IDENTIFIER 1.14(0.045) X (0.0125) 0.191(0.0075) B E1 E B1 E2 D1 D A A2 A1 0.51(0.020)MAX 45 MAX (3X) COMMON DIMENSIONS (Unit of Masur = mm) Nots: D2 1. This packag conforms to JEDEC rfrnc MS-016, Variation AE. 2. Dimnsions D1 and E1 do not includ mold protrusion. Allowabl protrusion is.010"(0.254 mm) pr sid. Dimnsion D1 and E1 includ mold mismatch and ar masurd at th xtrm matrial condition at th uppr or lowr parting lin. 3. Lad coplanarity is 0.004" (0.102 mm) maximum. SYMBOL MIN NOM MAX NOTE A A A D D Not 2 D E E Not 2 E B B TYP 10/04/01 R 2325 Orchard Parkway San Jos, CA TITLE 32J, 32-lad, Plastic J-ladd Chip Carrir (PLCC) DRAWING NO. 32J REV. B 11

12 P6 PDIP D PIN 1 E1 A SEATING PLANE L B1 B A1 Nots: C E B 0º ~ 15º REF 1. This packag conforms to JEDEC rfrnc MS-011, Variation AB. 2. Dimnsions D and E1 do not includ mold Flash or Protrusion. Mold Flash or Protrusion shall not xcd 0.25 mm (0.010"). COMMON DIMENSIONS (Unit of Masur = mm) SYMBOL MIN NOM MAX NOTE A A D Not 2 E E Not 2 B B L C B TYP 09/28/01 R 2325 Orchard Parkway San Jos, CA TITLE 28P6, 28-lad (0.600"/15.24 mm Wid) Plastic Dual Inlin Packag (PDIP) DRAWING NO. 28P6 REV. B 12

13 R SOIC B E1 E PIN 1 D A A1 0º ~ 8º C COMMON DIMENSIONS (Unit of Masur = mm) SYMBOL MIN NOM MAX NOTE A A L D Not 1 E E Not 1 B Not: 1. Dimnsions D and E1 do not includ mold Flash or protrusion. Mold Flash or protrusion shall not xcd 0.25 mm (0.010"). C L TYP 5/18/2004 R 2325 Orchard Parkway San Jos, CA TITLE 28R, 28-lad, 0.330" Body Width, Plastic Gull Wing Small Outlin (SOIC) DRAWING NO. 28R REV. C 13

14 T TSOP PIN 1 0º ~ 5º c Pin 1 Idntifir Ara D1 D L b L1 E A2 A SEATING PLANE GAGE PLANE A1 COMMON DIMENSIONS (Unit of Masur = mm) Nots: 1. This packag conforms to JEDEC rfrnc MO Dimnsions D1 and E do not includ mold protrusion. Allowabl protrusion on E is 0.15 mm pr sid and on D1 is 0.25 mm pr sid. 3. Lad coplanarity is 0.10 mm maximum. SYMBOL MIN NOM MAX NOTE A 1.20 A A D D Not 2 E Not 2 L L BASIC b c BASIC 12/06/02 R 2325 Orchard Parkway San Jos, CA TITLE 28T, 28-lad (8 x 13.4 mm) Plastic Thin Small Outlin Packag, Typ I (TSOP) DRAWING NO. 28T REV. C 14

15 Hadquartrs Intrnational Atml Corporation 2325 Orchard Parkway San Jos, CA USA Tl: 1(408) Fax: 1(408) Atml Asia Room 1219 Chinachm Goldn Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tl: (852) Fax: (852) Atml Europ L Krbs 8, Ru Jan-Pirr Timbaud BP Saint-Quntin-n- Yvlins Cdx Franc Tl: (33) Fax: (33) Atml Japan 9F, Tontsu Shinkawa Bldg Shinkawa Chuo-ku, Tokyo Japan Tl: (81) Fax: (81) Product Contact Wb Sit Tchnical Support prom@atml.com Sals Contact Litratur Rqusts Disclaimr: Th information in this documnt is providd in connction with Atml products. No licns, xprss or implid, by stoppl or othrwis, to any intllctual proprty right is grantd by this documnt or in connction with th sal of Atml products. EXCEPT AS SET FORTH IN ATMEL S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDEN- TAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atml maks no rprsntations or warrantis with rspct to th accuracy or compltnss of th contnts of this documnt and rsrvs th right to mak changs to spcifications and product dscriptions at any tim without notic. Atml dos not mak any commitmnt to updat th information containd hrin. Unlss spcifically providd othrwis, Atml products ar not suitabl for, and shall not b usd in, automotiv applications. Atml s products ar not intndd, authorizd, or warrantd for us as componnts in applications intndd to support or sustain lif Atml Corporation. All rights rsrvd. Atml, logo and combinations throf, and othrs ar rgistrd tradmarks or tradmarks of Atml Corporation or its subsidiaris. Othr trms and product nams may b tradmarks of othrs.

512K (64K x 8) OTP EPROM AT27C512R

512K (64K x 8) OTP EPROM AT27C512R Faturs Fast Rad Accss Tim 45 ns Low-Powr CMOS Opration 100 µa Max Standby 20 ma Max Activ at 5 MHz JEDEC Standard Packags 28-lad PDIP 32-lad PLCC 28-lad TSOP and SOIC 5V ± 10% Supply High-Rliability CMOS