PS391/PS392/PS393. Precision, Quad, SPST, Analog Switches. Description

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1 PS39/PS39/PS Precision, Quad, SPST, Analog Switches Features Low On-Resistance, ohms typ) Minimizes Disttion and Err oltages On-Resistance Match Between hannels, < ohms Guaranteed On-Resistance Flatness, < ohms Low harge Injection, 3p typ. Improved Leakage Over Temperature, <.na at + o ESD Rating > per Method 3.7 Single-Supply Operation +3 to +) Bipolar-Supply Operation ±3 to ±) Low Power onsumption, <µa TTL/MOS ompatible Applications Instrumentation Battery Powered Systems Audio Switching ± Data Acquisition Systems Sample-and-Hold ircuits Telecommunications Systems Description The PS39/ PS39/ PS393 are improved, quad, single-pole singlethrow SPST) analog switches designed to operate with ±3 to ± power supplies a single 3 to supply. The PS39 has four nmally closed ) switches, the PS39 has four nmally open NO) switches. The PS393 has two NO and two switches. All three devices offer low leakage <pa typ) and fast switching speeds t ON <3ns). Power consumption is less than µa, ideal f battery-powered equipment. With ± supplies, the PS39/PS39/PS393 guarantee <ohm channel-to-channel matching, <3ohm on-resistance R ON ), and <ohm R ON flatness over the specified range. These switches are fully specified f single + operation, with <ohm R ON match, <ohm R ON, and <ohm flatness. F operation below, the PIA39A/PIA39A/PIA393A are also recommended. Functional Diagrams, Pin onfigurations, and Truth Tables 3 NO 3 NO NO 3 - PS39 3 N.. - PS39 3 N.. - PS393 3 N.. 3 NO NO3 NO Top iew Top iew Top iew N.. = No onnect. Switches shown f logic input PS39 Switc h ON PS39 Switc h ON PS393 Switches, Switches, 3 ON ON PSE 9//

2 PS39/PS39/PS Absolute Maximum Ratings oltages Referenced to to +7,,, NO Note ) ) to ) + 3mA, whichever occurs first urrent any terminal) mA Peak urrent,, NO, pulsed at ms, % duty cycle) ma ESD per Method > Thermal Infmation ontinuous Power Dissipation T A = +7 º ) Plastic DIP derate.mw/ º above +7 º ) mw SO and QSOP derate.7mw/ º above +7 º ) mw Stage Temperature º to + º Lead Temperature soldering, s) º Note Signals on, NO,, exceeding are clamped by internal diodes. Limit fward diode current to 3mA. aution: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these any other conditions beyond those indicated in the operational sections of this specification is not implied. Electrical Specifications - Single + Supply = ±%, =, H =, L =.) Parameter Analog Switch A nalog Signal Range 3) Symbo l ANALO G ondition s Temp. ) M in ) T yp ) ax M - ) Units On Resistance R ON =, I OM = ma = NO, On-Resistance Match B etween hannels ) R ON =, I = = NO ma. ohm On-Resistance F latness ) R FLATON ) =, I OM = ma =,, NO, NO Off eakage urrent L ) I NO) OR I ) =, OM =, = NO Off Leakage urrent ) I ) =, OM =, = NO na On Leakage urrent ) I ON) =, OM =, = NO PSE 9//

3 PS39/PS39/PS Electrical Specifications - Single + Supply continued) = ±%, =, H =, L =.) Parameter Input Input urrent with Input oltage High Input urrent with Input oltage Low Dynamic Turn-On Time Symbo l I H I N =, all others =. ondition s Temp ) M in ) T yp ) M ax ) Units... I L I N =., all others =... to N Turn-Off Time to FF On-hannel Bandwidth harge Injection 3) BW Q Figure O M =, Figure Signal = dbm, ohm in and out L = nf, GEN =, RGEN = Ω, Figure µa ns MHz 3 p Off Isolation O IRR R L = ohm, L= pf, f = MHz, Figure rosstalk ) X TALK R L = ohm, L= pf, f = MHz, Figure NO apacitance O FF) Off apacitance = MHz, Figure O MO F- On apacitance O MO N ) F) =MHz, Figure 7 f f= MHz, Figure f db pf P ositive Supply urrent I+ =, all channels on off. µ A Total Harmonic Disttion THD.3 % Notes:. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet.. Typical values are f DESIGN AID ONLY, not guaranteed subject to production testing. 3. Guaranteed by design. R ON = R ON max - R ON min. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.. Leakage parameters are % tested at maximum rated hot temperature and guaranteed by crelation at +º. 7. Off Isolation = log [ / NO NO ) ], = utput, / NO = input to off switch. Between any two switches. 3 PSE 9//

4 PS39/PS39/PS Electrical Specifications - Dual Supplies = + ±%, = ±%, =, H =., L =.) Parameter Symbo l ondition s Temp M in ) T yp ) M ax ) Units Analog Switch A nalog Signal Range 3) AN ALO G F ull On-Resistance =., =., R O N I O M = ma, N O N = On-Resistance Match B etween hannels ) R O N =., =., O M = ma, N O N = O n-resistance Flatness ) R FLATO N ) NO Off Leakage urrent ) Off Leakage urrent ) I N O O FF) o I N O O FF) I O MO FF) r O M =., =., ±., = = N O N ± ohm na On Leakage urrent ) I O MO N ) =., =., = ±. N O N = O M, ±.... F ull PSE 9//

5 PS39/PS39/PS Electrical Specifications - Dual Supplies continued) = + ±%, = ±%, =, H =., L =.) Parameter Symbo l ondition s Temp M in ) T yp ) M ax ) Units Input Input urrent with Input oltage High Input urrent with Input oltage Low I H I L I N =., all others =. I N =., all others =.... µ A Dynamic Turn-On-Time to N Turn-Off-Time t O FF) O M = ± 3, Figure ns Break-Befe-Make Time Delay t D PS393 only, RL = 3ohm, L = 3pF, Figure harge Injection 3) Q L = nf, G EN =, R GEN = ohm, Figure 3 3 p R Off Isolation O L = ohm, L = pf, IRR f = MHz, Figure R rosstalk X L = ohm, L = pf, TALK f = MHz, Figure 9 db NO apacitance O FF) Off apacitance O MO FF) f = MHz, Figure pf On apacitance O MO N ) Supply = MHz, Figure 7 f P ositive Supply Range, P ositive Supply urrent I + =., =., I N = N egative Supply urrent I All channels on off ± 3 ± µ A Notes:. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet.. Typical values are f DESIGN AID ONLY, not guaranteed subject to production testing. 3. Guaranteed by design. R ON = R ON max - R ON min. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.. Leakage parameters are % tested at maximum rated hot temperature and guaranteed by crelation at +º. 7. Off Isolation = log [ / NO ) ], = Output,, NO = input to off switch. Between any two switches. PSE 9//

6 PS39/PS39/PS Electrical Specifications - Single Supply = + ±%, = ±%, =, H =., L =.) Description Analog Switch A nalog Switch Range 3) On-Resistance Paramete r N ALO G ondition s Temp ) M in ) T yp ) M ax ) Units A R O N =., I N O O M = ma, N = 3. 3 On-Resistance Match B etween hannels ) R O N =, I N O O M = ma, N = 3. 3 W On-Resistance F latness 3,) R FLATO N ) =, I N O O M = ma, N =, NO Off Leakage urrent 9) I N O O FF) I N O FF) =., N O O M =, N = Off Leakage urrent 9) I O MO FF) On Leakage urrent 9) Dynamic Turn-On Time I O MO N ) to N Turn-Off Time to FF =., N O O M =, N =., N O =. O M N =. = 3 Break-Befe-Make PS393 only, RL = 3ohm, T ime Delay 3) t D = 3pF harge Injection 3) Supply Q L L = nf, G EN =, R = G EN, Figure na p ns P ositive Supply urrent I+ N egative Supply urrent I =., I N =, All channels on off ma PSE 9//

7 PS39/PS39/PS Electrical Specifications - Single 3.3 Supply = +3 to 3., =, H =., L =.) Analog Switch Description A nalog Switch Range 3) hannel On-Resistance Dynamic T urn-on-time 3) T urn-off-time 3) Paramete r ANALO G R ON ton t ) =3, I NO NO ondition s Temp ) OM = ma, =. =. B reak-befe-make Time Delay 3) PS393 only, RL = 3 ohm; t D = 3pF harge Injection 3) Supply Q P ositive Supply urrent I+ Negativ e Supply urrent I L L =.nf, G EN =, R GEN = = 3., =, All channels on off M in ) T yp ) M ax ) Units ohm p µ A Notes:. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet.. Typical values are f DESIGN AID ONLY, not guaranteed subject to production testing. 3. Guaranteed by design. R ON = R ON max - R ON min. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.. Leakage parameters are % tested at maximum rated hot temperature and guaranteed by crelation at +º. 7. Off Isolation = log [ / NO ) ], = Output,, NO = input to off switch. Between any two switches. 9. Leakage testing at single supply is guaranteed by testing with dual supplies. ns 7 PSE 9//

8 PS39/PS39/PS Typical Operating haracteristics T A = + º, unless otherwise noted) R ON Ω) Ω R ON vs. & Supply oltages 3 R ON Ω) Ω R ON vs. & Supply oltages T A = + T A = + T A = - = + - = R ON Ω) ) R ON vs. Single Supply) = 3 = = - = R ON Ω) - - ) R ON vs. and Temperature Single Supply) 3 = + - = T A = + T A = + T A = - ) harge Injection vs. Analog oltage + 3 ) Leakage urrent vs. Q - harge Injection p) Supply + Supply urrent pa) + - ION) I) oltage ) ). PSE 9//

9 PS39/PS39/PS Typical Operating haracteristics continued) na Leakage urrent vs. Temperature Input Switching Threshold vs. Supply oltages Leakage urrent pa pa pa.pa I ON), NO ), I' ) 3.pA Temperature ) ±3 ± ± ± ±7 ±, - ±) Supply urrent vs. Switching Times vs. Supply oltage = +. - = -. I+ ma) t ON, t ns) t ON t ontrol oltage ) ±3 ± ± ± ±7 ±, - ±) Switching Times Switching Times vs. Temperature ton t I+, I- ma) Supply urrents vs. Switching Frequency... = + - = - = P-P I+ I- - Temperature ) 3 Frequency MHz) 9 PSE 9//

10 PS39/PS39/PS Test ircuits/timing Diagrams = +3f ton), -3f toff) Input + NO R L 3Ω L 3pF OUT Input Switch Output +3 % OUT 9% t r <ns t f <ns t t ON 9% L LUDES FIXTURE AND STRAY APAITAE R OUT = L R L + R ON ) LOGI PUT WAEFORMS ERTED FOR SWITHES THAT HAE OPPOSITE LOGI Figure. Switching Time + = +3 3 = +3 Input - - NO R L OUT3 L R L OUT L R L = 3Ω L = 3pF Input Switch Output OUT ) Switch Output3 OUT3 ) +3 % t D 9% t D 9% L LUDES FIXTURE AND STRAY APAITAE Figure. Break-Befe-Make Interval PS393 only) + GEN Input R GEN NO - L nf OUT OUT ON ON OUT - Q = OUT ) L ) Figure 3. harge Injection PSE 9//

11 PS39/PS39/PS Test ircuits/timing Diagrams continued) nf + nf + Signal Generat dbm Signal Generat dbm N Ω Analyzer R L NO - nf -. Analyzer. R L N - - nf. Figure. Off Isolation Figure. rosstalk nf + nf + apacitance Meter f = khz NO. apacitance Meter f = khz NO. - EN - nf Applications Figure. hannel-off apacitance As illustrated in Figure, PS39 can be used to insert various capacits, ) and set proper R times f integration. The resists R and R set initial gain. The R resist x sets the R time. The reset switch discharges the hold capacit through R. Figure 7. hannel-on apacitance Figure. Programmable Integrat and Sample/Hold PSE 9//

12 PS39/PS39/PS Overvoltage Protection Proper power-supply sequencing is recommended f all MOS devices. Do not exceed the absolute maximum ratings, because stresses beyond the listed ratings may cause permanent damage to the devices. Always sequence on first, followed by -, and then the logic inputs. If power-supply sequencing is not possible, add two small signal diodes two current limiting resists in series with the supply pins f overvoltage protection Figure 9). Adding diodes reduces the analog signal range, but low switch resistance and low leakage characteristics are unaffected. Ordering Infmation Part Number PS39PE PS39SE PS39EPE PS39ESE PS39EEE Temperature Range Package º to + 7º Ld PDIP º to + 7º Narrow SOI º to + º Ld PDIP º to + º Narrow SOI º to + º QSOP Positive Supply PS39PE PS39SE PS39EPE PS39ESE PS39EEE º to + 7º Ld PDIP º to + 7º Narrow SOI º to + º Ld PDIP º to + º Narrow SOI º to + º QSOP PS393PE º to + 7º Ld PDIP NO PS393SE º to + 7º Narrow SOI PS393EPE º to + º Ld PDIP g PS393ESE º to + º Narrow SOI - PS393EEE vº to + º QSOP Figure 9. Overvoltage protection is accomplished using two external blocking diodes two current limiting resists. Pericom Semiconduct pation 3 Bering Drive San Jose, A Fax ) 3- PSE 9//

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