SGM48753 CMOS Analog Switch

Transcription

1 GENERAL DESCRIPTION The is a CMOS analog IC configured as three single-pole/double-throw (SPDT) switches. This CMOS device can operate from 2.5V to 5.5V single supplies. Each switch can handle rail-to-rail analog signals. The off-leakage current is only 1nA (TYP) at +25. All digital inputs can support 1.8V logic control I/O. The is available in Green SOIC-16, SSOP-16, TSSOP-16 and TQFN L packages. It operates over an ambient temperature range of -40 to +85. FEATURES Guaranteed On-Resistance 48Ω (TYP) with +5V Supply Guaranteed On-Resistance Match Between Channels Low Off-Leakage Current 1nA (TYP) at +25 Low On-Leakage Current 1nA (TYP) at +25 Optimized Rise Time and Fall Time of A, B, C Control Pins to Reduce Clock Feedthrough Effect 2.5V to 5.5V Single-Supply Operation 1.8V Logic Compatible Low Distortion: 0.7% (R L = 600Ω, f = 20Hz to 20kHz) High Off-Isolation: -83dB (R L = 50Ω, f = 1MHz) Low Crosstalk: -110dB (R L = 50Ω, f = 1MHz) -40 to +85 Operating Temperature Range Available in Green SOIC-16, SSOP-16, TSSOP-16 and TQFN L Packages APPLICATIONS Battery-Operated Equipment Audio and Video Signal Routing Low-Voltage Data-Acquisition Systems Communications Circuits Automotive REV. A. 2

2 PACKAGE/ORDERING INFORMATION MODEL PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE ORDERING NUMBER PACKAGE MARKING PACKING OPTION SOIC to +85 YS16G/TR YS16 XXXXX Tape and Reel, 2500 SSOP to +85 YQS16G/TR TSSOP to +85 YTS16G/TR YQS16 XXXXX YTS16 XXXXX Tape and Reel, 3000 Tape and Reel, 4000 TQFN L -40 to +85 YTQ16G/TR 48753TQ XXXXX Tape and Reel, 4000 NOTE: XXXXX = Date Code and Vendor Code. Green (RoHS & HSF): defines "Green" to mean Pb-Free (RoHS compatible) and free of halogen substances. If you have additional comments or questions, please contact your SGMICRO representative directly. ABSOLUTE MAXIMUM RATINGS to GND V to 6V Voltage into Any Terminal (1) V to ( + 0.3V) Continuous Current into Any Terminal... ±20mA Peak Current, X_, Y_, Z_ (Pulsed at 1ms, 10% duty cycle)... ±40mA Junction Temperature Storage Temperature Range to +150 Lead Temperature (Soldering, 10s) ESD Susceptibility HBM V MM V NOTE: 1. Voltages exceeding or V EE on any signal terminal are clamped by internal diodes. Limit forward-diode current to maximum current rating. RECOMMENDED OPERATING CONDITIONS Supply Voltage Range V to 5.5V Operating Temperature Range to +85 OVERSTRESS CAUTION Stresses beyond those listed may cause permanent damage to the device. Functional operation of the device at these or any other conditions beyond those indicated in the operational section of the specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ESD SENSITIVITY CAUTION This integrated circuit can be damaged by ESD if you don t pay attention to ESD protection. SGMICRO recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. DISCLAIMER reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. 2

3 PIN CONFIGURATIONS (TOP VIEW) Y1 Y Y (TOP VIEW) Y0 Y1 Y Z X Z X Z Z X1 X0 Z Z X1 X0 ENABLE 6 11 A ENABLE 4 EP 9 A NC GND SOIC-16/SSOP-16/TSSOP-16 B C NC GND C B TQFN L PIN DESCRIPTION SOIC-16/SSOP-16/T SSOP-16 PIN TQFN L NAME FUNCTION 1 15 Y1 Analog Switch Y Normally Open Input Y0 Analog Switch Y Normally Closed Input. 3 1 Z1 Analog Switch Z Normally Open Input. 4 2 Z Analog Switch Z Output. 5 3 Z0 Analog Switch Z Normally Closed Input. 6 4 ENABLE Digital Enable Input. Normally connected to GND. 7 5 NC No Connect. 8 6 GND Ground. Connect to digital ground. 9 7 C Digital Address C Input B Digital Address B Input A Digital Address A Input X0 Analog Switch X Normally Closed Input X1 Analog Switch X Normally Open Input X Analog Switch X Output Y Analog Switch Y Output Positive Analog and Digital Supply Voltage Input. Exposed Pad EP Exposed Pad. Connect EP to GND. 3

4 FUNCTION TABLE ENABLE INPUT SELECT INPUTS C B A ON SWITCHES H X X X All Switches Open L L L L X-X0, Y-Y0, Z-Z0 L L L H X-X1, Y-Y0, Z-Z0 L L H L X-X0, Y-Y1, Z-Z0 L L H H X-X1, Y-Y1, Z-Z0 L H L L X-X0, Y-Y0, Z-Z1 L H L H X-X1, Y-Y0, Z-Z1 L H H L X-X0, Y-Y1, Z-Z1 L H H H X-X1, Y-Y1, Z-Z1 X = Don t care NOTE: Input and output pins are identical and interchangeable. Either may be considered an input or output; signals pass equally well in either direction. 4

5 ELECTRICAL CHARACTERISTICS ( = 5.0V, Full = -40 to +85, typical values are at T A = +25, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS TEMP MIN TYP MAX UNITS ANALOG SWITCH Analog Signal Range V X_, V Y_, V Z_, V X, V Y, V Z On-Resistance R ON = 5.0V, I X, I Y, I Z = 1mA On-Resistance Match Between Channels R ON = 5.0V, I X, I Y, I Z = 1mA On-Resistance Flatness R FLAT(ON) = 5.0V, I X, I Y, I Z = 1mA X_, Y_, Z_ Off Leakage Current I X_(OFF), I Y_(OFF), I Z_(OFF) X, Y, Z Off Leakage Current I X(OFF), I Y(OFF), I Z(OFF) = 5.0V, V X_, V Y_, V Z_ = 1V, 4.5V, V X, V Y, V Z = 4.5V, 1V VCC = 5.0V, VX_, VY_, VZ_ = 1V, 4.5V, V X, V Y, V Z = 4.5V, 1V Full GND V Full Full Full na na X, Y, Z On Leakage Current I X(ON), I Y(ON), I Z(ON) = 5.0V, V X, V Y, V Z = 4.5V, 1V na DIGITAL I/O Logic Input Logic Threshold High V AH, V BH, V CH, V ENABLE V Logic Input Logic Threshold Low V AL, V BL, V CL, V ENABLE V Input-Current High I AH, I BH, I CH, I ENABLE V A, V B, V C, V ENABLE = na Input-Current Low I AL, I BL, I CL, I ENABLE V A, V B, V C, V ENABLE = 0V na DYNAMIC CHARACTERISTICS Address Transition Time ENABLE Turn-On Time ENABLE Turn-Off Time t TRANS t ON t OFF V X_, V Y_, V Z_ = 3V/0V, R L = 300Ω, C L = 35pF, Test Circuit 1 V X_, V Y_, V Z_ = 3V, R L = 300Ω, C L = 35pF, Test Circuit 2 V X_, V Y_, V Z_ = 3V, R L = 300Ω, C L = 35pF, Test Circuit ns ns ns Internal A, B, C Rise Time t R ns Internal A, B, C Fall Time t F ns Break-Before-Make Time t D V X_, V Y_, V Z_ = 3V, R L = 300Ω, C L = 35pF, Test Circuit ns Charge Injection Q R S = 0Ω, C = 1nF, V S = 0V, Test Circuit pc Off Isolation O ISO R L = 50Ω, f = 1MHz, Test Circuit db Channel-to-Channel Crosstalk X TALK R L = 50Ω, f = 1MHz, Test Circuit db Input Off-Capacitance Output Off-Capacitance Output On-Capacitance C X_(OFF), C Y_(OFF), C Z_(OFF) C X(OFF), C Y(OFF), C Z(OFF) C X(ON), C Y(ON), C Z(ON) V X_, V Y_, V Z_ = 0V, f = 1MHz, Test Circuit pf V X_, V Y_, V Z_ = 0V, f = 1MHz, Test Circuit pf V X_, V Y_, V Z_ = 0V, f = 1MHz, Test Circuit pf -3dB Bandwidth BW R L = 50Ω MHz Total Harmonic Distortion THD R L = 600Ω, 5V P-P, f = 20Hz to 20kHz % POWER SUPPLY Power Supply Range Full V Power Supply Current I CC V A, V B, V C, V ENABLE = or μa Ω Ω Ω 5

6 ELECTRICAL CHARACTERISTICS (continued) ( = 3.3V, Full = -40 to +85, typical values are at T A = +25, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS TEMP MIN TYP MAX UNITS ANALOG SWITCH Analog Signal Range V X_, V Y_, V Z_, V X, V Y, V Z On-Resistance R ON I X, I Y, I Z = 1mA X_, Y_, Z_ Off Leakage Current I X_(OFF), I Y_(OFF), I Z_(OFF) Full GND V Full 116 V X_, V Y_, V Z_ = 1V, 3V, V X, V Y, V Z = 3V, 1V na X, Y, Z Off Leakage Current I X(OFF), I Y(OFF), I Z(OFF) V X_, V Y_, V Z_ = 1V, 3V, V X, V Y, V Z = 3V, 1V na X, Y, Z On Leakage Current I X(ON), I Y(ON), I Z(ON) V X, V Y, V Z = 3V, 1V na DIGITAL I/O Logic Input Logic Threshold High Logic Input Logic Threshold Low Input-Current High Input-Current Low DYNAMIC CHARACTERISTICS Address Transition Time ENABLE Turn-On Time ENABLE Turn-Off Time V AH, V BH, V CH, V ENABLE V AL, V BL, V CL, V ENABLE V V I AH, I BH, I CH, I ENABLE V A, V B, V C, V ENABLE = na I AL, I BL, I CL, I ENABLE V A, V B, V C, V ENABLE = 0V na t TRANS t ON t OFF V X_, V Y_, V Z_ = 3V/0V, R L = 300Ω, C L = 35pF, Test Circuit 1 V X_, V Y_, V Z_ = 3V, R L = 300Ω, C L = 35pF, Test Circuit 2 V X_, V Y_, V Z_ = 3V, R L = 300Ω, C L = 35pF, Test Circuit ns ns ns Internal A, B, C Rise Time t R ns Internal A, B, C Fall Time t F ns Break-Before-Make Time t D V X_, V Y_, V Z_ = 3V, R L = 300Ω, C L = 35pF, Test Circuit ns Charge Injection Q R S = 0Ω, C = 1nF, V S = 0V, Test Circuit pc -3dB Bandwidth BW R L = 50Ω MHz POWER SUPPLY Power Supply Current I CC V A, V B, V C, V ENABLE = or μa Ω 6

7 TYPICAL PERFORMANCE CHARACTERISTICS = 5.0V, unless otherwise noted. 70 On Resistance vs. Input Voltage 0 Off Isolation vs. Frequency On Resistance (Ω) T A = +85 T A = -40 T A = +25 Off Isolation (db) Input Voltage (V) Frequency (MHz) 7

8 TEST CIRCUITS V A,V B,V C A,B,C X1,Y1,Z1-3V/0V V A,V B,V C 50% 50% 50Ω 0V X0,Y0,Z0 3V V X0,V Y0,V Z0 90% 90% ENABLE GND X,Y,Z 300Ω 35pF 0V t TRANS t TRANS Test Circuit 1. Address Transition Times (t TRANS) A,B,C X1,Y1,Z1 0V V ENABLE 50% 50% X0,Y0,Z0 3V 0V V X0,V Y0,V Z0 90% 90% V ENABLE 50Ω ENABLE GND X,Y,Z 300Ω 35pF 0V t OFF t ON Test Circuit 2. Switching Times (t ON, t OFF) V A,V B,V C 50Ω A,B,C V A,V B,V C X0,X1,Y0, Y1,Z0,Z1 3V 0V ENABLE X,Y,Z GND V X,V Y,V Z 300Ω 35pF 0V 50% 80% t R <20ns t F <20ns t D Test Circuit 3. Break-Before-Make Time (t D) 8

9 TEST CIRCUITS (continued) CHANNEL SELECT A,B,C X_,Y_,Z_ V ENABLE 0V V ENABLE 50Ω ENABLE GND X,Y,Z C L=1000pF Δ ΔVOUT IS THE MEASURED VOLTAGE DUE TO CHARGE TRANSFER ERROR Q WHEN THE CHANNEL TURNS OFF. Q = ΔVOUT CL Test Circuit 4. Charge Injection (Q) CHANNEL SELECT A,B,C 10n F X_,Y_,Z_ V IN NETWORK ANALYZER 50Ω 50Ω OFF-ISOLATION = 20log ( /V IN ) ON-LOSS = 20log ( /V IN ) ENABLE GND X,Y,Z MEAS. REF. 50Ω 50Ω CROSSTALK = 20log ( /V IN ) MEASUREMENTS ARE STANDARDIZED AGAINST SHORT AT SOCKET TERMINALS. OFF-ISOLATION IS MEASURED BETWEEN COM AND "OFF" NO TERMINAL ON EACH SWITCH. ON-LOSS IS MEASURED BETWEEN COM AND "ON" NO TERMINAL ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL (A, B, C) TO ALL OTHER CHANNELS. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED. Test Circuit 5. Off Isolation, On Loss and Crosstalk CHANNEL SELECT A,B,C X_,Y_,Z_ ENABLE GND X,Y,Z 1MHz CAPACITANCE ANALYZER Test Circuit 6. Capacitance 9

10 APPLICATION INFORMATION Power-Supply Considerations Overview The construction is typical of most CMOS analog switch. It supports single power supply. and GND are used to drive the internal CMOS switches and set the limits of the analog voltage on any switch. Reverse ESD protection diodes are internally connected between each analog-signal pin and both and GND. If any analog signal exceeds or GND, one of these diodes will conduct. During normal operation, these and other reverse-biased ESD diodes leak, forming the only current drawn from or GND. Virtually all the analog leakage current comes from the ESD diodes. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either or GND and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the and GND pins constitutes the analog-signal-path leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of either the same or opposite polarity. 100Ω 0.01μF * * X,Y,Z X_,Y_,Z_ * * GND *INTERNAL PROTECTION DIODES Figure 1. Over-Voltage Protection Using External Resistor Over-Voltage Protection Proper power-supply sequencing is recommended for the CMOS device. Do not exceed the absolute maximum ratings because stresses beyond the listed ratings can cause permanent damage to the devices. Always sequence on first, followed by the logic inputs and analog signals. If power-supply sequencing is not possible, add one 100Ω resistor in series with the supply pin for over-voltage protection (Figure 1). 10

11 PACKAGE INFORMATION PACKAGE OUTLINE DIMENSIONS SOIC-16 D e 1.75 E1 E RECOMMENDED LAND PATTERN (Unit: mm) L A b A1 A2 θ c Symbol Dimensions In Millimeters Dimensions In Inches MIN MAX MIN MAX A A A b c D E E e 1.27 BSC BSC L θ TX

12 PACKAGE INFORMATION PACKAGE OUTLINE DIMENSIONS SSOP-16 D E1 E b e RECOMMENDED LAND PATTERN (Unit: mm) L A A1 A2 θ c Dimensions In Millimeters Dimensions In Inches Symbol MIN MAX MIN MAX A A A b c D E E e BSC BSC L θ TX

13 PACKAGE INFORMATION PACKAGE OUTLINE DIMENSIONS TSSOP-16 D E1 E e b RECOMMENDED LAND PATTERN (Unit: mm) L A A1 A2 θ H c Dimensions In Millimeters Dimensions In Inches Symbol MIN MAX MIN MAX A A A b c D E E e BSC BSC L H 0.25 TYP 0.01 TYP θ TX

14 PACKAGE INFORMATION PACKAGE OUTLINE DIMENSIONS TQFN L D e N16 L D1 N1 E E1 k b N5 TOP VIEW BOTTOM VIEW A A1 SIDE VIEW A RECOMMENDED LAND PATTERN (Unit: mm) Dimensions In Millimeters Dimensions In Inches Symbol MIN MAX MIN MAX A A A REF REF D D E E k MIN MIN b e TYP TYP L TX

15 PACKAGE INFORMATION TAPE AND REEL INFORMATION REEL DIMENSIONS TAPE DIMENSIONS P2 P0 W Q1 Q2 Q1 Q2 Q1 Q2 B0 Q3 Q4 Q3 Q4 Q3 Q4 Reel Diameter P1 A0 K0 Reel Width (W1) DIRECTION OF FEED NOTE: The picture is only for reference. Please make the object as the standard. KEY PARAMETER LIST OF TAPE AND REEL Package Type Reel Diameter Reel Width W1 A0 B0 K0 P0 P1 P2 W Pin1 Quadrant SOIC Q1 SSOP Q1 TSSOP Q1 TQFN L Q1 DD0001 TX

16 PACKAGE INFORMATION CARTON BOX DIMENSIONS NOTE: The picture is only for reference. Please make the object as the standard. KEY PARAMETER LIST OF CARTON BOX Reel Type Length Width Height Pizza/Carton DD0002 TX