FSUSB31 Low-Power 1-Port Hi-Speed USB 2.0 (480Mbps) Switch

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1 Low-Power 1-Port Hi-Speed USB 2.0 (480Mbps) Switch Features Low On capacitance, 3.7pF (typical) Low On resistance, 6.5Ω (typical) Low power consumption (1µA maximum) 10µA maximum I CCT over and expanded control voltage range (V IN = 2.6V, V CC = 4.3V) Wide -3dB bandwidth, > 720MHz 8K I/O to ESD protection Power OFF protection when V CC = 0V, D+ / D- pins can tolerate up to 4.3V Packaged in: Pb-Free 8-lead MicroPak (1.6 x 1.6mm) Pb-Free 8-lead US8 Applications Cell phone, PDA, Digital Camera, and Notebook LCD Monitor, TV, and Set-Top Box Related Application Notes AN-6022 Using the FSUSB30/31 to Comply with USB 2.0 Fault Condition Requirements Description January 2007 The is a low-power, single-port, high-speed USB 2.0 switch. This part is configured as a single pole, single-throw switch and is optimized for switching or isolating a high-speed (480Mbps) source or a high-speed and full-speed (12Mbps) source. The is compatible with the requirements of USB2.0 and features an extremely low on capacitance (C ON ) of 3.7pF. The wide bandwidth of this device (>720MHz) exceeds the bandwidth needed to pass the third harmonic, resulting in signals with minimum edge and phase distortion. Superior channel-to-channel crosstalk minimizes interference. The contains special circuitry on the D+ / D- pins that allows the device to withstand an over-voltage condition. This device is also designed to minimize current consumption even when the control voltage applied to the pin is lower than the supply voltage (V CC ). This feature is especially valuable for ultra-portable applications such as cell phones, allowing for direct interface with the general purpose I/Os of the baseband processor. Other applications include port isolation and switching in portable cell phones, PDAs, digital cameras, printers, and notebook computers. Ordering Information Part Number Package Pb-Free Package Description K8X MAB08A Yes 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide L8X MAC08A Yes 8-Lead MicroPak, 1.6mm Wide Pb-Free package per JEDEC J-STD-020B. Application Diagram V CC Base Band Processor or FS USB Controller D+ D USB Connector HS USB Controller Figure 1. Typical Application Diagram MicroPak is a trademark of Fairchild Semiconductor Corporation. Rev

2 Connection Diagrams Figure 2. Pin Assignments for MicroPak Figure 3. Pin Assignments for US8 Pin Descriptions NC HSD D V CC NC HSD D HSD+ D+ 1 8 V CC HSD+ D+ Pin Name Description Bus Switch Enable D+, D, HSD+, HSD Data Ports NC No Connect Analog Symbol HSD+ D+ HSD D Control Figure 4. Analog Symbol Truth Table HIGH LOW Function Disconnect D+, D = HSD Rev

3 Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Minimum Maximum Unit V CC Supply Voltage -0.5V 4.6 V V S DC Input Voltage (1) -0.5V 4.6 V V IN DC Switch Voltage (1) HSD -0.5V V CC +0.3 V D+, D V I IK DC Input Diode Current -50 ma I OUT DC Output Current 50 ma T STG Storage Temperature C ESD Human Body Model Recommended Operating Conditions All Pins 7.5 kv I/O to 8 kv The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Minimum Maximum Unit V CC Supply Voltage V V IN Control Input Voltage (2) 0V V CC V Switch Input Voltage 0V V CC V T A Operating Temperature C Notes: 1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. DC switch voltage may never exceed 4.6V. 2. Control input must be held HIGH or LOW and it must not float. Rev

4 DC Electrical Characteristics All typical values are at 25 C unless otherwise specified. Symbol Parameter Conditions V CC (V) T A = 40 C to +85 C Min. Typ. Max. V IK Clamp Diode Voltage I IN = 18mA V V IH Input Voltage HIGH Notes: 3. Measured by the voltage drop between Dn, HSD, and Dn pins at the indicated current through the switch. On resistance is determined by the lower of the voltage on the two ports. 4. Guaranteed by characterization. Unit 3.0 to V V IL Input Voltage LOW 3.0 to V I IN Control Input Leakage V IN = 0V to V CC μa I OZ OFF State Leakage 0 HSD V CC μa I OFF Power OFF Leakage Current (D+, D ) V IN = 0.0V to 4.3V, V CC = 0V μa R ON Switch On Resistance (3) V IN = 0.4V, I ON = 8mA Ω ΔR ON (4) Delta R ON V IN = 0.4V, I ON = 8mA Ω R ON Flatness R ON Flatness (3) V IN = 0.0V 1.0V, I ON = 8mA Ω I CC I CCT Quiescent Supply Current Increase in I CC Current per Control Voltage and V CC Levels V IN = 0.0V or V CC, I OUT = μa V IN = 2.6V, V CC = 4.3V μa AC Electrical Characteristics All typical values are for V CC = 3.3V are at 25 C unless otherwise specified. Symbol Parameter Conditions V CC (V) t ON t OFF Turn-On Time, to Output Turn-Off Time, to Output V IN = 0.8V, R L = 50Ω, C L = 5pF V IN = 0.8V, R L = 50Ω, C L = 5pF T A = 40 C to +85 C Unit Figure Number Min. Typ. Max. 3.0 to ns Figure to ns t PD Propagation Delay (4) R L = 50Ω, C L = 5pF ns t BBM O IRR Xtalk BW Break-Before-Make Off Isolation (Non-Adjacent) Non-Adjacent Channel Crosstalk -3dB Bandwidth R L = 50Ω, C L = 5pF, V IN = 0.8V Figure 12 Figure 10 Figure to ns Figure 13 R T = 50Ω, f = 240MHz 3.0 to db Figure 16 R T = 50Ω, f = 240MHz 3.0 to db Figure 17 R T = 50Ω, C L = 0pF to 3.6 R T = 50Ω, C L = 5pF 550 MHz Figure 15 Rev

5 USB Hi-Speed Related AC Electrical Characteristics Symbol Parameter Conditions V CC (V) t SK(O) t SK(P) Note: 5. Guaranteed by design. Capacitance T A = 40 C to +85 C Min. Typ. Max. Channel-to-Channel Skew (5) C L = 5pF 3.0 to ps Skew of Opposite Transitions of the C L = 5pF 3.0 to ps Same Output (5) t J Total Jitter (5) t R = t F = 500ps at 480 Mbps R L = 50Ω, C L = 5pF, (PRBS = ) Symbol Parameter Conditions Unit 3.0 to ps T A = 40 C to +85 C Min. Typ. Max. Unit Figure Number Figure 10 Figure 14 Figure 10 Figure 14 Figure Number C IN Control Pin Input Capacitance V CC = 0V 1.0 pf Figure 19 C ON D1 n, D2 n, Dn On Capacitance V CC = 3.3, = 0V 3.7 pf Figure 18 C OFF D1 n, D2 n Off Capacitance V CC and = pf Figure 19 Rev

6 Typical Characteristics Gain (db) C L = 0pF V CC = 3.3V Frequency (MHz) Figure 5. Gain vs. Frequency Crosstalk (db) Off Isolation (db) V CC = 3.3V 0-10 V CC = 3.3V Frequency (MHz) Frequency (MHz) Figure 6. Off Isolation Figure 7. Crosstalk Rev

7 Test Diagrams HSD V IN V IN V ON R ON = V ON / I ON Dn V S = 0 to V CC Figure 8. On Resistance HSD V D+, D R S C L * R L I ON V OUT R L, R S, and C L are functions of the application environment (see AC Electrical tables for specific values). *C L includes test fixture and stray capacitance. NC ID n(off) V IN V S = 0 or V CC Each switch port is tested separately. Figure 9. Off Leakage t RISE = 500ps t FALL = 500ps 800mV Input: HSD+, HSD 400mV V OH Output: D+, D V OL A 90% 90% 10% 10% t PLH t PHL Figure 10. AC Test Circuit Load Figure 11. Switch Propagation Delay Waveforms (t PD ) t RISE = 2.5ns t FALL = 2.5ns Input V CC 90% V CC /2 90% V CC /2 10% 10% Output V OUT V OH 90% 90% V OL t ON t OFF Figure 12. Turn On / Turn Off Waveform (t ON / t OFF ) Rev

8 Test Diagrams (Continued) V O Control Input nput: HSDn HSDn S V CC V CC D+, D *C L includes test fixture and stray capacitance. t RISE = 500ps 800mV HSDn+ HSDn 400mV 90% 90% R L V OUT C L * Control Input V CC 0V V OUT Figure 13. Break-Before-Make (t BBM ) t FALL = 500ps 10% 10% Output1: t RISE = 500ps 800mV Input: D+, D 400mV V OH HSD1+ HSD1 V OL t R = t F = 2.5ns (10 90%) t D 90% 90% 10% 10% t PLH1 0.9 x V OUT t FALL = 500ps t PHL1 V OH V OH Output: D+, D Output1: D2+, D2 V OL V OL t PLH T SK(P) = t PHL t PLH Pulse Skew, T SK(P) t PHL t PLH2 t PHL2 T SK(O) = t PLH1 t PLH2 or t PHL1 t PHL2 Output Skew, T SK(OUT) Figure 14. Switch Skew Tests Network Analyzer R S V IN V S V R S and R T are functions of the application environment (see AC Electrical Tables for specific values). Figure 15. Bandwidth R T V OUT Rev

9 Test Diagrams (Continued) V V OFF-Isolation = 20 Log (V OUT / V IN ) R T Figure 16. Channel Off Isolation NC R T R S and R T are functions of the application environment (50, 75 or 100Ω). Crosstalk = 20 Log (V OUT / V IN ) Network Analyzer V IN R S V IN V OUT R T R S V S Network Analyzer R T V S V OUT Figure 17. Non-Adjacent Channel-to-Channel Crosstalk Capacitance Meter F = 240MHz Dn V = 0 or V CC Capacitance Meter Dn V = 0 or V CC HSDn F = 240MHz HSDn Figure 18. Channel On Capacitance Figure 19. Channel Off Capacitance Rev

10 Application Guidance: Meeting USB 2.0 Vbus Short Requirements In section of the USB 2.0 specification, it notes that USB devices must be able to withstand a Vbus short to D+ or D- when the USB devices is either powered off or powered on. The can be successfully configured to meet both these requirements. Power-Off Protection For a Vbus short circuit, the switch is expected to withstand such a condition for at least 24 hours. The has specially designed circuitry which prevents unintended signal bleed through as well as guaranteed system reliability during a power-down, overvoltage condition. The protection has been added to the common pins (D+, D-). HSD+ HSD- 100 Ohms V CC = 3.6 V Power-On Protection The USB 2.0 specification also notes that the USB device should be capable of withstanding a Vbus short during transmission of data. Fairchild recommends adding a 100Ω series resister between the switch VCC pin and supply rail to protect against this case. This modification works by limiting current flow back into the VCC rail during the over-voltage event so current remains within the safe operating range. In this application, the switch passes the full 5.25V input signal through to the selected output, while maintaining specified off isolation on the un-selected pins. D+ = 5.25V D- = 5.25V Figure 20. A 100Ω resistor in series with the V CC supply allows the to withstand a Vbus short when powered up For more information, see Applications Note AN-6022 Using the FSUSB30/ to Comply with USB 2.0 Fault Condition Requirements at Rev

11 Tape and Reel Specification Tape Format for MircoPak Package Designator L8X Tape Dimension Tape Section Dimensions are in millimeters unless otherwise specified. Number Cavities Cavity Status Cover Tape Status Leader (Start End) 125 (typ) Empty Sealed Carrier 5000 Filled Sealed Trailer (Hub End) 75 (typ) Empty Sealed Rev

12 Reel Dimension for MircoPak Dimensions are in inches (millimeters) unless otheriwise specified. Tape Size A B C D N W1 W2 W3 (8mm) 7.0 (177.8) (1.50) (13.00) (20.20) (55.00) / ( / 0.00) (14.40) W / (W / 1.00) Rev

13 Physical Dimensions Dimensions are in millimeters unless otherwise noted. Figure 21. Pb-Free, 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide Rev

14 Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 22. Pb-Free, 8-Lead MicroPak, 1.6mm Wide Rev

15 2006 Fairchild Semiconductor Corporation 15 Rev

FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch

FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch Features? Low On Capacitance: 3.7pF (Typical)? Low On Resistance: 6.5 (Typical)? Low Power Consumption: 1µA (Maximum) 10µA Maximum I CCT