FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch

Transcription

1 FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch Features? Low On Capacitance: 3.7pF (Typical)? Low On Resistance: 6.5 (Typical)? Low Power Consumption: 1µA (Maximum) 10µA Maximum I CCT over an Expanded Control Voltage Range (V IN = 2.6V, V CC = 4.3V)? Wide -3dB Bandwidth, >720MHz? 8kV ESD Protection? Power-Off Protection when V CC = 0V; D+/D- Pins can Tolerate up to 5.5V? Packaged in: 10-lead MicroPak (1.6 x 2.1mm) 10-lead MSOP 10-lead UMLP (1.4 x 1.8mm) Applications? Cell phone, PDA, Digital Camera, and Notebook LCD Monitor, TV, and Set-top Box Related Application Notes? AN-6022 Using the FSUSB30 / FSUSB31 to Comply with USB 2.0 Fault Condition Requirements Ordering Information Order Number Package Number Product Code Top Mark April 2013 Description The FSUSB30 is a low-power, two-port, high-speed USB 2.0 switch. Configured as a double-pole double-throw (DPDT) switch, it is optimized for switching between two high-speed (480Mbps) sources or a Hi-Speed and Full- Speed (12Mbps) source. The FSUSB30 is compatible with the requirements of USB2.0 and features an extremely low on capacitance (C ON ) of 3.7pF. The wide bandwidth of this device (720MHz), exceeds the bandwidth needed to pass the third harmonic, resulting in signals with minimum edge and phase distortion. Superior channel-to-channel crosstalk minimizes interference. The FSUSB30 contains special circuitry on the D+/ D- pins which allows the device to withstand an overvoltage condition when powered off. This device is also designed to minimize current consumption even when the control voltage applied to the S pin, is lower than the supply voltage (V CC ). This feature is especially valuable to ultraportable applications such as cell phones, allowing for direct interface with the general purpose I/Os of the baseband processor. Other applications include switching and connector sharing in portable cell phones, PDAs, digital cameras, printers, and notebook computers. Package Description FSUSB30L10X MAC010A FJ 10-Lead MicroPak, 1.6 x 2.1mm FSUSB30MUX MUA10A FSUSB30 10-Lead Molded Small Outline Package (MSOP), JEDEC MO- 187, 3.0mm Wide FSUSB30UMX MLP010A GJ 10-Lead, Quad, Ultrathin, MLP (UMLP) 1.4 x 1.8mm Set Top Box (STB) CPU or DSP Processor USB2.0 Controller 1D+ VCC 1D FSUSB30 D+ D USB Connector 2D+ DVR or Mass Storage Controller 2D Control S OE Figure 1. Typical Application MicroPak is a trademark of Fairchild Semiconductor Corporation. FSUSB30 Rev

2 Connection Diagrams Pad Assignments for MicroPak OE HSD1 HSD2 D V CC S HSD1+ HSD2+ D+ (Top View) Pad Assignments for DQFN NC V CC 1 14 S 2 13 OE HSD HSD1 NC 4 11 NC HSD HSD2 D+ 6 9 D 7 8 NC (Top Through View) Pin Assignment for MSOP S 1 10 V CC HSD OE Analog Symbol Pin Descriptions Pin Name Description OE Bus Switch Enable S Select Input D+, D, HSDn+, HSDn Data Ports NC No Connect Truth Table HSD1+ D+ HSD2+ HSD1 D HSD2 S Control OE S OE Function X HIGH Disconnect LOW LOW D+, D = HSD1 n HIGH LOW D+, D = HSD2 n HSD HSD1 D+ 4 7 HSD2 5 6 D (Top Through View) Pad Assignments for µmlp HSD1 HSD2 V CC 7 6 OE D 8 9 Sel D+ HSD1+ HSD2+ (Top Through View) FSUSB30 Rev

3 Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Minimum Maximum Unit V CC Supply Voltage V V CNTRL DC Input Voltage (1) -0.5 V CC V V SW DC Switch Voltage (1) D+,D- when V CC > V CC V HSDnX 0.5 V CC V D+,D- when V CC = V CC V I IK DC Input Diode Current -50 ma I OUT DC Output Current 50 ma T STG Storage Temperature C ESD Human Body Model All Pins 8 kv I/O to 8 kv Note: 1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. (2) Symbol Parameter Minimum Maximum Unit V CC Supply Voltage V V IN Control Input Voltage 0 V CC V V SW Switch Input Voltage 0 V CC V T A Operating Temperature C J A Thermal Resistance, 10 MicroPak 250 C/W Note: 2. Control input must be held HIGH or LOW and it must not float. FSUSB30 Rev

4 DC Electrical Characteristics All typical values are at 25 C unless otherwise specified. Symbol Parameter Conditions V CC (V) Notes: 3. Measured by the voltage drop between Dn, HSD1 n, HSD2 n pins at the indicated current through the switch. On resistance is determined by the lower of the voltage on the two ports. 4.Guaranteed by characterization. AC Electrical Characteristics All typical values are for V CC = 3.3V at 25 C unless otherwise specified. T A = 40 C to +85 C Min. Typ. Max. V IK Clamp Diode Voltage I IN = -18mA V V IH Input Voltage HIGH Unit 3.0 to V V V IL Input Voltage LOW 3.0 to V V I IN Control Input Leakage V SW = 0.0V to V CC µa I OZ OFF State Leakage 0 Dn, HSD1 n, HSD2 n V CC µa I OFF Power OFF Leakage Current (D+, D ) V SW = 0V to 4.3V, V CC = 0V µa R ON Switch On Resistance (3) V SW = 0.4V, I ON = -8mA V SW = 0V, I O = 30mA at 25 C R ON Delta R (4) ON V SW = 0.4V, I ON = -8mA R ON Flatness R ON Flatness (3) V SW = 0.0V - 1.0V, I ON = -8mA I CC I CCT Quiescent Supply Current Increase in I CC Current per Control Voltage V CNTRL = 0.0V or V CC, I OUT = µa V CNTRL (control input) = 2.6V µa Symbol Parameter Conditions V CC (V) Turn-On Time S, t ON OE to Output Turn-Off Time S, t OFF OE to Output HD1 n, HD2 n = 0.8V, R L = 50, C L = 5pF HD1 n, HD2 n = 0.8V, R L = 50, C L = 5pF T A = 40 C to +85 C Unit Figure Number Min. Typ. Max. 3.0 to ns Figure to ns Figure 9 t PD Propagation Delay (4) R L = 50, C L = 5pF ns t BBM O IRR Xtalk BW Break-Before-Make Off Isolation (Non-Adjacent) Non-Adjacent Channel Crosstalk 3dB Bandwidth R L = 50, C L = 5pF, V IN = 0.8V Figure 7 Figure to ns Figure 10 f = 240MHz, R T = to db Figure 13 R T = 50, f = 240MHz 3.0 to db Figure 14 R T = 50, C L = 0pF to 3.6 R T = 50, C L = 5pF 550 MHz Figure 12 FSUSB30 Rev

5 USB Hi-Speed Related AC Electrical Characteristics Symbol Parameter Conditions V CC (V) t SK(O) t SK(P) t J Total Jitter (5) t R = t F = 500ps at 480 Mbps R L = 50, C L = 5pF, (PRBS = ) Note: 5. Guaranteed by characterization. Capacitance T A = 40 C to +85 C Units Figure Number Min. Typ. Max. Channel-to-Channel Skew (5) R L = 50, C L = 5pF 3.0 to ps Skew of Opposite Transitions of the R L = 50, C L = 5pF 3.0 to ps Same Output (5) Symbol Parameter Conditions 3.0 to ps T A = 40 C to +85 C Min. Typ. Max. Units Figure 7 Figure 11 Figure 7 Figure 11 Figure Number C IN Control Pin Input Capacitance V CC = 0V 1.5 pf Figure 16 C ON D1 n, D2 n, Dn On Capacitance V CC = 3.3, OE = 0V 3.7 pf Figure 15 C OFF D1 n, D2 n Off Capacitance V CC and OE = pf Figure 16 FSUSB30 Rev

6 Typical Characteristics Gain (db) Off Isolation (db) Frequency Response Frequency (MHz) C L = 0pF, V CC = 3.3V Figure 2. Gain vs. Frequency Frequency Response Frequency (MHz) Figure 3. Off Isolation Crosstalk (db) Frequency Response Frequency (MHz) V CC = 3.3V Figure 4. Crosstalk FSUSB30 Rev

7 Test Diagrams HSDn V IN V ON R ON = V ON / I ON Select Dn V S = 0 to V CC Figure 5. On Resistance HSDn V IN V Sel R S D+, D C L Figure 7. AC Test Circuit Load R L I ON V OUT R L, R S, and C L are functions of the application environment (see AC Electrical tables for specific values). C L includes test fixture and stray capacitance. NC ID n(off) V IN Select V S = 0 or V CC Each switch port is tested separately. Figure 6. Off Leakage t RISE = 500ps t FALL = 500ps 800mV Input: HSDn+, 90% 90% HSDn 400mV 10% 10% V OH Output: D+, D V OL t PLH t PHL Figure 8. Switch Propagation Delay Waveforms A t RISE = 2.5ns t FALL = 2.5ns V CC Input S, OE 90% V CC /2 90% V CC /2 10% 10% Output V OUT V OH 90% 90% V OL t ON t OFF Figure 9. Turn-On / Turn-Off Waveform FSUSB30 Rev

8 V O Control Input HSDn HSDn S V CC V CC D+, D *C L includes test fixture and stray capacitance. Input: t RISE = 500ps 800mV HSDn+ HSDn 400mV Output: D+, D V OH V OL 90% 90% t PLH T SK(P) = t PHL t PLH Pulse Skew, T SK(P) R L V OUT C L * Control Input V CC 0V V OUT Figure 10. Break-Before-Make (t BBM ) t FALL = 500ps 10% 10% t PHL Output1: t RISE = 500ps 800mV Input: D+, D 400mV V OH HSD1+ HSD1 V OL V OH Output1: D2+, D2 V OL t PLH1 t R = t F = 2.5ns (10 90%) t D 90% 90% 10% 10% t PLH2 0.9 x V OUT t FALL = 500ps t PHL1 t PHL2 T SK(O) = t PLH1 t PLH2 or t PHL1 t PHL2 Output Skew, T SK(OUT) Figure 11. Switch Skew Tests FSUSB30 Network Analyzer R S V Sel V IN V S R S and R T are functions of the application environment (See AC Electrical Tables for specific values). Figure 12. Bandwidth R T V OUT FSUSB30 Rev

9 V Sel VSel FSUSB30 OFF-Isolation = 20 Log (V OUT / V IN ) FSUSB30 R T Figure 13. Channel Off Isolation NC R T R S and R T are functions of the application environment (50, 75 or 100Ω) Crosstalk = 20 Log (V OUT / V IN ) Network Analyzer Figure 14. Non-Adjacent Channel-to-Channel Crosstalk V IN V IN R S V OUT R T R S V S Network Analyzer R T V S V OUT Capacitance Meter f = 240MHz Dn FSUSB30 S V Sel = 0 or V CC Capacitance Meter Dn FSUSB30 S V Sel = 0 or V CC D1n, D2n f = 240MHz D1n, D2n Figure 15. Channel On Capacitance Figure 16. Channel Off Capacitance FSUSB30 Rev

10 Application Guidance: Meeting USB 2.0 Vbus Short Requirements In section of the USB 2.0 specification, it notes that USB devices must be able to withstand a Vbus short to D+ or D- when the USB devices is either powered off or powered on. The FSUSB30 can be successfully configured to meet both these requirements. Power-Off Protection For a Vbus short circuit, the switch is expected to withstand such a condition for at least 24 hours. The FSUSB30 has specially designed circuitry which prevents unintended signal bleed through as well as guaranteed system reliability during a power-down, overvoltage condition. The protection has been added to the common pins (D+, D-). HSD+ HSD+ HSD- HSD- 100 Ohms VCC= 3.6 V FSUSB30 Power-On Protection The USB 2.0 specification also notes that the USB device should be capable of withstanding a Vbus short during transmission of data. Fairchild recommends adding a 100 series resister between the switch VCC pin and supply rail to protect against this case. This modification works by limiting current flow back into the V CC rail during the over-voltage event so current remains within the safe operating range. In this application, the switch passes the full 5.25V input signal through to the selected output, while maintaining specified off isolation on the un-selected pins. D+ = 5.25V D- = 5.25V Figure 17. Adding 100 resistor in series with the V CC supply allows the FSUSB30 to withstand a Vbus short when powered up For more information, see Applications Note AN-6022 Using the FSUSB30 to Comply with USB 2.0 Fault Condition Requirements at FSUSB30 Rev

11 Tape and Reel Specifications Tape Format for DQFN Package Designator BQX Tape Section Tape Dimensions Dimenions are in millimeters unless otherwise specified. Number Cavities Cavity Status Cover Tape Status Leader (Start End) 125 (typ) Empty Sealed Carrier 2500/3000 Filled Sealed Trailer (Hub End) 75 (typ) Empty Sealed FSUSB30 Rev

12 Reel Dimensions for DQFN Dimensions are in inches (millimeters) unless otherwise specified. Tape Size A B C D N W1 W2 (12mm) 13.0 (330) (1.50) (13.00) (20.20) (178) (12.4) (18.4) FSUSB30 Rev

13 Tape Dimensions for MSOP Dimensions are in inches (millimeters) unless otherwise specified. Reel Dimensions for MSOP Dimensions are in inches (millimeters) unless otherwise specified Tape Size A B C D N W1 W2 W3 (12mm) 13 (330) (1.5) (13) (20.2) (178) (12.4) (18.4) ( ) FSUSB30 Rev

14 Physical Dimensions 2X PIN1 IDENT IS 2X LONGER THAN OTHER LINES 0.05 C DETAIL A (0.29) 0.10 C C 0.50 TOP VIEW SIDE VIEW D BOTTOM VIEW (0.36) A X 0.15 B X X C 0.55 MAX 0.05 C 0.10 C A B 0.05 C ALL FEATURES (0.15) 1.12 (0.11) (0.35) 10X (0.25) 10X RECOMMENDED LAND PATTERN (0.20) DETAIL A 2X SCALE KEEPOUT ZONE, NO TRACES OR VIAS ALLOWED NOTES: A. PACKAGE CONFORMS TO JEDEC REGISTRATION MO-255, VARIATION UABD. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, D. PRESENCE OF CENTER PAD IS PACKAGE SUPPLIER DEPENDENT. IF PRESENT IT IS NOT INTENDED TO BE SOLDERED AND HAS A BLACK OXIDE FINISH. E. DRAWING FILENAME: MKT-MAC10Arev5. Figure Lead MicroPak, 1.6 x 2.1mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: FSUSB30 Rev

15 Physical Dimensions Figure Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: FSUSB30 Rev

16 Physical Dimensions 2X 0.15 C PIN#1 IDENT 0.10 C 0.08 C 0.05 DETAIL A PIN#1 IDENT TOP VIEW 0.55 MAX. SEATING PLANE SIDE VIEW (9X) BOTTOM VIEW A C B C 2X (10X) 0.10 C A B 0.05 C (9X) (10X) RECOMMENDED LAND PATTERN (10X) X OPTIONAL MINIMIAL TOE LAND PATTERN NOTES: A. PACKAGE DOES NOT FULLY CONFORM TO JEDEC STANDARD. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, D. LAND PATTERN RECOMMENDATION IS BASED ON FSC DESIGN ONLY. E. DRAWING FILENAME: MKT-UMLP10Arev DETAIL A SCALE : 2X 0.10 LEAD OPTION 1 SCALE : 2X PACKAGE EDGE LEAD OPTION 2 SCALE : 2X Figure Lead, Quad, Ultrathin Molded Leadless Package (UMLP), 1.4 x 1.8mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: FSUSB30 Rev

17 FSUSB30 Rev