Precision, Quad, SPST Analog Switches
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1 -0; Rev ; /0 Precision, Quad, SPST nalog Switches General escription The are precision, quad, single-pole single-throw (SPST) analog switches. The MX has four normally closed (N), and the MX has four normally open () switches. The MX has two and two N switches. ll three parts offer low on resistance (less than Ω), guaranteed to match within Ω between channels and to remain flat over the analog signal range ( Ω max). They also offer low leakage (less than 0p at + and less than 6n at +8 ) and fast switching (turn-on time less than 7ns and turn-off time less than ns). The are fabricated with Maxim s new improved V silicon-gate process. esign improvements guarantee extremely low charge injection (0p), low power consumption (µw), and electrostatic discharge (ES) greater than 00. The V maximum breakdown voltage allows rail-to-rail analog signal handling. These monolithic switches operate with a single positive supply (+ to +) or with split supplies (±.V to ±) while retaining MOS-logic input compatibility and fast switching. MOS inputs provide reduced input loading. pplications Sample-and-Hold ircuits Military Radios Guidance and ontrol Systems ommunications Systems Heads-Up isplays attery-operated Systems Test Equipment PX, PX Features Low On Resistance < Ω Typical (Ω Max) Guaranteed Matched On Resistance etween hannels < Ω Guaranteed Flat On Resistance Over nalog Signal Range Ω Max Guaranteed harge Injection < 0p Guaranteed Off-hannel Leakage < 6n at +8 ES Guaranteed > 00 per Method 0.7 Single-Supply Operation (+ to +) ipolar-supply Operation (±.V to ±) TTL-/MOS-Logic ompatibility Rail-to-Rail nalog Signal Handling apability Ordering Information PRT TEMP RNGE PIN-PKGE MXPE 0 to Plastic IP MXSE 0 to Narrow SO MX/ 0 to +70 ice* MXEGE -0 to +8 6 QFN MXEPE -0 to +8 6 Plastic IP MXESE -0 to +8 6 Narrow SO MXEJE -0 to +8 6 ERIP MXMJE - to + 6 ERIP Ordering Information continued at end of data sheet. *ontact factory for availability and processing to MIL-ST-88. Pin onfigurations/functional iagrams/truth Tables TOP VIEW IN OM N MX 6 IN OM N IN OM MX 6 IN OM IN OM MX 6 IN OM N N OM N OM OM OM OM N OM IP/SO MX LOGI SWITH 0 ON Pin onfiguration continued at end of data sheet. IP/SO MX LOGI SWITH 0 ON SWITHES SHOWN FOR LOGI "0" INPUT LOGI 0 IP/SO MX SWITHES, ON SWITHES, ON Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/allas irect! at , or visit Maxim s website at
2 SOLUTE MXIMUM RTINGS Voltage Referenced to...v...v...( - 0.V) to ( + 0.V) igital Inputs, V OM, V N, V (Note )...( - V) to ( + V)...or 0m (whichever occurs first) urrent (any terminal)...0m Peak urrent OM_, _, N_ (pulsed at ms, 0% duty cycle max)...00m ES per Method >00 Note : Note : ontinuous Power issipation (T = +70 ) (Note ) Plastic IP (derate 0.mW/ above +70 )...8mW Narrow SO (derate 8.70mW/ above +70 )...66mW QFN (derate.mw/ above +70 )...8mW ERIP (derate 0.00mW/ above +70 )...800mW Operating Temperature Ranges: MX...0 to +70 MX_E...-0 to +8 MX_MJE...- to + Storage Temperature Range...-6 to +0 Lead Temperature (soldering, 0s) Signals on N_, _, OM_, or IN_ exceeding or will be clamped by internal diodes. Limit forward diode current to maximum current rating. ll leads are soldered or welded to P board. Stresses beyond those listed under bsolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELETRIL HRTERISTIS ual Supplies ( = V, = -V, = V, =, V INH =.V, V INL = 0.8V, T = T MIN to T MX, unless otherwise noted.) SWITH nalog Signal Range On Resistance PRMETER SYMOL V OM_, V _, V N_ R ON (Notes, ) I OM = -0m, V _ or V N_ = ±8.V, =.V, = -.V ONITIONS T = +, E M T = T MIN to T MX MIN TYP MX (Note ) UNITS V Ω On Resistance Match etween hannels (Note ) R ON I OM = -0m, V _ or V N_ = ±, = V, = - V T = T MIN to T MX Ω On Resistance Flatness (Note ) R ON I OM = -0m, V _ or V N_ = ±V, = V, = - V T = T MIN to T MX Ω Off Leakage urrent (_ or N_) I I N V OM = -.V, V _ or V N_ =.V, = 6.V, = -6.V T = T MIN to T MX, E M n OM_ Off Leakage urrent I N() V OM = -.V, V _ or V N_ =.V, = 6.V, = -6.V T = T MIN to T MX, E M n OM_ On Leakage urrent I OM(ON) V OM = ±.V, V _ or V N_ = ±.V, = 6.V, = -6.V T = T MIN to T MX, E M n
3 ELETRIL HRTERISTIS ual Supplies (continued) ( = V, = -V, = V, =, V INH =.V, V INL = 0.8V, T = T MIN to T MX, unless otherwise noted.) INPUT Input urrent with Input Voltage High Input urrent with Input Voltage Low SUPPLY Power-Supply Range Positive Supply urrent Negative Supply urrent Logic Supply urrent Ground urrent YNMI Turn-On Time Turn-Off Time PRMETER reak-efore-make Time elay harge Injection Off Isolation (Note 6) rosstalk (Note 7) SYMOL I INH I INL I+ I- I L I t ON t t Q OIRR ll channels on or off, V IN = or V, = 6.V = -6.V ll channels on or off, V IN = or V, = 6.V = -6.V ll channels on or off, V IN = or V, = 6.V = -6.V ll channels on or off, V IN = or V, = 6.V = -6.V MX only, Figure, R L = 00Ω, L = pf L =.0nF, V GEN =, R GEN = 0Ω, Figure R L = 0Ω, L = pf, f = MHz, Figure R L = 0Ω, L = pf, f = MHz, Figure 6 ONITIONS IN_ =.V, all others = 0.8V IN_ = 0.8V, all others =.V Figure, V OM = ± Figure, V OM = ± T = T MIN to T MX T = T MIN to T MX T = T MIN to T MX T = T MIN to T MX T = T MIN to T MX T = T MIN to T MX MIN TYP MX (Note ) ±. ± UNITS µ µ V µ µ µ µ ns ns ns p d d N or apacitance () f = MHz, Figure 7 pf OM Off apacitance (OM) f = MHz, Figure 7 pf On apacitance (OM) f = MHz, Figure 8 pf
4 ELETRIL HRTERISTIS Single Supply ( = V, =, = V, =, V INH =.V, V INL = 0.8V, T = T MIN to T MX, unless otherwise noted.) 0 V PRMETER SYMOL ONITIONS MIN TYP MX (Note ) UNITS SWITH V OM_, nalog Signal Range V _, (Notes, ) V N I OM = -0m, 0 80 V N_ or V _ =.8V, Ω hannel On Resistance R ON = 0.8V T = T MIN to T MX 00 SUPPLY Positive Supply urrent I+ Negative Supply urrent I- Logic Supply urrent =.V, all channels on or off, V IN = or V =.V, all channels on or off, V IN = or V T = T MX T = T MX - =.V, I L all channels on or off, V IN = or V T = T MX - µ µ µ Ground urrent =.V, I all channels on or off, V IN = or V T = T MX - µ YNMI Turn-On Time t ON Figure, 7 0 V _ or V N_ = 8V T = T MIN to T MX Turn-Off Time t Figure, V _ or V N_ = 8V T = T MIN to T MX 0 ns ns reak-efore-make Time elay t R L = 00Ω, MX only, Figure, L = pf harge Injection Q Figure 8, L =.0nF, V GEN =, R GEN = ns 0 p Note : The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet. Note : Guaranteed by design. Note : R ON = R ON max - R ON min. On-resistance match between channels and flatness are guaranteed only with bipolar-supply operation. Note 6: See Figure. Off Isolation = 0 log 0 [ V OM (V N or V ) ], V OM = output, V N or V = input to off switch. Note 7: etween any two switches. See Figure 6.
5 Typical Operating haracteristics (, unless otherwise noted.) RON (Ω) RON (Ω) ON RESISTNE vs. V OM N POWER-SUPPLY VOLTGE : = V, = -V : =, = - : = V, = -V : =, = V OM (V) ON RESISTNE vs. V OM (SINGLE-SUPPLY) = V = T = + T = +8 MX-0 MX-0 RON (Ω) LEKGE (n) ON RESISTNE vs. V OM N TEMPERTURE = V = -V T = + T = +8 T = V OM (V) LEKGE URRENTS vs. TEMPERTURE = 6.V = -6.V V OM = ±V V N OR V = +V MX-0 MX-0 RON (Ω) ON LEKGE (n) ON RESISTNE vs. V OM N TEMPERTURE = = V = = V = V OM (V) ON LEKGE URRENTS vs. TEMPERTURE = 6.V = -6.V V OM = ±V V N OR V = ±V MX-0 MX V OM (V) Q (p) = V = -V = V HRGE INJETION vs. NLOG VOLTGE L = nf V N TEMPERTURE ( ) MX-07 I+, I-, IL (µ) SUPPLY URRENT vs. TEMPERTURE : I+ at = 6.V : I- at = -6.V : I L at = V + + TEMPERTURE ( ) MX V OM (V) TEMPERTURE ( )
6 Pin escription IP/SO PIN QFN NME, 6,, 8,, 7, 6 INN Logic ontrol Input,, 0, 7 6,, 8, OMOM nalog Switch ommon Terminal,,, 6,,, or N nalog Switch or N Terminal Negative-Supply Voltage Input Ground 0 V L Logic Supply Voltage pplications Information Operation with Supplies Other than ±V The main limitation of supply voltages other than ±V is reduced analog-signal range. The MX/ MX/MX operate with ±V to ± bipolar supplies. The Typical Operating haracteristics graphs show typical on resistance (R ON ) for ±V, ±, and ±V supplies. (Switching times increase by a factor of two or more for operation at ±V.) The MX/ MX/MX can operate from + to + unipolar supplies. Each device can also be powered from unbalanced supplies such as +V and -V. onnect to when operating with a single supply. must be connected to +V to be TTL compatible or to for MOS-logic input levels. FUNTION Positive-Supply Voltage Input onnected To Substrate Overvoltage Protection Proper power-supply sequencing is recommended for all MOS devices. o not exceed the absolute maximum ratings because stresses beyond the listed ratings may cause permanent damage to the devices. lways sequence first, followed by,, and logic inputs. If power-supply sequencing is not possible, add two small signal diodes in series with the supply pins for overvoltage protection (Figure ). dding diodes reduces the analog signal range to V below and V below, but low switch resistance and low-leakage characteristics are unaffected. evice operation is unchanged, and the difference between to should not exceed +V. _ OM_ V g Figure. Overvoltage Protection Using External locking iodes 6
7 Test ircuits/timing iagrams LOGI INPUT SWITH OUTPUT +V 0% t ON Figure. Switching-Time Test ircuit LOGI INPUT SWITH OUTPUT (VO) SWITH OUTPUT (VO) +V V O t tr < 0ns tf < 0ns 0.V 0 0.V 0 LOGI INPUT WVEFORMS INVERTE FOR SWITHES THT HVE THE OPPOSITE LOGI SENSE. 0% t 0.V0 t 0.V0 SWITH INPUT LOGI INPUT V OM = + V OM = + LOGI INPUT V OM OM OR N IN +V +V -V REPET TEST FOR IN N S, FOR LO ONITIONS, SEE Electrical haracteristics R L 00Ω L INLUES FIXTURE N STRY PITNE. V O = V OM ( RL ) RL + RON OM_ OM_ IN_ +V +V _ -V N_ R L L INLUES FIXTURE N STRY PITNE. V O L SWITH OUTPUT R L = 00Ω L = pf L pf R L V O V O L Figure. reak-efore-make Test ircuit (MX only) 7
8 Test ircuits/timing iagrams (continued) V GEN SIGNL GENERTOR 0dm NLYZER R GEN R L OM +V OM Figure. harge-injection Test ircuit OM +V N OR IN +V N OR -V V IN = +V +V IN L,.V V O V O IN IN SIGNL GENERTOR 0dm NLYZER,.V R L N0 +V OM IN ON ON Q = ( V O )( L ) +V V O N0 IN OM IN EPENS ON SWITH ONFIGURTION; INPUT POLRITY ETERMINE Y SENSE OF SWITH. 0Ω N,.V -V -V Figure. Off-Isolation Test ircuit Figure 6. rosstalk Test ircuit 8
9 Test ircuits/timing iagrams (continued) PITNE METER f = MHz +V OM N OR Figure 7. hannel-off apacitance TOP VIEW OM 6 IN +V -V IN IN OM.V PITNE METER f = MHz Pin onfigurations (continued) OM IN IN OM 6 +V OM N OR +V -V Figure 8. hannel-on apacitance Test ircuit IN N N MX 0 V L MX 0 V L N N OM OM OM OM OM IN IN OM QFN 6 N MX 0 V L N OM OM
10 Ordering Information (continued) PRT TEMP RNGE PIN-PKGE MXPE 0 to Plastic IP MXSE 0 to Narrow SO MX/ 0 to +70 ice* MXEGE -0 to +8 6 QFN MXEPE -0 to +8 6 Plastic IP MXESE -0 to +8 6 Narrow SO MXEJE -0 to +8 6 ERIP MXMJE - to + 6 ERIP MXPE 0 to Plastic IP MXSE 0 to Narrow SO MX/ 0 to +70 ice* MXEGE -0 to +8 6 QFN MXEPE -0 to +8 6 Plastic IP MXESE -0 to +8 6 Narrow SO MXEJE -0 to +8 6 ERIP MXMJE - to + 6 ERIP *ontact factory for availability and processing to MIL-ST-88. hip Topography OM OM IN IN 0.080" (.0mm) OM OM 0.07" (.6mm) TRNSISTOR OUNT: 6 SUSTRTE ONNETE TO MX MX MX PIN NME PIN NME PIN NME N N N N N N 0
11 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to L e α E E e e IM E E e e e L α MIN INHES MX S 0.00 S MILLIMETERS MIN MX S 7.6 S 6-PIN PLSTI UL-IN-LINE PKGE E H IM E e H h L α MIN INHES MX S MILLIMETERS MIN MX S e 0.7mm 0.00in. h x L α 6-PIN PLSTI SMLL-OUTLINE (NRROW) PKGE
12 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to L Q S e L S α E E IM E E e L L Q S S α MIN INHES MX S MILLIMETERS MIN MX S 6-PIN ERMI UL-IN-LINE PKGE
13 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to L QFN.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 0 San Gabriel rive, Sunnyvale, Maxim Integrated Products Printed US is a registered trademark of Maxim Integrated Products.
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