Features. Functional Diagrams, Pin Configurations, and Truth Tables
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1 Features Low On-Resistance (Ω typ) Minimizes Distortion and Error Voltages Low Glitching Reduces Step Errors in Sample-and-Holds. Charge Injection, pc typ Single-Supply Operation (+.V to +1V) Improved Second Sources for MAX01/MAX0 On-Resistance Matching Between Channels, <Ω On-Resistance Flatness, <Ω max Low Off-Channel Leakage, +8 o C TTL/CMOS Compatible Fast Switching Speed, t ON < 10ns Guaranteed Break-Before-Make action (PS0 only) eliminates momentary crosstalk Rail-to-Rail Analog Signal Dynamic Range Low Power Consumption, <µw MSOP Package minimizes board area Ω. ΩΩ Functional Diagrams, Pin Configurations, and Truth Tables Top Views PS01 PS0 PS0 Switches shown for logic 0 input 1 PS818A 0/9/99
2 Absolute Maximum Ratings Thermal Information Voltages Referenced to Continuous Power Dissipation V to +1V Plastic DIP (derate mw/ º C above +0 º C) mW V, V, V, V (Note 1) V to () +V Narrow SO (derate mw/ º C above +0 º C) mW or 0mA, whichever occurs first MSOP (derate mw/ º C above +0 º C) mW Current (any terminal) mA Storage Temperature º C to +10 º C Peak Current,,, Lead Temperature (soldering, 10s) º C (pulsed at 1ms, 10% duty cycle) mA Note 1: Signals on,,, or exceeding or ESD per Method >00 are clamped by internal diodes. Limit forward diode current to 0mA maximum. Caution: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Electrical Specifications - Single +V Supply ( = V +10%, =, V H =.V, V L = 0.8V) Ω µ PS818A 0/9/99
3 Electrical Specifications - Single +V Supply (continued) (V + = V ±10%, =, V H =.V, V L = 0.8V) Ω Ω Ω Ω µ Notes: 1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet.. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.. Guaranteed by design. R ΟΝ = R ΟΝ max. R ΟΝ min.. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +ºC.. Off Isolation = 0log 10 [V / (V or V )]. See Figure. PS818A 0/9/99
4 Electrical Specifications - Single +1V Supply ( = 1V ±10%, =, V H = V, V L = 0) Ω Ω µ Electrical Specifications - Single +.V Supply ( =.V ±10%, =, V H =.V, V L = 0.8V) Ω Ω µ PS818A 0/9/99
5 Test Circuits/Timing Diagrams V = V +V or R L 1kΩ C L pf Switch Output +V 0% 90% t r <0ns t f <0ns t 90% t ON C L ILUDES FIXTURE AND STRAY CAPACITAE R = V L ( R L + R ON ) Figure. Switching Time LOGIC PUT WAVEFORMS VERTED FOR SWITCHES THAT HAVE OPPOSITE LOGIC +V 1 V OUT R L C L Ω00Ω pf Switch Output +V 0% 90% 90% t D C L ILUDES FIXTURE AND STRAY CAPACITAE. Figure. Break-Before-Make Interval (PS0 only) +V V GEN R GEN or C L 1nF ON ON Q = ( )(C L ) POLARITY DEPENDS ON OR SWITCH FUTION Figure. Charge Injection PS818A 0/9/99
6 Test Circuits/Timing Diagrams (continued) +V +V Signal Generator 0dBm 1 N01 0Ω Analyzer R L or or.v Analyzer or.v R L 0ΩΩ 1 N0 or.v Figure. Off Isolation Figure. Crosstalk +V +V Capacitance Meter f = 1kHz or or.v Capacitance Meter f = 1kHz or or.v Figure. Channel-Off Capacitance Figure 8. Channel-On Capacitance PS818A 0/9/99
7 Applications Information Positive Supply Overvoltage Protection Proper power-supply sequencing is recommended for all CMOS devices. Do not exceed the absolute maximum ratings, because stresses beyond the listed ratings may cause permanent damage to the devices. Always sequence on first, and then logic inputs. If power-supply sequencing is not possible, add two small signal diodes or two current limiting resistors in series with the supply pins for overvoltage protection (Figure 1). Adding diodes reduces the analog signal range, but low switch resistance and low leakage characteristics are unaffected. V g V- Figure 1. Overvoltage protection is accomplished by using two external blocking diodes or two current limiting resistors. Pericom Semiconductor Corporation 80 Bering Drive San Jose, CA Fax (08) PS818A 0/9/99
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79797979797979797979797979 Features Low On-Resistance (Ω typ) Minimizes Distortion and Error Voltages Low Glitching Reduces Step Errors in Sample-and-Holds. Charge Injection, pc typ Single Supply (+V to
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