High-Speed, Low-Voltage, CMOS Analog Multiplexers/Switches

Transcription

1 9-52; Rev ; 7/99 igh-speed, ow-voltage, CMOS nalog General Description The are high-speed, lowvoltage, CMOS analog ICs configured as an 8-channel multiplexer (M467), two 4-channel multiplexers (M468), and three single-pole/double-throw (SPDT) switches (M469). These CMOS devices can operate continuously with a +2V to +5.5V single supply. Each switch can handle Rail-to-Rail analog signals. The off-leakage current is only n at and n at T = +85 C. ll digital inputs have.8v to 2.4V logic thresholds, euring TT/CMOS-logic compatibility when using a single +5V supply. pplicatio attery-operated Equipment udio/video Signal Routing ow-voltage Data-cquisition Systems Communicatio Circuits Features Fast Switching Times 5 ton t OFF Pin Compatible with Industry-Standard 74C45/74C452/74C453 and M458/M4582/M4583 Guaranteed On-Resistance Ω max (+5V Supply) 2Ω max (+3V Supply) Guaranteed Ω On-Resistance Match etween Channels (single +5V supply) Guaranteed ow Off-eakage Current: n at +25 C Guaranteed ow On-eakage Current: n at +25 C +2V to +5.5V Single-Supply Operation TT/CMOS-ogic Compatible ow Crosstalk: <-96d igh Off-Isolation: <-93d ow Distortion: <.7% (6Ω) Ordering Information PRT TEMP. RNGE PIN-PCKGE M467CUE C to +7 C 6 TSSOP M467CSE C to +7 C 6 Narrow SO M467CPE C to +7 C 6 Plastic DIP Ordering Information continued at end of data sheet. Pin Configuratio/Functional Diagrams TOP VIEW M467 M468 M Y 6 Y Y Y 2 5 Y 3 4 Y 3 4 Z Y3 4 3 Z Y 5 2 Z 5 2 ENE 6 ENE 6 3 ENE 6 N.C. 7 OGIC N.C. 7 OGIC N.C C C DIP/SO/TSSOP DIP/SO/TSSOP DIP/SO/TSSOP Rail-to-Rail is a registered trademark of Nippon Motorola, td. Maxim Integrated Products For free samples & the latest literature: or phone For small orders, phone

2 igh-speed, ow-voltage, CMOS nalog SOUTE MIMUM RTINGS Voltages Referenced to,,, C, or Enable...-.3V to +6V Voltage into ny nalog Terminal (Note )...-.3V to ( +.3V) Continuous Current into ny Terminal...±75m Peak Current, _, Y_, Z_ (pulsed at ms, % duty cycle)...±2m Continuous Power Dissipation (T = +7 C) TSSOP (derate 6.7mW/ C above +7 C)...533mW Stresses beyond those listed under bsolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditio beyond those indicated in the operational sectio of the specificatio is not implied. Exposure to absolute maximum rating conditio for extended periods may affect device reliability. EECTRIC CRCTERISTICSSingle +5V Supply Narrow SO (derate 8.7mW/ C above +7 C)...696mW Plastic DIP (derate.53mw/ C above +7 C)...842mW Operating Temperature Ranges M46_C... C to +7 C M46_E...-4 C to +85 C Storage Temperature Range C to +5 C ead Temperature (soldering, sec)...+3 C Note : Voltages exceeding or on any analog signal terminal are clamped by internal diodes. imit forward-diode current to maximum current rating. ( = +4.5V to +5.5V, V _ = 2.4V, V _ =.8V, T = T MIN to T M, unless otherwise noted. Typical values are at.) (Note 2) PRMETER SYMO CONDITIONS MIN TYP M UNITS NOG SWITC nalog-signal Range V, V Y, V Z V Switch On-Resistance R ON = 4.5V; I, I Y, I Z = m; 8 V, V Y, V Z = 3V 3 Ω Switch On-Resistance Match etween Channels (Note 3) Switch On-Resistance Flatness (Note 4) R ON R FT(ON) = 4.5V; I, I Y, I Z = m; V, V Y, V Z = 3V = 4.5V; I, I Y, I Z = m; V, V Y, V Z = V, 2V, 3V.2.2 Ω Ω _, Y_, Z_ Off-eakage Current (Note 5) I _(OFF), I Y_(OFF), I Z_(OFF) = 5.5V; V _, V Y_, V Z_ = 4.5V, V; V, V Y, V Z = V, 4.5V n, Y, Z Off-eakage Current (Note 5) I (OFF), I Y(OFF), I Z(OFF) = 5.5V; V EE = -5.5V; V _, V Y_, V Z_ = 4.5V, V; V, V Y, V Z = V, 4.5V n, Y, Z On-eakage Current (Note 5) I (ON), I Y(ON), I Z(ON) = 5.5V; V, V Y, V Z = V, 4.5V; V _, V Y_, V Z_ = V, 4.5V or floating n DIGIT I/O V, V, Input Voltage igh V C, 2.4 V ENE V, V, Input Voltage ow V C, V ENE.8 V V 2

3 igh-speed, ow-voltage, CMOS nalog EECTRIC CRCTERISTICSSingle +5V Supply (continued) ( = +4.5V to +5.5V, V _ = 2.4V, V _ =.8V, T = T MIN to T M, unless otherwise noted. Typical values are at.) (Note 2) PRMETER SYMO CONDITIONS MIN TYP M UNITS Input Current igh Input Current ow SWITC DYNMIC CRCTERISTICS Enable Turn-On Time Enable Turn-Off Time ddress Traition Time reak-efore-make Time t ON t OFF t TRNS t M V _, V Y_, V Z_ = 3V; R = 3Ω; C = ; Figure 3 V _, V Y_, V Z_ = 3V; R = 3Ω; C = ; Figure 3 V _, V Y_, V Z_ = 3V; R = 3Ω; C = ; Figure 2 V _, V Y_, V Z_ = 3V; R = 3Ω; C = ; Figure Charge Injection Q C = nf, R S =, V S =, Figure 5 3 pc Input Off-Capacitance Output Off-Capacitance C (OFF), M V C Y(OFF), _, V Y_, V Z_ = ; f = Mz; M468 5 Figure 7 C Z(OFF) M Output On-Capacitance C (ON), M V C Y(ON), _, V Y_, V Z_ = ; f = Mz; M468 2 Figure 7 C Z(ON) M Off-Isolation V ISO R = 5Ω, f = kz, Figure 6-93 Channel-to-Channel Crosstalk Total armonic Distortion µ I, I, I C, V, V, V C = V ENE = -.3 I ENE µ I, I, I C, V, V, V C = V ENE = -.3 I ENE C _(OFF), C Y_(OFF), C Z_(OFF) TD V _, V Y_, V Z_ = ; f = Mz; Figure 7 5 V CT R = 5Ω, f = kz, Figure 6-96 R = 6Ω, Vp-p, f = 2z to 2kz.7 POWER SUPPY Power-Supply Range V Power-Supply Current I CC = 5.5V; V, V, V C, V ENE = or - - µ pf pf pf d d % 3

4 igh-speed, ow-voltage, CMOS nalog EECTRIC CRCTERISTICSSingle +3.3V Supply ( = +3V to +3.6V, V _ = 2.V, V _ =.5V, T = T MIN to T M, unless otherwise noted. Typical values are at.) (Note 2) PRMETER NOG SWITC nalog-signal Range Switch On-Resistance _, Y_, Z_ Off-eakage Current (Note 5), Y, Z Off-eakage Current, Y, Z On-eakage Current DIGIT I/O Input Voltage igh Input Voltage ow Input Current igh SYMO V _, V Y_, V Z_, V, V Y, V Z R ON I _(OFF), I Y_(OFF), I Z_(OFF) I (OFF), I Y(OFF), I Z(OFF) I (ON), I Y(ON), I Z(ON) V, V, V C, V ENE V, V, V C, V ENE I, I, I C, I ENE = 3V; I, I Y, I Z = m; V, V Y, V Z =.5V = 3.6V; V _, V Y_, V Z_ = V, 3V; V, V Y, V Z = 3V, V = 3.6V; V _, V Y_, V Z_ = V, 3V; V, V Y, V Z = 3V, V = 3.6V; V, V Y, V Z = 3V, V; V _, V Y_, V Z_ = 3V, V, or floating CONDITIONS MIN TYP M UNITS V Ω 2. V.5 V V, V, V C = V ENE = -.3 µ n n n Input Current ow I, I, I C, I ENE V, V, V C = V ENE = -.3 µ SWITC DYNMIC CRCTERISTICS Enable Turn-On Time t ON V _, V Y_, V Z_ =.5V; R = 3Ω; C = ; Figure Enable Turn-Off Time t OFF V _, V Y_, V Z_ =.5V; R = 3Ω; C = ; Figure ddress Traition Time t TRNS V _, V Y_, V Z_ =.5V/; R = 3Ω; C = ; Figure reak-efore-make Time t M V _, V Y_, V Z_ =.5V; R = 3Ω; C =.2.5 Charge Injection Q C = nf, R S =, V S =, Figure 5 3 pc POWER SUPPY Power-Supply Current I CC = 3.6V, V, V, V C, V ENE = or µ 4

5 igh-speed, ow-voltage, CMOS nalog EECTRIC CRCTERISTICSSingle +2.5V Supply ( = +2.5V, T = T MIN to T M, unless otherwise noted. Typical values are at.) (Note 2) PRMETER NOG SWITC Switch On-Resistance SYMO R ON SWITC DYNMIC CRCTERISTICS Enable Turn-On Time Enable Turn-Off Time ddress Traition Time t ON t OFF t TRNS = 2.5V; I, I Y, I Z = m; V, V Y, V Z =.2V V _, V Y_, V Z_ = V; R = 3Ω; C = ; Figure 3 V _, V Y_, V Z_ = V; R = 3Ω; C = ; Figure 3 V _, V Y_, V Z_ = V; R = 3Ω; C = ; Figure 3 CONDITIONS MIN TYP M UNITS 3 6 Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column. Note 3: R ON = R ON(M) - R ON(MIN). Note 4: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges; i.e., V _, V Y_, V Z_ = 3V to and to -3V. Note 5: eakage parameters are % tested at maximum-rated hot operating temperature, and guaranteed by correlation at. Note 6: Guaranteed by design, not production tested. 2 2 Ω 5

6 igh-speed, ow-voltage, CMOS nalog ( = +5V, =,, unless otherwise noted.) ON-RESISTNCE (Ω) ON-RESISTNCE vs. V, V Y, V Z = +2V = +2.5V = +3V ON-EKGE (p) V, V Y, V Z (V) = +5V M467 toc RON (Ω) ON-EKGE vs. TEMPERTURE ON-RESISTNCE vs. V, V Y, V Z ND TEMPERTURE T = +85 C T = +7 C T = C T = -4 C V, V Y, V Z (V) M467 toc4 Typical Operating Characteristics CRGE INJECTION (pc) M467 toc2 OFF-EKGE (p).. OFF-EKGE vs. TEMPERTURE I, I Y, I Z TEMPERTURE ( C) CRGE INJECTION vs. V, V Y, V Z M467 toc5 I _, I Y _, I Z _ M467 toc TEMPERTURE ( C) V, V Y, V Z (V), SUPPY CURRENT vs. TEMPERTURE V, V, V C, V ENE =, 5V M467 toc SUPPY CURRENT vs. OGIC VOTGE = +5V M467 toc7 ICC (p) ICC (m).5. = +3V.5 = +2V TEMPERTURE ( C) V, V, V C, V ENE (V) 6

7 igh-speed, ow-voltage, CMOS nalog Typical Operating Characteristics (continued) ( = +5V, =,, unless otherwise noted.) V, V, VC, VENE (V) ( ) INPUT IG OGIC TRESOD vs. SUPPY VOTGE (V) TOT RMONIC DISTORTION vs. FREQUENCY = +3V, Vp-p SIGN IN = OUT = 6Ω = +3.3V, Vp-p SIGN = 2.5V, Vp-p SIGN = +5V, Vp-p SIGN M467 toc8 M467 toc GIN (d) SWITCING TIMES () FREQUENCY RESPONSE M467 toc9 8 - ON-OSS IN = OUT = 5Ω ON-PSE OFF-ISOTION k k M M M 5M FREQUENCY (z) SWITCING TIME vs. VOTGE M467 toc PSE ( ) FREQUENCY (kz) V+ (V) 7

8 igh-speed, ow-voltage, CMOS nalog 3, 4, 5, 2,, 5, 2, PIN M467 M468 M469 2, 4, 5, ENE N.C C, 5, 2, 4 Y, Y, Y2, Y3 3 5 Y 5 Z 3 Z 4 Z NME 7,, 2, 3 Y Y nalog Switch Inputs 7 FUNCTION Pin Description nalog Switch Output nalog Switch Inputs 3 nalog Switch Output nalog Switch Normally Open Input nalog Switch Normally Closed Input nalog Switch Y Normally Open Input nalog Switch Y Normally Closed Input Digital Enable Input. Normally connect to. Can be driven to logic high to set all switches off. No Connection. Not Internally connected. Ground Digital ddress Input Digital ddress Input Digital ddress C Input nalog Switch Y Inputs 3 nalog Switch Y Output nalog Switch Z Normally Closed Input nalog Switch Z Normally Open Input nalog Switch Z Output Positive nalog and Digital Supply Voltage Input Note: Input and output pi are identical and interchangeable. ny may be coidered an input or output; signals pass equally well in both directio. pplicatio Information Power-Supply Coideratio Overview The cotruction is typical of most CMOS analog switches. They have two supply pi: VCC and. VCC and are used to drive the internal CMOS switches and set the limits of the analog voltage on any switch. Reverse ESD-protection diodes are internally connected between each analogsignal pin and both VCC and. If any analog signal exceeds VCC or, one of these diodes conducts. During normal operation, these and other reversebiased ESD diodes leak, forming the only current drawn from VCC or. Virtually all the analog leakage current comes from the ESD diodes. lthough the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either or and the analog signal. This mea their leakages will vary as the signal varies. The difference in the two diode leakages to the VCC and pi cotitutes the analog-signal-path leakage current. ll analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of either the same or opposite polarity. VCC and power the internal logic and set the input logic limits. ogic inputs have ESD-protection diodes to ground. 8

9 igh-speed, ow-voltage, CMOS nalog The logic-level thresholds are TT/CMOS compatible when VCC is +5V. s VCC rises, the threshold increases; as VCC falls, the threshold decreases. For example, when VCC = +3V the guaranteed minimum logic-high threshold decreases to 2.V Power Supply These devices operate from a single supply between +2.5V and +5.5V. ll of the bipolar precautio must be observed. t room temperature, they actually work with a single supply near or below +2V, although as supply voltage decreases, switch on-resistance becomes very high. Overvoltage Protection Proper power-supply sequencing is recommended for all CMOS devices. Do not exceed the absolute maximum ratings because stresses beyond the listed ratings can cause permanent damage to the devices. lways sequence VCC on first, followed by the logic inputs and analog signals. If power-supply sequencing is not possible, add two small signal diodes (D, D2) in series with the supply pi for overvoltage protection (Figure ). dding diodes reduces the analog-signal range to one diode drop below VCC and one diode drop above, but does not affect the devices low switch resistance and low leakage characteristics. Device operation is unchanged, and the difference between and should not exceed 6V. These protection diodes are not recommended if signal levels must extend to ground. igh-frequency Performance In 5Ω systems, signal respoe is reasonably flat up to 5Mz (see Typical Operating Characteristics). bove 2Mz, the on-respoe has several minor peaks that are highly layout dependent. The problem is not turning the switch on, but turning it off. The off-state switch acts like a capacitor and passes higher frequencies with less attenuation. t Mz, off-isolation is about -5d in 5Ω systems, becoming worse (approximately 2d per decade) as frequency increases. igher circuit impedances also degrade off-isolation. djacent channel attenuation is about 3d above that of a bare IC socket and is entirely due to capacitive coupling. Pin Nomenclature The are pin compatible with the industry-standard 74C45/74C452/ 74C453 and the M458/M4582/M4583. In single-supply applicatio, they function identically and have identical logic diagrams, although these parts differ electrically. The pin designatio and logic diagrams in this data sheet conform to the original 972 specificatio published by RC for the CD45/CD452/CD453. These designatio differ from the standard Maxim switch and mux designatio found on other Maxim data sheets (including the M45/M452/M453) and may cause confusion. Designers who feel more comfortable with Maxim s standard designatio are advised that the pin designatio and logic diagrams on the M45/M452/M453 data sheet may be freely applied to the. *, Y, Z _, Y_, Z_ * V EE D ETERN OCKING DIODE * * D2 ETERN OCKING DIODE M467 M468 M469 *INTERN PROTECTION DIODES Figure. Overvoltage Protection Using External locking Diodes 9

10 igh-speed, ow-voltage, CMOS nalog Table. Truth Table/Switch Programming ENE SEECT INPUTS ON SWITCES INPUT C* M467 M468 M469 ll switches open ll switches open, Y Y, Y Y 2, Y Y2 3, Y Y3, Y Y, Y Y 2, Y Y2 3, Y Y3 ll switches open, Y Y, Z Z, Y Y, Z Z, Y Y, Z Z, Y Y, Z Z, Y Y, Z Z, Y Y, Z Z, Y Y, Z Z, Y Y, Z Z = Don t care *C not present on M468. Note: Input and output pi are identical and interchangeable. Either may be coidered an input or output; signals pass equally well in either direction.

11 igh-speed, ow-voltage, CMOS nalog Test Circuits/Timing Diagrams V, V, V C 5Ω V, V 5Ω C ENE M467 7 M468 ENE, Y, 2, Y, Y2. 3, Y3, Y 3Ω 3Ω V, V, V C V, V V 5% V 7 9% V, V Y t TRNS 5% V 3, 9% V Y3 9% 9% t TRNS t TRNS t TRNS V, V, V C 5Ω,, C, Y, Z M469 2, Y2, Z2 V, V, V C V, V Y, V Z 5% 9% ENE, Y, Z 3Ω V, V Y, V Z 9% t TRNS t TRNS TEST EC SECTION INDIVIDUY. Figure 2. ddress Traition Times

12 igh-speed, ow-voltage, CMOS nalog Test Circuits/Timing Diagrams (continued) V ENE V ENE 5Ω 5Ω C M467 ENE ENE 7, Y 3, Y Y3 M468, Y 3Ω 3Ω V ENE V ENE V V, V Y t ON t ON 5% 5% 9% 9% 9% 9% t OFF t OFF V ENE 5Ω C ENE, Y, Z M469, Y, Z, Y, Z 3Ω V ENE V, V Y, V Z V, V Y, V Z t ON 5% 9% 9% t OFF TEST EC SECTION INDIVIDUY. Figure 3. Enable Switching Times 2

13 igh-speed, ow-voltage, CMOS nalog Test Circuits/Timing Diagrams (continued) V, V, V C 5Ω V, V, V C 5Ω C M467 ENE,, C ENE M469 TEST EC SECTION INDIVIDUY. 7,, Y, Y, Z, Z, Y, Z 3Ω 3Ω V, V, V C V+ V, V Y, V Z V, V 5Ω ENE 5% t M M468 3, Y Y3, Y 8% 3Ω t R < 2 t F < 2 Figure 4. reak-efore-make Interval CNNE SEECT V ENE 5Ω _, Y_, Z_ C M467 M468 M469 ENE, Y, Z C pf V ENE VOUT IS TE MESURED VOTGE DUE TO CRGE- TRNSFER ERROR Q WEN TE CNNE TURNS OFF. TEST EC SECTION INDIVIDUY. Q = C Figure 5. Charge Injection 3

14 igh-speed, ow-voltage, CMOS nalog Test Circuits/Timing Diagrams (continued) CNNE SEECT nf _, Y_, Z_ C M467 M468 M469 ENE, Y, Z NOTES: MESUREMENTS RE STNDRDIZED GINST SORT T SOCKET TERMINS. OFF ISOTION IS MESURED ETWEEN COM ND "OFF" NO TERMIN ON EC SWITC. ON OSS IS MESURED ETWEEN COM ND "ON" NO TERMIN ON EC SWITC. CROSSTK (M468/M469) IS MESURED FROM ONE CNNE (,, C) TO OTER CNNES. SIGN DIRECTION TROUG SWITC IS REVERSED; WORST VUES RE RECORDED. Figure 6. Off-Isolation, On-oss, and Crosstalk V IN NETWORK NYZER 5Ω 5Ω MES. 5Ω 5Ω REF. OFF-ISOTION = 2log V IN V ON-OSS = 2log OUT V IN CROSSTK = 2log V IN CNNE SEECT _, Y_, Z_ C M467 M468 M469 ENE, Y, Z Mz CPCITNCE NYZER Figure 7. Capacitance 4

15 igh-speed, ow-voltage, CMOS nalog _Ordering Information (continued) PRT TEMP. RNGE PIN-PCKGE M467EUE -4 C to +85 C 6 TSSOP M467ESE -4 C to +85 C 6 Narrow SO M467EPE -4 C to +85 C 6 Plastic DIP M468CUE C to +7 C 6 TSSOP M468CSE M468CPE C to +7 C C to +7 C 6 Narrow SO 6 Plastic DIP M468EUE -4 C to +85 C 6 TSSOP M468ESE -4 C to +85 C 6 Narrow SO M468EPE -4 C to +85 C 6 Plastic DIP M469CUE C to +7 C 6 TSSOP M469CSE C to +7 C 6 Narrow SO M469CPE C to +7 C 6 Plastic DIP M469EUE -4 C to +85 C 6 TSSOP M469ESE -4 C to +85 C 6 Narrow SO M469EPE -4 C to +85 C 6 Plastic DIP Chip Information TRNSISTOR COUNT: 244 5

16 igh-speed, ow-voltage, CMOS nalog Package Information TSSOP.EPS Maxim cannot assume respoibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licees are implied. Maxim reserves the right to change the circuitry and specificatio without notice at any time. 6 Maxim Integrated Products, 2 San Gabriel Drive, Sunnyvale, C Maxim Integrated Products Printed US is a registered trademark of Maxim Integrated Products.