PART MAX312CPE MAX312CSE. Pin Configurations/Functional Diagrams/Truth Tables IN1 COM1 NO1 V- GND IN1 COM1 NC1 V- GND IN1 COM1 NO1 V- GND

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1 9-2; Rev 2; 7/2 Ω, Quad, SPST, MOS nalog Switches General escription Maxim s MX32/MX33/MX3 analog switches feature low on-resistance (Ω max) and.ω on-resistance matching between channels. These switches conduct equally well in either direction. They offer low leakage over temperature (2.n at +8 ). Low power consumption and ES tolerance greater than 2V per Method 3.7 are guaranteed. The MX32/MX33/MX3 are quad, singlepole/single-throw (SPST) analog switches. The MX32 is normally closed (N), and the MX33 is normally open (NO). The MX3 has two N switches and two NO switches. ll three devices operate from a single supply of +.V to +3V or from dual supplies of ±.V to ±2V. pplications Test Equipment ommunication Systems PX, PX Systems udio Signal Routing vionics Sample-and-Hold ircuits ata cquisition Systems Rail-to-Rail is a registered trademark of Nippon Motorola Ltd. Features Pin ompatible with G/G2/G3 Low On-Resistance (6.Ω typical) Guaranteed R Match etween hannels (.Ω max) Guaranteed R Flatness over Specified Signal Range (2Ω max) Guaranteed ES Protection > 2V per Method 3.7 rosstalk > 96d at 2kHz Single-Supply Operation: +.V to +3V ual-supply Operation: ±.V to ±2V Rail-to-Rail Signal Handling Ordering Information PRT MX32PE MX32SE TEMP RNGE to +7 to +7 PIN-PKGE 6 Plastic IP 6 Narrow SO MX32UE to +7 6 TSSOP MX32/ to +7 ice* MX32EPE - to +8 6 Plastic IP MX32ESE - to +8 6 Narrow SO MX32EUE - to +8 6 TSSOP MX32MJE - to +2 6 ERIP** Ordering Information continued at end of data sheet. * ontact factory for dice specifications. **ontact factory for availability. Pin onfigurations/functional iagrams/truth Tables MX32/MX33/MX3 TOP VIEW IN OM N 2 3 MX IN2 OM2 N2 IN OM NO 2 3 MX IN2 OM2 NO2 IN OM NO 2 3 MX IN2 OM2 N2 N OM IN N3 OM3 IN3 NO OM IN NO3 OM3 IN3 NO OM IN N3 OM3 IN3 IP/SO/TSSOP SO/MX32 LOGI SWITH IP/SO/TSSOP MX33 LOGI SWITH SWITHES SHOWN FOR LOGI "" INPUT IP/SO/TSSOP MX3 LOGI SWITHES, SWITHES 2, 3 Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/allas irect! at , or visit Maxim s website at

2 Ω, Quad, SPST, MOS nalog Switches MX32/MX33/MX3 SOLUTE MXIMUM RTINGS Voltages Referenced to...-.3v to +V...+.3V to -V to...-.3v to +V...( -.3V) to ( +.3V) ll Other Pins (Note )...( - 2V) to ( + 2V) or 3m (whichever occurs first) ontinuous urrent (OM_, NO_, N_)...±m Peak urrent (OM_, NO_, N_)...±3m ontinuous Power issipation (T = +7 ) Plastic IP (derate.3mw/ above +7 )...82mW Narrow SO (derate 8.7mW/ above +7 )...696mW ERIP (derate.mw/ above +7 )...8mW TSSOP (derate 6.7mW/ above +7 )...7mW Operating Temperature Ranges MX3... to +7 MX3_E_...- to +8 MX3_M_...- to +2 Storage Temperature Range...-6 to + Lead Temperature (soldering, s)...+3 Stresses beyond those listed under bsolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note : Signals on N_, NO_, OM_, or IN_ exceeding or will be clamped by internal diodes. Limit forward diode current to maximum current rating. ELETRIL HRTERISTISual Supplies ( = V, = -V, = V, = V, V INH = 2.V, V INL =.8V, T = T MIN to T MX, unless otherwise noted.) nalog Signal Range On-Resistance PRMETER NLOG SWITH On-Resistance Match etween hannels (Note ) On-Resistance Flatness (Note ) Off Leakage urrent (NO_ or N_) (Note 6) OM Off Leakage urrent (Note 6) OM On Leakage urrent (Note 6) SYMOL V OM _, V NO _, V N _ R ΔR R FLT() I NO I N I N() I OM() I OM = m, V NO _ or V N _ = ±V I OM = m, V NO _ or V N _ = ±V I OM = m, V NO _ or V N _ = -V, V, V V OM = ±V, V NO _ or V N _ = ±V V OM = ±V, V NO _ or V N _ = ±V V OM = ±V, V NO _ or V N _ = ±V ITIS T =, E +2 M T = T MIN to T MX T = T MIN to T MX T = T MIN to T MX T = T MIN, E to T MX M T = T MIN, E to T MX M T = T MIN, E to T MX M MIN TYP MX (Note 2) UNITS 6. 9 Ω.3. 3 Ω.2 2 Ω n n n - V 2

3 Ω, Quad, SPST, MOS nalog Switches ELETRIL HRTERISTISual Supplies (continued) ( = V, = -V, = V, = V, V INH = 2.V, V INL =.8V, T = T MIN to T MX, unless otherwise noted.) LOGI INPUT PRMETER Input urrent with Input Voltage High Input urrent with Input Voltage Low POWER SUPPLY Power-Supply Range Positive Supply urrent Negative Supply urrent Logic Supply urrent Ground urrent YNMI Turn-On Time Turn-Off Time SYMOL I INH I INL I+ I- I L I t t ITIS IN_ = 2.V, all others =.8V T = T MIN to T MX MIN TYP MX (Note 2) UNITS IN_ =.8V, all others = 2.V -... µ ll channels on or off, V IN = V or V, = 6.V = -6.V ll channels on or off, V IN = V or V, = 6.V = -6.V ll channels on or off, V IN = V or V, = 6.V = -6.V ll channels on or off, V IN = V or V, = 6.V = -6.V Figure 2, V OM = ±V Figure 2, V OM = ±V T = T MIN to T MX T = T MIN to T MX T = T MIN to T MX ±. ± T = T MIN to T MX T = T MIN to T MX 23 µ V µ µ µ µ ns ns MX32/MX33/MX3 reak-efore-make Time elay t MX3 only, Figure 3, R L = 3Ω, L = 3pF ns harge Injection V TE L =.nf V GEN = V, R GEN = Ω, Figure p Off Isolation (Note 7) V ISO R L = Ω, L = pf, f = MHz, Figure -6 d rosstalk (Note 8) V T R L = Ω, L = pf, f = MHz, Figure 6-8 d N or NO apacitance () f = MHz, Figure 7 pf OM Off apacitance (OM) f = MHz, Figure 7 pf On apacitance (OM) f = MHz, Figure 7 7 pf 3

4 Ω, Quad, SPST, MOS nalog Switches MX32/MX33/MX3 ELETRIL HRTERISTISSingle Supply ( = 2V, = V, = V, = V, V INH = 2.V, V INL =.8V, T = T MIN to T MX, unless otherwise noted.) PRMETER NLOG SWITH nalog Signal Range hannel On-Resistance POWER SUPPLY Positive Supply urrent Logic Supply urrent Ground urrent YNMI Turn-On Time Turn-Off Time SYMOL V OM _, V NO _, V N _ R I+ I L I t t I OM = m, V N _ or V NO _ +V = 3.2V all channels on or off, V IN = V or V V L =.V all channels on or off, V IN = V or V V L =.V all channels on or off, V IN = V or V Figure 2, V NO _ or V N _ = 8V Figure 2, V NO _ or V N _ = 8V ITIS T = T MIN to T MX T = T MX T = T MX T = T MX MIN TYP MX (Note 2) T = T MIN to T MX T = T MIN to T MX 22 UNITS V Ω µ µ µ ns ns reak-efore-make Time elay t MX3 only, Figure 3 R L = 3Ω, L = 3pF ns harge Injection V TE Figure, L =.nf, V GEN = V, R GEN = V - p Note 2: The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet. Note 3: Guaranteed by design. Note : ΔR = ΔR max - ΔR min. Note : Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal range. Note 6: Leakage parameters are % tested at maximum-rated hot temperature and guaranteed by correlation at +2. Note 7: Off isolation = 2log [V OM / (V N or V NO )], V OM = output, V N or V NO = input to off switch. Note 8: etween any two switches. Note 9: Leakage testing at single supply is guaranteed by testing with dual supplies.

5 Ω, Quad, SPST, MOS nalog Switches Typical Operating haracteristics (, unless otherwise noted.) R (Ω) R (Ω) RESISTNE vs. V OM (IPOLR SUPPLIES) :, = ±V, :, = ±V, :, = ±V V OM (V) -RESISTNE vs. V OM N TEMPERTURE 2 = 2V, 22 = V E 8 : T = +2 : T = +8 6 : T = +7 : 2 E: T = V OM (V) MX32- MX32- LEKGE (n) R (Ω) RESISTNE vs. V OM N TEMPERTURE = V, = -V E V OM (V) : T = +2 : T = +8 : T = +7 : E: T = - LEKGE URRENT vs. TEMPERTURE = V, = -V, V N OR V NO = ±V V OM = ±V TEMPERTURE ( ) MX32-2 MX32 TO R (Ω) LEKGE (n)... -RESISTNE vs. V OM (SINGLE SUPPLY, = V) = V, = -V, V OM = ±V V OM (V) LEKGE URRENT vs. TEMPERTURE : = 2.7V : = 3.3V : = V : = 9V E: = 2V F: = V TEMPERTURE ( ) E F MX32-3 MX32 TO6 MX32/MX33/MX3 VTE (pc) HRGE INJETI vs. V OM : = V, = -V : = 2V, = V MX32-7 I+, I-, IL (μ)... : I+ = 6.V : I- = -6.V : I L =.V SUPPLY URRENT vs. TEMPERTURE MX32 TO V OM (V) TEMPERTURE ( )

6 Ω, Quad, SPST, MOS nalog Switches MX32/MX33/MX3 Typical Operating haracteristics (continued) (, unless otherwise noted.) ISTORTI (d) TOTL HRMI ISTORTI vs. FREQUENY = V = -V V RMS SIGNL 6Ω SOURE N LO SIGNL ISTORTI MESUREMENT LIMITS FREQUENY (Hz) MX ISTORTI (%) Pin escription LOSS (d) FREQUENY RESPSE RESPSE ISOLTI 2.pF PITOR (FOR REFERENE LY) PHSE 3 FREQUENY (MHz) MX PHSE (degrees) PIN MX32 MX33 MX3 NME FUNTI, 8, 9, 6, 8, 9, 6, 8, 9, 6 IN2, IN, IN3, IN2 Logic Level Inputs 2, 7,, 2, 7,, 2, 7,, OM, OM, OM3, OM2 nalog Signal ommon Terminals 3, 6,, N, N, N3, N2 nalog Signal Normally losed Terminals 3, 6,, NO, NO, NO3, NO2 nalog Signal Normally Open Terminals 3, 6 NO, NO nalog Signal Normally Open Terminals, N3, N2 nalog Signal Normally losed Terminals Negative nalog Supply Input (connect to for single-supply operation) Logic Level Ground Logic Supply Voltage Positive nalog Supply Input 6

7 Ω, Quad, SPST, MOS nalog Switches pplications Information Low-istortion udio The MX32/MX33/MX3, having very low R and very low R variation with signal amplitude, are well suited for low-distortion audio applications. The Typical Operating haracteristics show Total Harmonic istortion (TH) vs. Frequency graphs for several signal amplitudes and impedances. Higher source and load impedances improve TH, but reduce off isolation. Off Isolation at High Frequencies In Ω systems, the high-frequency on-response of these parts extends from to above MHz with a typical loss of -2d. When the switch is turned off, however, it behaves like a capacitor, and off isolation decreases with increasing frequency. (bove 3MHz, the switch actually passes more signal turned off than turned on.) This effect is more pronounced with higher source and load impedances. bove MHz, circuit board layout becomes critical, and it becomes difficult to characterize the response of the switch independent of the circuit. The graphs shown in the Typical Operating haracteristics were taken using a Ω source and load connected with N connectors to a circuit board deemed average ; that is, designed with isolation in mind, but not using strip-line or other special RF circuit techniques. For critical applications above MHz, use the MX, MX, and MX2, which are fully characterized up to 6MHz. V g NO_ OM_ Figure. Overvoltage Protection Using External locking iodes MX32/MX33/MX3 LOGI INPUT +3V V % tr < 2ns tf < 2ns SWITH INPUT V OM +V +V OM NO OR N MX32 MX33 MX3 SWITH OUTPUT V O t IN R L 3Ω L 3pF SWITH OUTPUT V V O t.9v.9v LOGI INPUT WVEFORMS INVERTE FOR SWITHES THT HVE THE OPPOSITE LOGI SENSE. LOGI INPUT V -V REPET TEST FOR EH SWITH. FOR LO ITIS, SEE Electrical haracteristics. L INLUES FIXTURE N STRY PITNE. V O = V OM ( RL ) RL + R Figure 2. Switching-Time Test ircuit 7

8 Ω, Quad, SPST, MOS nalog Switches MX32/MX33/MX3 LOGI INPUT SWITH OUTPUT (VO) SWITH OUTPUT 2 (VO2) +3V V V V % t.9v t.9v2 Figure 3. reak-efore-make Test ircuit (MX3 only) V OM = +V V OM2 = +V LOGI INPUT OM_ OM_ IN_ +V +V NO_ -V N_ R L2 L INLUES FIXTURE N STRY PITNE. MX3 V O2 L2 R L = 3Ω L = 3pF R L V O L MX32 MX33 MX3 V GEN R GEN +V OM IN +V N OR NO L V O V O V IN ΔV O -V V IN = +3V V IN Q = (ΔV O )( L ) V IN EPENS SWITH FIGURTI; INPUT POLRITY ETERMINE Y SENSE OF SWITH. Figure. harge Injection Test ircuit 8

9 Ω, Quad, SPST, MOS nalog Switches SIGNL GENERTOR dm NLYZER R L OM OM +V N OR NO Figure. Off-Isolation Test ircuit +V -V IN MX32 MX33 MX3 V, 2.V SIGNL GENERTOR dm NLYZER V, 2.V R L N2 +V OM IN Figure 6. rosstalk Test ircuit +V N IN2 OM2 -V MX32 MX33 MX3 Ω N V, 2.V MX32/MX33/MX3 +V +V MX32 MX33 MX3 +V +V MX32 MX33 MX3 PITNE METER f = MHz OM N OR NO IN V or 2.V PITNE METER f = MHz OM N OR NO IN V or 2.V -V -V Figure 7. hannel-off apacitance Test ircuit Figure 8. hannel-on apacitance Test ircuit 9

10 Ω, Quad, SPST, MOS nalog Switches MX32/MX33/MX3 Ordering Information (continued) PRT MX33PE MX33SE to +7 6 Narrow SO MX33UE to +7 6 TSSOP MX33/ MX33EPE TEMP. RNGE to +7 to +7 - to +8 PIN-PKGE 6 Plastic IP ice* 6 Plastic IP MX33ESE - to +8 6 Narrow SO MX33EUE - to +8 6 TSSOP MX33MJE - to +2 6 ERIP** MX3PE MX3SE to +7 6 Narrow SO MX3UE to +7 6 TSSOP MX3/ MX3EPE to +7 6 Plastic IP to +7 - to +8 ice* 6 Plastic IP MX3ESE - to +8 6 Narrow SO MX3EUE - to +8 6 TSSOP MX3MJE - to +2 6 ERIP** * ontact factory for dice specifications. **ontact factory for availability. hip Topography OM IN IN2 OM2 V L." (3.6mm) OM IN IN3 OM3.8" (2.6mm) MX32 MX33 MX3 MX3 PIN NME PIN NME PIN NME N NO NO N NO NO N3 NO3 N3 N2 NO2 N2 TRNSISTOR OUNT: SUSTRTE NETE TO

11 Ω, Quad, SPST, MOS nalog Switches Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to MX32/MX33/MX3 PIPN.EPS TSSOP.mm.EPS

12 Ω, Quad, SPST, MOS nalog Switches MX32/MX33/MX3 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to IPS.EPS N INHES IM MIN.3. MX MILLIMETERS MIN MX SOIN.EPS e. S.27 S E H E H L TOP VIEW VRITIS: IM INHES MILLIMETERS MIN MX MIN MX N MS e FRT VIEW L SIE VIEW -8 PROPRIETRY INFORMTI TITLE: PKGE OUTLINE,." SOI PPRO OUMENT TROL NO. REV. 2- Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 2 Maxim Integrated Products, 2 San Gabriel rive, Sunnyvale, Maxim Integrated Products Printed US is a registered trademark of Maxim Integrated Products.