Slide Set Data Converters. High-Order, CT Σ Converters and Σ DAC

Transcription

1 0 lide et Data Converters High-Order, CT Σ Converters and Σ DAC

2 1 NR Enhancement ummary High Order Noise haping Continuos-Time Σ Modulators Band-Pass Σ Modulators Oversampling DAC

3 2 NR Enhancement Many quantization levels augments the NR. However, a many levels DAC is problematic. The NR enhancement techniques aim at using many levels (n) in the ADC and less levels (m) in the DAC. Possible solution (Leslie ing) X IN DAC Y 1 DAC D P m ADC TRUNC n Y 2D Y 1D PROC YD X Y 1 IN DAC D e Q,n P e Q,m Y 2 Y 1 PROC Y (a) (b)

4 3 Two quantization errors Y 1 = X T F ɛ Q,m NT F (1) Y 2 = Y 1 ɛ Q,m ɛ Q,n (2) the processing in the digital domain cancels the contribution of ɛ Q,m Y 2 NT F Y 1 (1 NT F ) = X T F ɛ Q,n NT F. (3) That relies on a well predicted NTF as determined by the analog circuit to be used in the digital processor. Any difference leads to a ɛ Q,m leakage.

5 4 haping of the truncation error X z -1 - z -1 P n-bit 1-z -1 ADC Y DAC e T (1-z -1 ) k-1 m-bit DAC Y 1 Ye T (1-z -1 ) k Digital D Y The shaped error due to truncation is predictable and can be compensated for at the input of the second integrator.

6 5 The output of the digital Σ whose input is the main output Y results Y 1 = Y ɛ T (1 z 1 ) p (4) ince Y = P ɛ Q,n, the signal feed back at the input of the sigma delta (ɛ T ɛ Q,m ) is The output of the modulator becomes Y 1 = P ɛ Q,n ɛ Q,m (1 z 1 ) p (5) Y 2 = X T F ɛ Q,n NT F ɛ Q,m T F (1 z 1 ) p. (6) Assume that ɛ Q,m T F (1 z 1 ) p is negligible.

7 6 High Order Noise haping Many integrators in the feedback loop give rise to high-order architectures. haping of the quantization noise more effective but difficulty in designing a stable modulator with many integrators around the loop. Often, configurations that ensure stability bring about an extra denominator in the TF and the NTF If D = 1 we would have T F (z) = N(z) D(z) ; NT F (z) = (1 z 1 ) L. (7) D(z) π 2L Vn 2 = Vn,Q 2 2L 1 [ fb f s /2 ] 2L1 = V 2 n,q π 2L 2L 1 OR (2L1) (8)

8 7 The signal-to-noise ratio for an L-the order Σ modulator with unity denominator in the TF and NTF is NR Σ,L = 12 8 k2 2L 1 π 2L OR2L1 (9) that, in db, is NR Σ,L = [ n ] π2l 10log 2L (2L 1) log 2(OR). (10)

9 8 NR versus the OR for different Modulator Order N=5 N=8 N=7 N=6 N=4 N=3 NR (db) N=2 N= OR

10 9 Example 7.1 The denominator of TF and NTF has two poles that located at f p1 = 4f B and f p2 = 8f B in the frequency domain. Determine the effect of D(z) on the NTF. The positions of the poles in the z-plane are z p1 = e π/16 = 0.822, z p2 = e π/8 = (11) on the real axis not so far from z=1

11 10 Effect of the denominator on the NTF (notice that the region that matter is the one at low frequency). 0 NTF [db] NTF without D(z) Normalized frequency [f/f s ]

12 11 ingle tage Architectures Many integrators in a Σ architecture obtains high-order noise transfer functions but, at the same time, poses special challenges for designing a stable architecture. Well known stability criteria are not definite conditions for Σ modulators. A stable linear architecture becomes unstable when the quantizer is inserted into the loop. X _ ADC Y DAC DAC DAC DAC (a) e Q X _ H(z) Y (b)

13 12 with the simple scheme of a single feedback form output to input T F = H(z) 1 H(z) ; NT F = 1 1 H(z) (12) Assume that H(z) is given by T F = H(z) = P (z) Q(z) (13) P (z) P (z) Q(z) ; NT F = Q(z) P (z) Q(z). (14) The goal is to have P(z) low-pass like; Q(z) high-pass (high-order) like and to have a minimum degradation caused by P(z)Q(z).

14 13 tability Analysis tability is the main issue. Having the quantizer makes the study problematic. P ADC P k ADC F DAC V ref F DAC V ref a) -V ref c) -V ref P e Q F P k e Q F b) d) An amplifier before a 1-bit quantizer is irrelevant. Instead, the small signal model...

15 14 The root locus technique is used to determine the stability limit. The gain can be associated to the quantizer; when the limiting gain k is reached, the unbounded nodes of the modulator can experience large and uncontrolled transients. Indeed the quantizer sticks to one binary level for many clock periods causing low frequency oscillations (and tones in the signal band). The key point is to find a meaningful definition of the quantizer gain. That is an opened point, interesting from an academic point of view. What is important is to be aware of the Warning! The study of the stability of a highorder modulator must be followed by extensive time-domain simulations with different amplitudes and frequencies of the sine wave input.

16 15 Weighted Feedback ummation A possible scheme of single loop high-order modulator. X - z -k 1 -k z 2 -k z 3 -k z 4 -k z p 1-z -1 1-z -1 1-z -1 1-z -1 1-z -1 a 1 a 2 a 3 a 4 a p e Q P Y Integrators with or without delay.

17 16 Estimation of the loop transfer function H p (z) = z k 1 1 z 1a 1 z (k1k2) (1 z 1 ) 2a 2 z (1 z 1 ) pa p (15) p 1 k i H p (z) = P (z) (1 z 1 ) p (16) P (z) = α 1 z 1 α 2 z 2 α p z p = p α i z i (17) 1

18 17 The TF and the NTF are T F = p 1 α iz i p 1 α iz i (1 z 1 ) p NT F = (1 z 1 ) p p 1 α iz i (1 z 1 ) p. (18) D(z) = p α i z i (1 z 1 ) p = 1 β 1 z 1 β 2 z 2 β p z r (19) 1

19 18 D(z) determine the poles of the TF and NTF. Moreover, the stability requires that the poles be inside the unity circle r D(z) = (1 z i z 1 ) z i < 1. (20) Assuming that D(z) almost equals D(1) in the signal band, it results 1 NT F = NT F id r 1 (1 z i) = NT F id K p. (21) NR db = NR ideal db 20log 10 K p. (22)

20 19 Example 7.2 tudy of a third order modulator with weighted feed- back summation and all delayed integrators. Estimation of the quantizer resolution and ADC dynamic range. 1 (a 1 3)z 1 (a 2 2a 1 3)z 2 (a 1 a 2 a 3 1)z 3 resulting in a 1 = 3, a 2 = 3 and a 3 = 1.

21 20 Modulator with Local Feedback Zeros of the NTF at z = 1 give rise to an optimum noise shaping for large ORs. Complex conjugate zeros on the z-circle obtains low noise around the zeros at the expense of a less effective shaping at z = 1. Therefore, we can increase the usable frequency range. (a) (b)

22 21 The use of local feedback obtains complex conjugate zeros as is achieved by the following fifth-order modulator. g 1 g 2 X - Y 1 X 2 =Y z -1 X 1 1 z -1 1 z -1 1-z -1 1-z -1 1-z -1 1-z -1 1-z -1 Y 2 a 1 a 2 a 3 a 4 a p e Q P Y resonators obtained by closing loops of two integrators.

23 22 Transfer function of the first resonator loop. [X 1 (z) g 1 Y 1 (z)] z 1 (1 z 1 ) 2 = Y 1(z) (23) Y 1 X 1 = z 1 1 (2 g 1 )z 1 z 2. (24) giving a pair of zeros on the unity circle that, using the z s relationship, are at ω 1p = ± 1 ( arccos 1 g ) 1 g1 (25) T s 2 T s

24 23 Chain of Integrators with Distributed Feedback It is a generalization of the already studied second-order modulators (with two feedbacks from the digital output to the inputs of the integrators). e Q X - z -1 1-z -1 - z -1 1-z -1 - z -1 1-z z -1 1-z -1 P Y a 1 a 2 a 3 a 4 a p P = Xz p (1 z 1 ) p Y p 1 a p i1 z i (1 z 1 ) i. (26)

25 24 Y = P ɛ Q. (27) D(z) = (1 z 1 ) p p a p i1 z i (1 z 1 ) p i. (28) 1 Observe that the input of the generic integrator is always given by the subtraction of two terms V in,i = V out,i 1 a i V out (29) where V out is the analog conversion of Y. ince V out,i 1 is very close to a i V out, the maximum amplitude of the (i-1)-th integrator output is approximately a i times the reference. If necessary adjust the dynamic range of the integrators by using scaling.

26 25 Cascaded Σ Modulator Is the alternative solution to high-order architectures (obtains high-order noise shaping without incurring in stability troubles). X D-1 Order p 1 e 1 e 2 D-2 Y Y 1 Order p 2 2 ignal Processing Y Order p 1 p 2 Each modulator provides, in addition to the digital output an analog signal: the quantization error. The quantization error of the last modulator in not used.

27 26 tudy of a cascade of two modulators. Y 1 = X T F 1 ɛ Q1 NT F 1 = Xz r 1 ɛ Q1(1 z 1 ) p 1 (30) Y 2 = ɛ Q1 T F 2 ɛ Q2 NT F 2 = ɛ Q1 z r 2 ɛ Q2(1 z 1 ) p 2 (31) It is possible to eliminate the quantization error of the first modulator in the digital domain. Y out = Y 1 T F 2 Y 2 NT F 1 (32) Notice that the cancellation relies on the knowledge of the TF and NTF of the second and first modulator respectively.

28 27 Assume that the Σ orders are p 1 and p 2 : NT F 1 = (1 z 1 ) p 1 NT F 2 = (1 z 1 ) p 2 ); moreover, T F 1 = z r 1, T F 2 = z r 2. and Y out = Y 1 z r 2 Y 2(1 z 1 ) p 1 = Xz (r 1r 2 ) ɛ Q2 (1 z 1 ) p 1p 2 (33) The TF is a delay; ɛ Q2 is shaped by an NTF of order (p 1 p 2 ). Possible op-amp non-idealities and component mismatches can make the actual NTF different from the ideal one. The cancellation of ɛ Q1 is incomplete. ɛ n,out = (NT F real NT F ideal )ɛ Q1 (34) If the NT F is [1 (1 δ I )z 1 ] (first order with zero shifted by δ I ) the residual noise is ɛ n,out,1 = δ I z 1 ɛ Q1 (35) The spectrum is white and only reduced by the oversamping ratio.

29 28 If the number of bits of Σ 1 and Σ 2 are equal the spectra of the quantization noise are also equal, therefore δ 2 I OR < 1 (2L 1) OR 2L1; L = p 1 p 2. (36) π 2L With a second order sigma delta in the first cell of the MAH and NT F = [1 (1 δ I )z 1 ] 2 (1 z 1 ) 2 [1 (1 δ I )z 1 ] 2 = δ 2 I z 2 2δ I z 1 (1 z 1 ) (37) the residual is represented by two terms: δi 2 (the square of the first order counterpart) and 2δ I passed through a first order shaping function. Use a second-order modulator (which is the maximum order that does not create stability problems) in the first cell of the MAH.

30 29 The inaccuracy in generating the quantization error ɛ Q1 is the difference between the input of ADC 1 and its DAC conversion Both DAC and subtractor can give rise to inaccuracies. Namely, gain errors of the DAC, δ D, gain error of subtractor, δ The error in the quantization error, ɛ Q,1 is Giving rise to a total error equal to ɛ Q,1 = [(1 δ D)Y 1 P 1 ] (1 δ ) (38) ɛ Q,1 = ɛ Q,1 ɛ Q,1 δ Y 1 δ D (1 δ ). (39) ɛ out X(δ D NT F 1 ) ɛ Q,1 (δ NT F 1 δ D NT F 2 1 ) (40)

31 30 All the above helps in the design; the key... Warning The cascade of Σ modulators relies on the exact knowledge of the noise transfer function and the exact generation of the quantization error to be cancelled. Errors disputing the assumptions can greatly reduce the achievable NR!

32 31 Cascaded 211 MAH X - k z -1 - e Q1 z -1 1-z -1 - e Q2 Y 1 I G N A L e Q1 e Q2 - - k 2 z -1 1-z -1 z -1 1-z -1 - e Q3 Y 2 Y 3 P R O C E I N G Y

33 32 The three outputs are Y 1 = Xz 1 ɛ Q,1 (1 z 1 ) 2 Y 2 = ɛ 1 z 1 ɛ Q,2 (1 z 1 ) (41) Y 3 = ɛ 2 z 1 ɛ Q,3 (1 z 1 ) the signal processing that cancels the rst and second quantization noises for obtaining the output Y is Y = Y 1 z 2 Y 2 z 1 (1 z 1 ) 2 Y 3 (1 z 1 ) 3. (42) that obtains order of the shaping: 211 Y = Xz 3 ɛ Q,3 (1 z 1 ) 4 (43)

34 33 Dynamic range for MAH The dynamic range of the op-amps and the amplitude of the quantization errors are critical design issues especially with 1-bit quantizers. 3 First Order 3 econd Order Amplitude Normalized time Normalized time ignal and Quantization noise Possible problem due to excessive amplitudes of the quantization noise.

35 34 An input (quantization noise) that exceeds the dynamic range is a problem. Therefore, remember, for High Resolution MAH For a high resolution MAH it is recommended always using multibit modulators to limit the dynamic range of the op-amps and reducing the amplitude of quantization errors to be cancelled out. The linearity of the DACs must be enhanced by trimming or dynamic matching of elements.

36 35 Example 7.3 tudy a MAH 1-bit modulator. Plot of NR as a function of the input amplitude. Effect of the finite gain of the op-amps and possible clipping.

37 36 with

38 37 Continuous-time Σ Modulators A continuous-time (CT ) modulator moves the interface between continuous-time and sampled-data inside the feedback loop. Continuous Time Discrete Time Y X IN DAC P H s (z) ADC Y D Y c X IN DAC Continuous Time Discrete Time P H c (s) ADC YD DAC DAC (a) (b) ampler of a CT modulator inside the loop non-ideal operation attenuated with NTF. lew-rate: continuous-time input and DAC steps distributed over the clock period T. upply voltage of a CT can be lower than its D counterpart.

39 38 &H Limitations The DAC is the key (and difficulty) block of the CT modulator. More specifically, the &H of the DAC is the fundamental block as jitter and the finite rise and fall-time of the generated waveforms limit the &H linearity. V DAC,ji V DAC,rf e ji e rf (a) (b) The clock jitter gives errors made by pulse with random duration δt j,i. The finite rise and fall time gives errors made by pseudo-exponential pulses.

40 39 Assume a fraction α tr of 0 1 or 1 0 transitions. Assume the variance of the clock jitter σ 2 ji with Gaussian distribution P n,dac,j = 4V 2 ref α σji 2 tr 8Ts 2. (44) The noise power in the signal band must be smaller than the power of the shaped quantization noise. σ 2 ji a very demanding request at high resolution. T 2 s < π 2L 6α tr (2L 1) OR 2L (45) With f s = 40 MHz, α = 0.25 L = 4 and OR = 32, σ ji < 0.63 ps!!

41 40 The difference between rise and fall time matters because the error occurs randomly. A possible remedy to the Key Limits The clock jitter and the asymmetrical rise and fall response of the DAC are the most relevant concerns in CT DAC design. Using RTZ-DAC gives time for the ADC operation and resolves the latter limit but the jitter remains the critical issue.

42 41 CT implementations Different methods implement a CT integrator: an active RC circuit using an op-amp or an OTA; employing a MO transistor with controlled equivalent resistance, use transconductors for realizing g m C schemes. Various combinations of the above approaches lead to the following design solutions: Use of all RC integrators to implement low-voltage low-pass modulators. Use of Mosfet-C integrators with on-line tuning capabilities. Use of g m C integrators with current steering DACs for low-power, medium order modulators used in the audio band. Mixed use of RC and g m C integrators: the use of a first RC stage and the remaining g m C makes the architecture suitable for high-resolution audio band applications. Use of current-mirror based integrators for very low-power.

43 42 MOFET-C Integrator There are many technique to make linear the equivalent resistance of the MOFET. V C1 V C2 M 1 C I V in V in- M 2 M' 2 V out- V out M' 1 C I

44 43 Use of V-to-I converter The transconductance gain is well controlled with resistors. The tunability can be ensured by replacing resistors with MO. I I - Vin V bias I I - V in- V in- V in R s M 1 M 2 M 1 M 2 I B I B I B V cm I B (a) (b) Injecting the current on a capacitance obtains a continuous-time integrator. G m = g m 2 R s g m ; g m = 2µC ox W L I B. (46)

45 44 Use of transistors in the linear region The drain voltage is controlled and kept constant by the feedback loop. The transconductance is tuned by changing V d. V d I out I out- V d V in,d G m Vout,d V cm V in V cm - V in C C (a) (b) I out± = I out,q ± µc ox W L V dv in (47)

46 45 Fully differential current-mode integrator for very-low voltage and low power. I B I B I B I B I B I B I in I in- M 1 M 2 M 4 M 3 C I out- I C out H I (s) = 1 1 sc/g m. (48) (I d,in I d,out )H I (s) = I d,out (49) I d,out = I d,in sc/g m (50)

47 46 Design of CT from ampled-data Equivalent The design of CT architectures is critical: the interface between continuous-time and sampled-data processing is inside the loop filter. X(s) X(z) - H s (z) e Q (z) Y(z) X(s) - H c (s) e Q (z) Y(z) H DAC (s) (a) (b) Critical is also the type of waveform generated by the DAC: non-return-to-zero, NRTZ ), or return-to-zero, RTZ.

48 47 The design of CT modulator by using an already designed sampled-data prototype. Identification of a corresponding CT architecture with an equal or very close noise transfer function. The loop transfer function of the discrete-time model is H s (z). The CT counterpart includes the response of the DAC. G c = H c (s) H DAC (s). (51) H s (z) = Z{H c (s) H DAC (s)} (52) H DAC (s) = 1 e sτ s H s (z) = Z { G c (s) } = (1 z τ/t s )Z { Hc (s) s } (53) (54) and, in the time-domain Z 1 [H s (z)] = L 1 {H c (s) H DAC (s)} (55)

49 48 How to estimate the TF and the NTF H d (z) X(z) - e Q (z) Y(z) H d (z) (a) e Q (z) H c (s) - Y(z) H c (s) H DAC (s) (b) 1 NT F d = 1 H d (z) } HCT {L (z) = Z 1 [H c (s)h DAC (s)] (56) (57) NT F c = T F c (s) = 1 1 H CT (z) (58) H c(s) 1 H d (e st ) (59)

50 49 Band-Pass Σ Modulator If the loop filter has a resonance at a center frequency f 0, then the quantization noise is strongly attenuated in that bandwith band-pass converter. X ADC Y D NTF H(z) TF Y DAC f 0 f (a) (b) T F = H(z) 1 H(z) ; NT F = 1 1 H(z) The digital filter after the modulator must rejects the noise outside the band interval. (60)

51 50 To obtain a band-pass Σ move the poles of H(z) from z = 1 to complex conjugate positions on the z-unity circle. z 1 z 1 cosω 0 z 2 1 z 1 cosω 0 (61) At the resonation frequency the NTF is zero while the TF is 1. Far from the resonation frequency the module of H(z) becomes small (and possibly lower than 1) the out-of-band input components can be attenuated and the noise amplified. For the design of band-pass modulators start from a low-pass prototype and use a suitable transformation. If Ω 0 = ± π/2, then z bp =± j or f bp =f s /4, which is half of the Nyquist frequency. The corresponding transformation is z 1 z 2.

52 51 Use of the transformation z 1 single delay and the adder. z 2 : a double delay and a subtracter replace the X P R z -1 2 z -1 - ADC Y D (a) Y DAC -X P R z -2 2 z ADC -Y D (b) -Y DAC (P R)z 2 = R R = P z 2 1 z 2 (62)

53 52 Implementation details: double chopping and two-path scheme 1,1, -1, -1,... P z -2 - R P x z -2 R' x R (a) (b) P x x 1,0, -1, 0,... z -2 0,1, -1, 0,... z -2 Ro' Re' x x R (c)

54 53 R (n 1) = P (n 1) R (n 1) R (n 2) = P (n) R (n) R (n 3) = P (n 1) R (n 1) R (n 4) = P (n 2) R (n 2). (63) R(n 1) = R (n 1); R(n) = R (n); R(n 1) = R (n 1); R(n 2) = R (n 2); R(n 3) = R (n 3); R(n 4) = R (n 4); (64) R(n 1) = P (n 1) R(n 1) R(n 2) = P (n) R(n) R(n 3) = P (n 1) R(n 1) R(n 4) = P (n 2) R(n 2) (65)

55 54 Interleaved N-Path Architecture The method is a viable solution for band-pass converters by using two or more paths. The analog input of each path is every third input sample decimation by 3 before the Σ. F1 f s /3 f s /3 f s T s D F 2 F 1 V in D M U X F 2 F 3 F 3 D z k = N ρ i e (2πkφ i)/n k = 0,, (N 1) (66)

56 55 NTF generated by applying a z 1 z 3 transformation to an NTF with two zeros at z = 1. z 1 = 1; z 2,3 = 1 2 ± j 3 2. (67) Imaginary Part Magnitude (db) Real Part (a) Normalized Frequency (Nyquist) (b) amplification caused by the other zeros k i = z in z i ; z in = e 2πf int (68)

57 56 Example 7.4 Three path sigma-delta modulator with second order 1-bit modulators. 0 PD of a 3 Path igma Delta Modulator 50 PD [db] Frequency [Hz] x 10 5

58 57 0 PD of a 3 Path igma Delta Modulator Offset 10 mv 0 PD of a 3 Path igma Delta Modulator Gain error PD [db] PD [db] Frequency [Hz] x 10 6 (a) Frequency [Hz] x 10 6 (b) 0 PD of a 3 Path igma Delta Modulator Clock misalignment rad 0 PD of a 3 Path igma Delta Modulator All the errors PD [db] PD [db] Frequency [Hz] x 10 6 (c) Frequency [Hz] x 10 6 (d)

59 58 ynthesis of the NTF Inband tones are a limiting factor in the performance of an N-path Σ. Tones must be pushed to frequencies that are well outside the band of interest. Possible solution: syntesis of the NTF by adding extra terms to an NTF close to the desired function. uppose to apply z 1 z 2 to a second-order NTF NT F = (1 z 2 ) 2 = 1 2z 2 z 4 (69) which has the same order as the fourth order noise transfer function NT F 4 = (1 z 1 ) 4 = 1 4z 1 6z 2 4z 3 z 4 (70) missing terms to be synthesized are 4z 1, 8z 2, and 4z 3. The method is convenient for band-pass responses.

60 59 Two-path sigma-delta modulator with 1/(1z 2 ) loop gain that, with the addition of extra noise terms to obtain the (1 z 1 z 2 ) band-pass NTF. V in f ck /2 F 1 f ck /2 F 2 z -2 z -1 F 1 1 f ck /2 1z -2 M F f U 1 ck /2 X 1 1z -2 f ck V in f ck /2 F 1 f ck /2 F 2 z -2 z -1 z z z -2 e 1 e 2 M U X f ck (a) (b) Y e = X e z 2 ɛ 1 (1 z 2 ) ɛ 2 z 2 Y o = X o z 2 ɛ 2 (1 z 2 ) ɛ 1. (71) Y = Y e Y o z 1 = Xz (ɛ 1 ɛ 2 )(1 z 1 z 2 ) (72)

61 60 As expected the tones caused by mismatch fall out of the band of interest. The signal band is tone free pectrum [db] Frequency [MHz]

62 61 Oversampling DAC Oversampled DACs work very similarly to the oversampled ADC. The difference between analog and digital oversampling converters is where the processing is performed and where is the interface between continuous-time and sampled-data. M x f s n bit Interpolator n bit Digital Modulator k bit Binary to Thermometric 2 k DAC Reconstruction Filter f s M x f s M x f s M x f s The interpolator is critical: small margin f B to f s f B normally used for storing or transmitting digital data. Use high order filter to reject very close images without altering the signal band.

63 62 1-bit DAC 1-bit digital modulators employ a 1-bit DAC followed by either a switched-capacitor and/or continuous-time analog filters. The noise specifications of the DAC and filter can be challenging for very high resolution because for a desired NR the amount of noise power in the signal band must be P max,in /NR. For example, V 2 n,r = 4kT Rf B, V 2 n,c = 2kT OR C ; (73) OR = f s /(2f B ); a switched capacitor is equivalent to a resistance R eq = 1/(Cf s ) There is an upper limit to the value of R or R eq. V 2 n,r = 4kT Rf B, V 2 n,c = 4kT R eqf B. (74) uppose τ = 1/(16π f B ); f B = 10 khz; OR = 128; NR 100 db. R max = 7.5 kω, C = 266 pf.

64 63 Leading to th following Obvious Note The noise contributed by the reconstruction filter must be lower than the quantization noise falling in the signal band. For high-resolution this constrain requires to use large area-consuming capacitances!

65 64 Possible reconstruction filters C 1 C 2 I B /2 I B /2 R 1 D D R 1 R 2 C 1 _ R 3 _ C 1 V out R 1 R 2 C 2 R 3 D D _ R 1 V out- I B (a) (b) The key limit can be (again) the clock jitter. P n,ji = V 2 ref α tr σ 2 ji 2 OR T 2 s (75)

66 65 Example 7.5 Reference voltage ± 1 V ; signal band 22 khz; 128 OR. NR=110 db with 99.9% yield. α tr = σ 2 ji α tr = (76) 4 OR Ts 2 f ck = f s = khz = 5.63 MHz leading to T s = 0.18 µs. The jitter power must be 110 db below the power of the full scale signal. σ ji < 25.7 ps. For a yield it is necessary that 25.7 ps is 3.3 σ σ ji < 7.8 ps.

67 66 Return-to-zero DAC ensitivity to the difference in rise and fall times. Use of return to zero Ideal DAC Real DAC t r t f Ideal RTZ DAC Real RTZ DAC

68 67 Double Return-to-zero DAC A DAC (p) = V ref (pt τ f τ r ) = V ref pt (1 ɛ p ) (77) 2 The error is linear but he spectrum is not optimum because tones fall closer to the signal band. RTZ1 2f ck 1-bit DAC IN RTZ1 RTZ f ck Out RTZ1 1-bit DAC (a) (b)

69 68 Wrap-up Techniques useful for improving the modulator performances have been studied. A shaping with order higher than 2 has been analyzed, also considering the problems caused by stability (that, remember, is a more complex issue than a linear filter). The cascade scheme (called MAH) resolves the problem of stability but relies on the accuracy of the analog response of integrators that give rise to accurate NTF and TF. Continuous-time Σ modulators offer benefits with respect to the sampled-data counterpart, especially when low power and high sampling rate are required. For high resolutions the sampled-data version is preferred. Band-pass Σ modulators are used in many applications for reducing the power. Various scheme and solutions have been discussed. The Σ DAC is finally studied.