Electrostatic Single-walled Carbon Nanotube (CNT) Field Effect Transistor Device Modeling
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1 Electrostatic Single-walled Carbon Nanotube (CNT) Field Effect Transistor Device Modeling Henok Abebe The Service USC Viterbi School of Engineering Information Sciences Institute Collaborator Ellis Cumberbatch CGU School of Mathematical Sciences, USA WCM 2011
2 Outline Carbon Nanotubes (CNTs). CNTFET. Channel charge density compact model. CNTFET surface potential modeling. Channel current model. Results. Future work p-type CNTFET measured I-V Vdata and dhysteresis effects 2
3 Carbon Nanotubes (CNTs) Graphene: High current carrying capability. High carrier mobility (~10 6 cm 2 /(V.s)). High carrier saturation velocity (~10 6 m/s). Nearest carbon-carbon distance is a=0.41nm. Excellent thermal conductivity (~10 3 W/(K.m)) Figure 1: Graphene sheet 3
4 Zig-Zag, Zag, Armchair and Chiral CNTs Figure 2: Illustration of the graphene lattice, T is is the CNT long axis, a 1 and a 2 are the lattice vectors, C h is the CNT circumference or GNR width vector with components n and m (chiral numbers). Zig-zag tubes are (n, 0), armchair tubes are (n, n) and chiral tubes are (n, m). The chirality is determined by how many times you have to move in the a 1 direction (n) and how many times you have to move in the a 2 direction (m) in order to return to an equivalent starting point. 4
5 Zig-Zag Zag CNTs (symmetric) Figure 3: Counting a (5,0) zig-zag nanotube. The red stars srepresent ese the same carbon atom; the stars would overlap if you were to roll the graphene sheet into a tube.. Figure 3: n m 5 (semiconductor) If n m 3i (metallic) 5
6 Armchair CNTs (symmetric) Figure 4: Counting a (3,3) 3) armchair nanotube. The red stars represent the same carbon atom; the stars would overlap if you were to roll the graphene sheet into a tube.. armchair tubes do not open any bandgap, and always remain metallic. 6
7 Chiral CNTs (asymmetric). Figure 5: Graphene (n,m) map. If n m 3 i (metallic) otherwise, it is a semiconductor 7
8 CNTFET Figure 6: Single-walled CNT field effect transistor. 8
9 Channel charge density compact model Surface charge density, Q cnt, in terms of the surface potential, ψ s, is Q ( V V ) C CNT gs fb s ins where C ins 2 ins tins ln( 1) R t, R t w / 2, w a 3 n 2 m 2 nm, and a=0.142nm 9
10 Integral representation of the charge density Q cnt q [ 1 kbt (1 e ) (1 e 1 ) ][ Eq s Eq s qvds 2 ( ) ( ) 2 2 k T ( E m m where is the coefficient of DOS for CNT. b E ) ] de The CNT charge density can be simplified using a first sub-band band energy approximation: Q CNT q 2 n e i q s k T b (1 e qv k T b ds ) 10
11 CNTFET surface potential modeling Q CNT q 2 n e i q s k T b (1 e qv k T b ds ) ( V gs V fb ) C s ins Surface potential as 2 qvds kbt q ni K T b s ( V gs, Vds ) Vgs V fb W (1 e ) e q 2kbTCins q( V gs k V b T fb ) where Lambert W(x) function is the solution W to x We And where 13.8d d t
12 Channel current model The channel current of a ballistic CNT-FET, which is the net flux of forward and backward traveling carriers, can be derived using the first sub-band b energy approximation: I ds ln(1 e 2 E 2 2qV E 4 q s g q s ds kb Tq 2k T 2 k T h b ) ln(1 e b g ) where s ( V s gs, V ds 0), E g 0.765(ev.nm) d t and h is Planck's constant. 12
13 Results Figure 7: CNT-FET channel surface potential versus relative gate voltage V gs -V fb for nanotube analytical diameters d t =0.8, 08 1 and d15 1.5nm, high-k hkdielectric ti thickness t ins =10nm with K=15 is used and V ds =0V. 13
14 Results (continued) Figure 8: CNT-FET channel charge versus relative gate voltage V gs -V fb for nanotube analytical diameters d t =0.8, 1.0 and 1.5nm, high-k dielectric thickness t ins =10nm with K=15 is used and V ds =0V. 14
15 Results (continued) Figure 9: CNT-FET gate capacitance per unit length versus relative gate voltage V gs -V fb for nanotube analytical diameters d t =0.8, 1.0 and 1.5nm, high-k dielectric thickness t ins =10nm with K=15 is used and V ds =0V. 15
16 Results (continued) Figure 10: CNT-FET channel current versus drain-source voltage V ds for nanotube analytical diameters d t =0.8, 1.0 and 1.5nm, high-k dielectric thickness t ins=10nm with K=15 is used. 16
17 Future work Figure 11: P type back gated CNTFET device with t ox =50nm 17
18 Future work (continued) Figure 12: Channel current versus back gate voltage for V ds =0.2, 0.4 and 1V 18
19 Future work (continued) Figure 13: Channel current versus drain/source voltage for V gs =-3, -4 and -5V 19
20 p-type CNTFET measured I-V data and hysteresis effects Figure 14: Gate voltage vs drain current for V ds =1V and t ox =50nm 20
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