SECTION: Circle one: Alam Lundstrom. ECE 305 Exam 5 SOLUTIONS: Spring 2016 April 18, 2016 M. A. Alam and M.S. Lundstrom Purdue University


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1 NAME: PUID: SECTION: Circle one: Alam Lundstrom ECE 305 Exam 5 SOLUTIONS: April 18, 2016 M A Alam and MS Lundstrom Purdue University This is a closed book exam You may use a calculator and the formula sheet at the end of this exam Following the ECE policy, the calculator must be a Texas Instruments TI30X IIS scientific calculator There are three equally weighted questions To receive full credit, you must show your work and explain your answers The exam is designed to be taken in 60 minutes At the top of the page, be sure to fill in your name, Purdue student ID and identify the section you are in DO NOT open the exam until told to do so, and stop working immediately when time is called The last page is an equation sheet, which you may remove if you want to, after the exam begins 75 points possible, 25 per question 1) 25 points (5 point per part) 2) 25 points (5 points per part) 3) 25 points (5 points per part) Course policy I understand that if I am caught cheating in this course, I will earn an F for the course and be reported to the Dean of Students Read and understood: signature ECE305 1
2 Answer the multiple choice questions below by circling the one, best answer 1a) The magnitude of the electric field in the oxide of an MOS capacitor is typically 3 times larger than that of the electric field at the surface of the Si Why? a) Because the oxide is typically 3 times thinner than the Si b) Because the oxide is typically 3 times thicker than the Si c) Because the dielectric constant of the oxide is typically 3 times smaller than the dielectric constant of the semiconductor d) Because the dielectric constant of the oxide is typically 3 times larger than the dielectric constant of the semiconductor e) Because the minority carrier lifetime in oxide is typically 3 times longer than in Si 1b) Which of the following is true for a Ptype semiconductor in accumulation? a) The surface potential is positive b) The surface potential is negative c) The surface potential is zero d) The surface potential is φ F e) The surface potential is 2φ F 1c) Which of the following is true of the inversion charge in an MOS capacitor with a P type substrate when V G < V T? a) It is equal to C ox V G ( ) ( ) b) It is equal to C ox V G V T c) It is equal to C ox V G +V T d) It is equal to C V ox T e) It is approximately 0 1d) Which of the following is true for an Nchannel MOSFET biased under ONcurrent conditions? a) V GS < V T < V DSAT b) V GS < V T > V DSAT c) V GS < V DSAT d) V GS > V DSAT e) V GS 1e) How is an Nchannel MOSFET biased under OFFcurrent conditions? a) V GS = 0 = 0 b) V GS = 0 = V DD c) V GS = V DD = 0 d) V GS = V DD = V DD e) V GS = 005V DD = V DD ECE305 2
3 Exam 5 SOLUTIONS ECE 305 2) This problem is about the MOS capacitor whose energy band diagram is shown below You may assume that the semiconductor is silicon at 300 K and that the insulator is SiO2 with a relative dielectric constant of 39 and a thickness of 2 nm There is no charge at the oxidesi interface Also assume that the electrostatic potential in the silicon is zero as x Answer the following questions about this MOS capacitor 2a) Is the semiconductor in accumulation, flatband, depletion, or inversion? The electron is small near the surface than for x > W, so the semiconductor is either depleted or inverted We see that φ F = 0419 The bands are bent up by one φ F, which is less that 2φ F, so the semiconductor is depleted 2b) What is the numerical value of in V/cm,? ( is the electric field in the semiconductor at x = 0 + ) Explain how you got your answer D ox = K 0 ε 0 E ox = D S = K S ε 0 (no charge at the oxidesi interface) = K 0 K S E ox = K 0 K S E ox = = V/cm = V/cm ECE305 3
4 Exam 5 SOLUTIONS ECE 305 2c) What is the numerical value of the depletion width, W? Show your work φ S = 1 2 W W = 2 φ S = = cm W = 742 nm 2d) What is the numerical value of the electron concentration at the surface of the Si? That ( )? is, what is n x = 0 + n( x = 0 ) + ( = n i e E F E i ) k T B = n i e 0 = cm 3 n( x = 0 ) + = cm 3 2e) What is numerical value of the flat band voltage, V FB, of this MOS capacitor (in volts)? Be sure to include a sign The potential deep in the Si as x is 0 V The potential at the surface of the Si is The potential at the metal side of the gate oxide is: φ( x = x 0 ) = = = 0488 This is also the builtin potential (we are at equilibrium since the Fermi level in the gate is aligned with the Fermi level in the semiconductor To undo the effect of this builtin potential, we must apply an equal and opposite voltage to the gate V FB = V ECE305 4
5 Exam 5 SOLUTIONS ECE 305 3) The figures below show transistor IV characteristics for NMOS and PMOS transistors Assume that the transistors have a 1 micrometer width Also assume that the source and drain series resistances are 100 Ohms each 3a) What is the ONcurrent in Amperes of the PMOS device? Explain how you find it and circle the ONcurrent on the plot and label the circle with an A It is the current when the gate and drain voltages are at minus the power supply voltage Reading from the top curve on the right at Vds = 07 V, and Vgs = 07 V, we find: I ON = 100 ma 3b) What is the OFFcurrent of the PMOS device? Explain how you find it and circle the OFFcurrent on the plot and label the circle as B It is the current when the gate voltage is zero and the drain voltage is at minus the power supply voltage Reading from the top curve on the right (Vds = 07 V), we find: I OFF = A ECE305 5
6 Exam 5 SOLUTIONS ECE 305 3c) Approximately what is the threshold voltage of the PMOS device in saturation? Explain how you find it and indicate how you found it on the plot and mark with a C It is the gate voltage at which noticeable current begins to flow Reading from the figure on the left at Vds = 07 V (saturation), we see 03 V < V T < 02 V 3d) What is the transconductance, g m, of the PMOS device for large V DS and V GS? Explain how you got your answer, indicate how on the figure, and label it with a D Transconductance is change in drain current divided by change in gate voltage From the curve, we find: g m = ΔI D ΔV GS = g m = 30 ms ( 10 07) ma ( ) V = 30 ma V = 30 ms 3e) When the PMOS device is biased at V DS = V GS = 07 V, what is the voltage between the internal drain and the internal source of the transistor (ie you are being asked to account for the series resistors) From the figure, we apply KVL to find: I D R S + V DS I D R D + 07 = 0 V DS 07 + I D V DS = 05 V ( ) = ( ) = = 05 R S + R D ECE305 6
7 Exam 5 SOLUTIONS ECE 305 ECE305 7
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