ECE 145A/218A Power Amplifier Design Lectures. Power Amplifier Design 1


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1 Power Amplifiers; Part 1 Class A Device Limitations Large signal output match Define efficiency, poweradded efficiency Class A operating conditions Thermal resistance We have studied the design of smallsignal amplifiers The designs were based on smallsignal Sparameters. The output was often conjugately matched to increase gain. I DQ V DQ conjugate match: SS AC Load Line Re{ Z L }= Re Z OUT { } 5/4/07 1 of 18 Prof. S. Long
2 The small signal conjugate match leads to limitations on voltage and current swing. Not important for SS amps, but crucial for power amps. ΔV << V DQ ΔI << I DQ Power amps require a largesignal design methodology: ΔV and ΔI are significant compared with V DQ and I DQ. Power Amp Objective: Get the largest ΔV and ΔI without: 1. Clipping large saturation of gain;  distortion generated. Destroying the device. avoid breakdown I MAX must be within device specs P DISS must not overheat the device 5/4/07 of 18 Prof. S. Long
3 Device limitations and clipping. Every device has maximum voltage and current limits. Breakdown voltage: Electric field large enough to generate electronhole pair qv > E gap of semiconductor. Electrons injected into channel from source or into collector from emitter are accelerated in high field. S G D Electric field electrons holes Collisions transfer energy to Si atoms. Electron is released, accelerates creates hole. Electronhole pairs are then accelerated further generating more electrons, holes. This leads to rapid increase in current for voltages beyond breakdown AVALANCHE BREAKDOWN!!! 5/4/07 3 of 18 Prof. S. Long
4 Maximum Current GaAs FET: I DSS for FET = I GS = 0 I D qnv sat n ( V GS V T ) m also must avoid forward gate conduction on MESFET or PHEMT Si MOSFET: Imax specified by foundry or manufacturer Also must avoid gate oxide breakdown BJT: I MAX is limited by collector electric field profile when mobile charge fixed charge, Ε= qn ( D n)x ε electric field 0 transit delay f T We will discuss thermal limitations later. Heat generation will limit the operation of all device types 5/4/07 4 of 18 Prof. S. Long
5 Conjugate Match Revisited. + I d jb I L V OUT  R ds R L jb We have learned that max. power transfer occurs when R L = R ds. true for small signal condition no device limitations. But what happens when we have limitations on voltage and current? Suppose V max =10V, I max =1A, R ds =100Ω 1. Conjugate Match. R L R ds = 50Ω =R L V OUT = I max R L = 50V! clearly, I max can t be reached since V max =10V ( ) P OUT = V max / R L = = 1 4W 5/4/07 5 of 18 Prof. S. Long
6 . Load Line Match. R L = V max =10Ω I max P OUT = 5 0 =1.5W This uses the maximum capability of the device more realistically, improvement of 3 db is typical Here you can see the large signal load line with slope 1/R L V Dsat I MAX I DQ V DQ V BR 5/4/07 6 of 18 Prof. S. Long
7 We have now shown that different criteria are used for output matching a power amp than a small signal amp. You may have noticed that the large signal load line doesn t extend to V DS = 0. To avoid excessive distortion, we must also take into account the knee voltage (V Dsat or V CEsat ). Clipping will occur if the drain voltage swing extends into the ohmic region of the device characteristic. Thus, our definition of the large signal load line resistance must take this into account: RL VBR Vknee Imax = for maximum voltage swing Some additional PA concepts Efficiency η = POUT PDC x 100% Power Dissipation PD = PDC POUT Must be removed as heat. P D can also limit the maximum P OUT T max = 150 o C 5/4/07 7 of 18 Prof. S. Long
8 P DC P IN P OUT PowerAddedEfficiency PAE POUT P = IN PDC Gain should be at least 10dB to avoid significant reduction in PAE. Efficiency is important because 1) PA s are used for power ) Wasted power must be removed as heat 3) Wasted power consumes batteries faster Suppose Pout = 10 kw (FM broadcast transmitter) η (%) P D (kw) P DC (kw) /4/07 8 of 18 Prof. S. Long
9 First PA: Class A. Most similar to smallsignal amp. V DQ and I DQ set so that amp is always on. "on" time conduction angle = π = π T Case 1 : resistive load. bad idea for PA, but familiar. (we will refer later to this V DC as V DC1 ) V DC R L I MAX = I CQ I CQ V CQ =V DC / V DC = V BR Neglecting V knee, we find RL V = BR = Imax VDC ICQ 5/4/07 9 of 18 Prof. S. Long
10 I C ()= θ I CQ + I m sinθ (θ = ωt) Maximum value of I m = (just begins to clip) I CQ We can see that the average DC component is ICQ and the fundamental component of current is Im, OR: We can use Fourier integrals to determine P DC and P OUT. The DC term (a 0 ) can be used to calculate power dissipation: π VDC PDC = ic ( θ ) dθ π 0 V π DC = I + I sinθ dθ = V I π 0 CQ m DC CQ constant DC power, constant input current. You can use Fourier integrals to also find coefficients for fundamental and harmonics. T = π T/ 1 a0 = f ( x) dx T T T an = f ( x) sin( nx) dx T T T bn = f ( x) cos( nx) dx T T 5/4/07 10 of 18 Prof. S. Long
11 Power at fundamental frequency ω: n =1 π π 1 ai i I sin d I π 1 m = OUT ( ω) = m θ θ = m π sin θdθ = π π P OUT = 1 Re V * { mi m }= 1 V mi m V m = V DC ; I m = V m R L 1 V I V I 8 DC1 max DC1 max Thus: Pout = = R L and, P OUT = I mr L = I CQ = V DC 8R L since I max V = I CQ, BR DC V = V, R BR L = I max In terms of device limitations, the maximum output power is P OUT = 1 I max 4 V BR I max = V BRI max 8 5/4/07 11 of 18 Prof. S. Long
12 what about harmonics? n >1? 1 Iman = Imsinθ sin n θ d θ =0 π π  π with no nonlinearity in I c ( θ ), no harmonic currents. Efficiency: P DC = V DC I CQ = V DC R L I CQ V = R DC L so η = P OUT P DC = 1 4 ( 5% ) max! If we AC couple the load resistor: We have current divider. Efficiency can be much worse. so, bad idea for any power application 5/4/07 1 of 18 Prof. S. Long
13 For RF applications we can do much better. Case : inductive load. V DC = V DC = V DC1 / V DC R L I CQ V CQ =V DC V DC = V BR now, RL VBR Imax VDC ICQ = = (no change assume same device limitations) but: VDC VDC I max VBRI max OUT RL 4 8 VDC 1 DC = DC CQ = = DC1 RL P = = = same as case 1 P V I P η = 1 ( 50% ) 5/4/07 13 of 18 Prof. S. Long
14 we have P OUT ( case )= P OUT ( case 1) but P DC ( case )= 1 P DC( case 1) because: ( ) V case = ( 1) DC 1 V DC case Thus, the inductive feed allows the amplifier to produce the same output power with half the supply voltage. This also applies to tuned amplifiers. So: 50% of P DC can be converted into useful output power if we swing rail to rail. Alternatively, we can get times more P OUT for the same V DC if the device has sufficient breakdown voltage. (twice the voltage; twice the R L ) V Vm = VDC RL = I DC max V V I V I Pout = = = R 4 DC DC max DC1 max L 5/4/07 14 of 18 Prof. S. Long
15 But, what about a more typical situation where we have a large range of signal powers to be amplified? How much power gets dissipated in the device? PD = PDC POUT (heat in transistor) Power P D P = V DC DC I CQ (constant) Pout = V DC /R L Pout I m I CQ = V DC /R L We have doubled the efficiency (now 50%), but still have maximum power dissipated in device at zero input. undesirable for power amp where high powers may be required. ok for driver stage low power; highly linear. 5/4/07 15 of 18 Prof. S. Long
16 Thermal Limitations T J 150 C why? reliability failure mechanisms are strongly temperature dependent MTTF e Ea/KT Ea = activation energy Thermal model. T J <150 C R TH J C T C package heat sink R THC HS T HS R TH HS A T Ambient air T = 5 C 5/4/07 16 of 18 Prof. S. Long
17 Thermal Resistance relates T to power dissipation (like ohm s law for heat) T = R P + T J TH, J C D C = ( R + R + R ) P + T TH, J C TH, C HS TH, HS A D A R TH has units of C /watt T J R TH JC T C R THC HS T HS R TH HS A T A 5/4/07 17 of 18 Prof. S. Long
18 Class A Power Amplifier Summary 1. Device limitations (V BR and I MAX and T MAX ) constrain the design for a PA. R opt V = BR V I MAX knee * not Γ OUT! Large signal load line match. T MAX =150 C for reliable operation 3. Waste power, P D = P DC P OUT is converted to heat. Must be removed 4. Efficiency, P OUT P DC, or PAE, P OUT P IN P DC are critical for PAs. For Class A with same output power, same R L : Resistive DC feed (1) Inductive feed () V DC V DC1 V DC = V DC1 / η 5% max 50% max P OUT VDC1 V DC max 8R R L = VBR VDC1 I I L V V = R 8R DC DC1 up to V BR up to V BR MAX BR DC DC1 = = = CQ L V V V I I I MAX CQ CQ L 5/4/07 18 of 18 Prof. S. Long
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