# Section 1: Common Emitter CE Amplifier Design

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1 ECE 3274 BJT amplifier design CE, CE with Ref, and CC. Richard Cooper Section 1: CE amp Re completely bypassed (open Loop) Section 2: CE amp Re partially bypassed (gain controlled). Section 3: CC amp (open loop) Section 1: Common Emitter CE Amplifier Design Designing procedure of common emitter BJT amplifier has three areas. First, we have to set the Q-point, which is the DC operating point. Since, no specification regarding the Q-point is mentioned in the design requirements; it leaves the designer enough freedom to choose the operating point as necessary for the application. However, remember that the specifications given in terms of input and output impedance, gain, frequency response characteristics and peak output voltages ultimately restricts the Q-point in a narrow window. It is difficult derive the Q-point without some intelligent guess and the following steps would work out for the given conditions. We will start to choose a Q-point to allow maximum output voltage swing. In this configuration, R E is completely bypassed. The circuit diagram with necessary variables is provided in CE Figure 1. Vcc Vcc Rc Cbyp Vout Cout Rin Vin2 Rb1 Vin Rgen 50 Function Generator Ri Cin Chi Vb Re Chi2 2N2222 Ve Ce Rout Rload Rin2 Page 1 of 24

2 CE Figure 1: BJT Common Emitter BJT Figure 2: BJT characteristics. The example not your Q-point Step CE 1.1: Measure the device parameters Page 2 of 24

3 For the design of the amplifier, the 3 parameter values required are r o and gm. Derived from the transistor characteristics curve shown in CE Figure 2, one can set an approximate Q-point (V CE and I C) in the active region and measure ro and β. We will solve for V ce and estimate I C. Solve for V CE see below. Use Vout peak to find I load peak: Iload = Vout / Rload. For an approximate I C Q-point use I C 2.2 * I load peak this is not the solution to your design Q- point. We can use an approximate I C because ro and β will not very much with small changes in Q-point. The Vce SAT (Vce saturation voltage) is found from the BJT characteristics curve where the curve begins to flatten out 0.2 Vdc. ro = ΔV CE / ΔI C the slope of a line thru Q-point β AC = ΔI C / ΔI B measured around Q-point Vce SAT = Vce begins to flatten r π = ( β V T ) / I C r π is base to emitter resistance Hybrid Pie model. Where V T = kt/q at room temperature is V T 26mV. Plot the estimated Q-point (V CE,I C) on the BJT characteristics curve. Plot the estimated Q-point (V CE,I C) on the BJT characteristics curve. CE Part 2: Determine the Q-point. Start with your BJT and selecting 4 resistors. Step CE2.1: Choose V E Because V BE will decrease 2.5mV / C rise we set V E = between 2V to 3V. V E and R E will provide negative feedback to stabilize β and V BE. Step CE2.2: Calculate the midpoint V C with Re complete bypassed Re = Reb, and Ref = 0 Midpoint selection will allow for maximum output voltage swing. We will add 20% to Vout so the design is not on the edge of the solution. V C(max) = V CC - (Vout + 20%Vout) V C(min) = V E+V CE sat + (Vout + 20%Vout) V C = (V C(max) + V C(min)) / 2 Midpoint V C Q-point V CE = V C V E This is the Q-point V CE Step CE2.3: Calculate R C. The DC equation: V CC V C = V RC= R C I C voltage across Rc derived from Vcc and Q-point Vc. The AC equation: Vout = i c ( R C r o R L ) output voltage Vout peak Rewrite: Vout = i c Rc (r o R L) / (Rc + (r o R L)) Parallel resistance equation Substituting in v RC = i c R C Combined equation: Vout = V RC (r o R L) / (Rc + (r o R L)) Page 3 of 24

4 Solve for Rc; Add 20%Vout so the collector current is not set to an edge. V R C = CC V C (r V out +20%Vout o R L ) (r o R L ) Step CE2.4: Calculate I C, I E, and Re. I C = (V CC V C) / R C I B = I C / β The Q-point collector current. The base current. I E = I C (β + 1) / β emitter current. Re = V E / I E Total emitter resistance. Thus, Q-point is (V CE, I C). Vin Rin Rgen AC Ri Rin2 Vin2 Ib Rπ Rb B C E NPN β Ib ro Vout Rc Rload Rout CE Figure 3: Common Emitter Small Signal Equivalent Circuit CE Part 3: Determine bias resistors. Step CE3.1: Calculate R E. Design for the sum Ref and Reb Later we will design for a desired Av (voltage gain) by using (Ref) and (Reb) to control the Av. R E = Ref + Reb I E = I C (β +1) / β R E = V E I E Step CE3.2: Calculate R b1, R b2. Page 4 of 24

5 V B = V E + V BE V BE is normally between 0.6V and 0.7V Ib = Ic / β Current thru Rb1 is set to 10 * I B Current thru Rb2 is set to 9 * I B Rb1 = (Vcc V B )/ (10* I B ) Rb2 = V B / (9 * I B) Or Require Rin set to a given value. Need Vcc, Vb, r π and Ib. Given Rin calculate Rin2. Rin2 = Rin Ri Solve Rin2 needed to Rin requirements. Solve for Rb from Rin2 and Rbase. Rbase = r π Re completely bypassed. Rb = 1 /((1 / Rin2 ) (1 / Rbase )) Solve for Rb needed to Rin requirements. Find Rb1 first then Rb2 Rb1 = Vcc / (( Vb / Rb ) + Ib) Solve for Rb1. Rb2 = Vb / ((( Vcc Vb) /Rb1) Ib ) Solve Rb2 from Vb and current thru Rb2: Irb2 = Ir b1 Ib Check Rin meets requirements Rbase = r π Re completely bypassed. Rb = Rb1 Rb2. Rin2 = Rb Rbase Rin = Ri + Rin2 CE Part 4: Calculating impedance and Gain Refer to the small signal equivalent of the circuit you have just built in CE Fig. 3. We can calculate the following: Step CE4.1: Input Impedance: AC characteristics Rb = Rb1 Rb2 the two base bias resistors. If Re completely bypassed with C E then Rbase = r π Page 5 of 24

6 Rin2 = Rb Rbase Rin = Ri + Rin2 Step CE4.2: Output Impedance If Re completely bypassed with C E then Rout = R C r 0. With Ref = 0 Step CE4.3: Voltage Gain AC voltage Vout = - β Ib (Rout Rload ro) Note: use the correct Rout depending on Ref AC voltage Vin = (Rin/Rin2) Vin2 Input signal from the function generator. AC voltage Vin2 = v b Input signal on the base Av2 = Vout / Vin2 = -β (Rc ro Rload) / r π voltage gain at base Av = Vout / Vin = - β (Rc ro Rload) / ((Rin2+Ri) / Rin2) ( r π ) Rearrange Av = - β (Rin2 / (Rin2 + Ri)) * (Rd ro Rload) / r π Vgen = ((Rin + Rgen) / Rin ) * (Vout/ Av) the open circuit voltage of the function generator. Step CE4.4: Current Gain Ai = Iload Iin = Vout Rload Vin Rin = Av Rin Rload Step CE4.5: Power gain G = Pout / Pin = Vout * Iload / Vin * Iin = Av * Ai In decibels G db = 10log ( Av * Ai ) Step CE4.6: Vin and Voc of Vgen Input signal level need to produce the required output voltage. Vin = Vout / Av The open circuit voltage of the generator to produce the required output voltage. Because of Voltage divider because the output impedance of the Rgen = 50Ω Vgen = Vin (Rgen + Rin) / Rin Use this value in LTspice and the laboratory Function generator Page 6 of 24

7 CE Part 5: Frequency response With the Q-point being set after the sequence of steps, we can go for the selection of capacitors and finally connect the signal generator at input and measure the output amplified waveform. First we will select C in, C out and C E which jointly would set the roll-off beyond the lower cut-off frequency. Set any frequency within the range as your lower cut-off frequency and let us call it f L. Three capacitors will introduce 3 zeros in the transfer function of the system. Because we will set 3 zeros at the same frequency we must use the Band Width Shrinkage factor. BWshrinkage = 2 1 n 1 Where n is the number of zeros for low frequency breakpoints at same frequency. Setting 3 frequencies equal, we get, 1 f Cin = f Cout = f CE = f L Find the C for each breakpoint f Cin, f Cout, and f CE where n = 3. C = 1 2πf C (R seen by C) Where C is the capacitor that sets the breakpoint f C RemitterBase is the impedance looking in the BJT emitter to base. RemitterbBase = (r π + Rb (Ri + Rgen)) / (β + 1) Small value R is the Thevenin equivalent resistance seen by the capacitor. R CE = Re (ro + R C R Load) RemitterBase) The following table enlists the particular expressions. Rsig C in Cout C E C hi Rgen+Ri Rsig + Rin2 RLoad + Rout Re ( (ro + R C R Load) RemitterBase) Rsig Rin2 Page 7 of 24

8 C hi2 Rout Rload CE Table 1: Resistance Seen By Capacitors In this case because Chi, and Ch2 are to the same break point. We must use the band shrinkage factor with n = 2. We need only to find a two poles at F h / bandshrinage = f chi = f ch2 to set the high frequency cutoff. Set Fchi = Fchi2 = Fh / Rb = Rb1 Rb2 Rbase = r π Rin2 = Rb Rbase R seen by C hi C hi = R Chi = (Rgen + Ri) Rin2 1 2πf Chi (R seen by C hi ) R seen by C hi2 C hi2 = R Chi2 = Rout Rload Note: use the correct Rout depending on Ref 1 2πf Chi2 (R seen by C hi2 ) Page 8 of 24

9 Section 2: CEwRef Common Emitter with Re that partially is bypassed by Ce. R E = Ref + Reb the total R E for the DC bias design. Ref is the portion of Re that is not bypassed by Ce. Reb is the portion of Re that is bypassed by Ce. CEwRef Part 1: Measure the device parameters For the design of the amplifier, the 3 parameter values required are Vce SAT, r o and β. Derived from the transistor characteristics curve shown in BJT Figure 2 above, one can set an approximate Q-point (V CE and I C) in the active region and measure ro and β. We will solve for V ce and estimate I C. Solve for V CE see below. Use Vout peak to find I load peak: Iload = Vout / Rload. For an approximate I C Q-point use I C 2.2 * I load peak this is not the solution to your design Q- point. We can use an approximate I C because ro and β will not very much with small changes in Q-point. The Vce SAT (Vce saturation voltage) is found from the BJT characteristics curve where the curve begins to flatten out 0.2 Vdc. ro = ΔV CE / ΔI C the slope of a line thru Q-point β AC = ΔI C / ΔI B measured around Q-point Vce SAT = Vce begins to flatten r π = ( β V T ) / I C r π is base to emitter resistance Hybrid Pie model. Where V T = kt/q at room temperature is V T 26mV. Plot the estimated Q-point (V CE,I C) on the BJT characteristics curve. CEwRef Part 2: Determine the Q-point. Start with your BJT and selecting 4 resistors. Step CEwRef 2.1: Choose V E Because V BE will decrease 2.5mV / C rise we set V E = between 2V to 3V. V E and R E will provide negative feedback to stabilize β and V BE. Page 9 of 24

10 Step CEwRef 2.2: Calculate the midpoint V C with Re partially bypassed Re = Reb + Ref Midpoint selection will allow for maximum output voltage swing. We will add 20% to Vout so the design is not on the edge of the solution. This will also help with the additional loading because of high frequency capacitors as the frequency approaches the high frequency break points. V C(max) = V CC - (Vout + 20%Vout) V C(min) = V E+V CE sat + (Vout + 20%Vout) V C = (V C(max) + V C(min)) / 2 Midpoint V C Q-point V CE = V C V E This is the Q-point V CE Step CEwRef 2.3: Calculate R C. Looking into the collector we see r o + Ref [ (r π + Rb1 Rb2 (Ri +Rgen) ] / (β +1) r o so we will use just r o. The DC equation: V CC V C = V RC= R C I C voltage across Rc derived from Vcc and Q-point Vc. The AC equation: Vout = i c ( R C r o R L ) output voltage Vout peak Rewrite AC: Vout = i c Rc (r o R L) / (Rc + (r o R L)) Parallel resistance equation Substituting in v RC = i c R C Combined equation: Vout = V RC (r o R L) / (Rc + (r o R L)) Solve for Rc; Add 20%Vout so the collector current is not set to an edge. V R C = CC V C (r V out +20%Vout o R L ) (r o R L ) Step CEwRef 2.4: Calculate I C, I E, and Re. I C = (V CC V C) / R C The Q-point collector current. I B = I C / β The base current. I E = I C (β + 1) / β emitter current. Re = V E / I E Total emitter resistance. Thus, Q-point is (V CE, I C). We have already choose V E to be between 2V to 3V to provide negative feedback in the DC bias circuit. We will use Ve and I C where Ie = ((β +1) / β) Ic. Now calculate Re =Ie (Ref +Reb) the total emitter resistance. We now have, Ve, Vc, Rc, Re, Ic, Ie, Vce, Vce SAT Page 10 of 24

11 Vcc Vcc Rc Cbyp Vout Cout Rin Vin2 Rb1 Vin Rgen 50 Function Generator Ri Rin2 Cin Chi Vb Rb2 Ref Reb Chi2 2N2222 Ve Ce Rout Rload CEwRef Figure 1: Amplifier with emitter partially bypassed. Vin Rin Rgen AC Ri Rin2 Vin2 Ib Rπ Rb C B E Ref NPN β Ib Ie ro Vout Rc Rload Rout CEwRef Figure 2: Small signal model with partial bypass of Re Page 11 of 24

12 CEwRef Part 3 Calculating impedance and Gain with Ref We use the same Q-point and bias resistors Rb1, Rb2, Rc, and Re = Ref + Reb. Step CEwRef3.1: find Ref based on Voltage Gain requested Note: i b is the AC base current that results from Vin. Looking into the collector we see ro + Ref [ (rπ + Rb1 Rb2 (Ri +Rgen) ] / (β +1) ro so we will use just ro. AC voltage Vout = - β i b (Rc Rload ro) Note: use the approximant ro because Ref is not known yet. AC voltage Vin = (Rin/Rin2) Vin2 Input signal from the function generator. AC voltage Vin2 = i b(rπ + (β + 1) Ref) Input signal on the base Given Rin calculate Rin2. Rin2 = Rin Ri Solve Rin2 needed to meet the Rin requirements. Av2 = Av * Rin / Rin2 Av2 at base needed to meet Av requested. Av2 = Vout / Vin2 = -β (Rc ro Rload) / (r π + (β + 1) Ref) voltage gain at base, we do not need to find i b since i b cancels. Step CEwRef3.2: Solve for Ref by using gain at base Av2. Ref = = [ ( -β (Rc ro Rload) / Av2 ) - r π ] / ( β + 1) from Av2 or use equation below Step CEwRef3.3: Solve for Ref by using overall gain Av. Av = Av2 * Rin2 / Rin Av = Vout / Vin = - β (Rc ro Rload) / (Rin/Rin2) (r π + (β + 1) Ref) voltage gain at input Av = - β (Rin2/Rin) (Rc ro Rload) / (r π + (β + 1) Ref) Rearrange Av to solve for Ref from requested Av Ref = -( (β (Rin2/Rin) (Rc ro Rload) / Av) - r π) / (β + 1) from Av overall gain Step CEwRef3.4: Solve for Reb from Re and Ref Remember that Re is the total emitter residence from step CEwRef 2.4. Reb = Re Ref Page 12 of 24

13 Step CEwRef4.1: Rb1 and Rb2 based on requested Rin Require Rin set to a given value. Need Vcc, Vb, r π and I B (DC bias base current). Given Rin calculate Rin2. Rin2 = Rin Ri Solve Rin2 needed to meet the Rin requirements. Solve for Rb from Rin2 and Rbase. Rbase = r π + (β + 1) (Ref (ro + Rc Rload)) Looking into the Base of the BJT. Rb = 1 /((1 / Rin2 ) (1 / Rbase )) Solve for Rb needed to Rin requirements. Find Rb1 first then Rb2 I B = I C / β DC bias base current. Rb1 = Vcc / (( Vb / Rb ) + Ib) Solve for Rb1. Rb2 = Vb / ((( Vcc Vb) /Rb1) Ib ) Solve Rb2 from Vb and current thru Rb2: Irb2 = Ir b1 Ib Check Rin meets requirements Rbase = r π + (β + 1) (Ref (ro + Rc Rload) Rb = Rb1 Rb2. Rin2 = Rb Rbase Rin = Ri + Rin2 Step CEwRef4.2: Input Impedance: AC characteristics Rb = Rb1 Rb2 Where Ref is the part of R E that is not bypassed by C E. Rbase = r π + (β + 1) (Ref (ro + Rc Rload)) Looking into the Base of the BJT. Rin2 = Rb Rbase Rin = Ri + Rin2 Page 13 of 24

14 Step CEwRef4.3: Output Impedance with Ref If Re partially bypassed with C E bypassing Ref. Rb = Rb1 Rb2. RemitterBase is the impedance looking in the BJT emitter toward the base. RemitterBase = (r π + Rb (Ri + Rgen)) / (β + 1) Small value, because divided by β +1. The complete equation below for Rout, Rout = R C ( r 0 + Ref [r π + Rb (Ri + Rgen) ] / (β +1)) Because r o is greater than 30kΩ we approximate Rout = Rc large = Rc Step CEwRef4.4: Current Gain Ai = Iload Iin = Vout Rload Vin Rin = Av Rin Rload Step CEwRef4.5: Power gain G = Pout / Pin = Vout * Iload / Vin * Iin = Av * Ai In decibels G db = 10log ( Av * Ai ) Step CEwRef4.6: Vin and Voc of Vgen Input signal level need to produce the required output voltage. Vin = Vout / Av The open circuit voltage of the generator to produce the required output voltage. Because of Voltage divider because the output impedance of the Rgen = 50Ω Vgen = Vin (Rgen + Rin) / Rin Use this value in LTspice and the laboratory Function generator. Page 14 of 24

15 CEwRef Part 5: Frequency response with Ref With the Q-point being set after the sequence of steps, we can go for the selection of capacitors and finally connect the signal generator at input and measure the output waveform. Step CEwRef 5.1: Low frequency cut off. F L First we will select C in, C out and C E which jointly would set the roll-off beyond the lower cut-off frequency. Set any frequency within the range as your lower cut-off frequency and let us call it f L. Three capacitors will introduce 3 zeros in the transfer function of the system. Because we will set 3 zeros at the same frequency we must use the Band Width Shrinkage factor. BWshrinkage = 2 1 n 1 Where n is the number of zeros for low frequency breakpoints at same frequency. Setting 3 frequencies equal, we get, 1 f Cin = f Cout = f CE = f L Find the C for each breakpoint f Cin, f Cout, and f CE where n = 3. C = 1 2πf C (R seen by C) Where C is the capacitor that sets the breakpoint f C R is the Thevenin equivalent resistance seen by the capacitor. RemitterBase is the impedance looking in the BJT emitter to base. RemitterbBase = (r π + Rb (Ri + Rgen)) / (β + 1) Small value R CE = Reb (Ref + (ro + R C R Load) RemitterBase) Page 15 of 24

16 Step CEwRef 5.2: High frequency cut off. F H C hi Sets the higher cut-off frequency f H which is to be set from the specified range. In this case because Chi, and Ch2 are to the same break point. We must use the band shrinkage factor with n = 2. We need only to find a two poles at F h / bandshrinage = f chi = f ch2 to set the high frequency cutoff. Set Fchi = Fchi2 = Fh / Rb = Rb1 Rb2 Base bias resistors Rbase = r π + (β + 1) (Ref (ro + Rc Rload)) Looking into the Base of the BJT. Rin2 = Rb Rbase R seen by C hi R Chi = (Rgen + Ri) Rin2 C hi = 1 2πf Chi (R seen by C hi ) R seen by C hi2 C hi2 = R Chi2 = Rout Rload Note: use the correct Rout depending on Ref 1 2πf Chi2 (R seen by C hi2 ) The following table list the equivalent resistance expressions seen by the capacitors. Rsig Rgen+Ri RemitterBase (r π + Rb (Ri + Rgen)) / (β + 1) C in Rsig + Rin2 Cout RLoad + Rout Reb (Ref + (ro + R C R Load) RemitterBase) C E C hi Rsig Rin2 C hi2 Rout Rload CEwRef Table 1: Resistance Seen By Capacitors Page 16 of 24

17 Section 3: Common Collector CC Amplifier Design Designing procedure of common collector BJT amplifier has three areas. First, we have to set the Q-point, which is the DC operating point. Since, there is no specification regarding the Q-point in the design requirements; it leaves the designer enough freedom to choose the operating point as necessary for the application. However, remember that the specifications are in terms of input and output impedance, gain, frequency response characteristics and peak output voltages ultimately restricts the Q-point in a narrow window. It is difficult to derive this point without some intelligent guess and the following steps would work out for the given conditions. We will start to choose a Q-point to allow maximum output voltage swing For the Common Collector configuration, the circuit diagram shown in CC Figure 1. The small signal equivalent model in CC Figure 3. For this configuration, same steps are involved for the calculation of Rb1, Rb2 and R E with few minor changes. Note that R C is absent in this case Vcc Vcc Vin Vin2 Rb1 Cbyp Ri Cin Vb 2N2222 Vout Rgen 50 Chi Rb2 Riso Cout Function Generator Rin Rin2 Re Chi2 Rload Rout Figure 1: BJT Common Collector CC configuration Page 17 of 24

18 CC Figure 2: CC BJT curve. CC Part 1: Measure the device parameters Step CC1.1: We need to estimate a Q-point to find an estimate for ro and gm. For the design of the amplifier, the 2 parameter values required are r o and β. Derived from the transistor characteristics curve shown in CC Fig.2, one can set an approximate Q-point (V CE and I C) in the active region and measure ro and β. We will solve for V CE and estimate I C. Solve for V CE see below. Use Vout peak to find I load peak: Iload = Vout / Rload. For an estimated I C Q-point use I C 2.6 * I load peak this is not the solution to your design Q- point. We can use an estimated I C because ro and β will not very much with small changes in Q- point. ro = ΔV CE / ΔI C the slope of a line thru the estimated Q-point β = ΔI C / ΔI B measured around the estimated Q-point Plot the estimated Q-point (V CE, I C) on the BJT characteristics curve. From the curves CC Fig. 2 estimate V CEsat the point where the curve begins to flattens out 0.2 Vdc Page 18 of 24

19 CC Part 2: Find the Q-point Step CC2.1: Derive V E and V CE Q- point We will start with V E(max) and V E(min). V CEsat = 0.2V VoutEmitter = Vout + I Load * Riso The AC output voltage at the emitter. V E(max) = Vcc V CEsat (VoutEmitter + 20%VoutEmitter) V E(min) = VoutEmitter + 20% VoutEmitter V E = (V E(max) + V E(min)) / 2 Midpoint V E Q-point V CE = V CC - V E The V CE Q-point Step CC2.2: Now find the value of R E and I E The DC equation: V E = R E I E The AC equation: VoutEmitter = i e ( R E r o (R Load + Riso) ) Rewrite: VoutEmitter = i e R E (r o ( R L + Riso) )/ (R E + (r o (R L + Riso)) Parallel resistance equation Substituting in V E = i e R E Combined equation: VoutEmitter = V E (r o (R Load + Riso)) / (R E + (r o (R Load + Riso)))) Solve for R E; Add 20% VoutEmitter t so the collector current is not set to an edge. R E = equation V E V outemitter + 20%V outemitter (r o R L + Riso ) (r o R L + Riso) Rearranged combined Calculate I E I E = V E / R E Ic = I E (β / (β + 1)) CC Part 3: Find Rb1, and Rb2. (2 Methods) Method 1. Step CC3.1: Calculate Rb1, Rb1. Based on I B We will set the current in the base bias resisters Rb1, and Rb2 lower then 10*Ib from CE keep the Rin to a higher value. Irb1 = 3*I B and Irb2 = 2*I B Current thru the base bias resistors V B = V E + V BE Q - point values Rb1 = (Vcc Vb) / 3 I B Rb2 = Vb / 2 I B Page 19 of 24

20 Rb = Rb1 Rb2 Base bias resistors. Method 2. Step CC3.2: Calculate Rb1, and Rb2 Based on the requested Rin Require Rin set to a given value. Need Vcc, Vb, r π, ro, β, Re, Rload, and Ib. Given Rin calculate Rin2. Rin2 = Rin Ri Solve Rin2 needed to Rin requirements. Solve for Rb from Rin2 and Rbase. Rbase = r π + (β + 1) ((ro R E (Riso + Rload))) Impedance looking into BJT base at midband. Rb = 1 /((1 / Rin2 ) (1 / Rbase )) Solve for Rb from Rin2, and Rbase to meet Rin requirements. Find Rb1 first then Rb2 Rb1 = Vcc / (( Vb / Rb ) + Ib) Solve for Rb1. Rb2 = Vb / ((( Vcc Vb) /Rb1) Ib ) Solve Rb2 from Vb and current thru Rb2: Irb2 = Ir b1 Ib Rin Rgen AC Vin Ri Rin2 Vin2 Ib Rπ Rb E E C NPN β Ib Re ro Riso Rout Vout Rload CC Figure 3: Small signal equivalent model for common collector model CC Part 4: Calculate Rin, Rout, Av, and Ai Step CC4.1: Input Impedance: Rb = Rb1 Rb2 Rbase = r π + (β + 1) ((ro R E (Riso + Rload))) Impedance looking into BJT base. Rin2 = Rb Rbase Page 20 of 24

23 With the Q-point being set after the sequence of steps, we can go for the selection of capacitors and finally connect the signal generator at input and measure the output amplified waveform. Step CC5.1: Low frequency cut off. F L First we will select C in, and C out which jointly would set the roll-off beyond the lower cut-off frequency. Set any frequency within the range as your lower cut-off frequency and let us call it f L. Two capacitors will introduce 2 zeros in the transfer function of the system. Because we will set 2 pole at the same frequency we must use the Band Width Shrinkage factor. BWshrinkage = 2 1 n 1 n = 2 Where n is the number of zeros for low frequency breakpoints at same frequency. Setting 2 frequencies equal, we will, multiply the F L by the Band Width Shrinkage factor f Cin = f Cout = f L Find the C for each breakpoint f Cin, and f Cout, where n = 2. C = 1 2πf C (R seen by C) Where C is the capacitor that sets the breakpoint f Cin, and f Cout R is the Thevenin equivalent resistance seen by the capacitor. Step CC 5.2: High frequency cut off. F H Chi, and Chi2 on the contrary, sets the high cut-off frequency f H which is to be set from the specified range. Where n = 2 the number of high frequency break points at the same frequency. In this case because Chi, and Ch2 are set to the same break point. We must use the band shrinkage factor with n = 2. We need only to find a two poles at F h / bandshrinage = f chi = f ch2 to set the high frequency cutoff. Setting the 2 high frequencies break point equal, we will, divide the Fh (high frequency cutoff desired) by the Band Width Shrinkage factor Set Fchi = Fchi2 = Fh / Rbase = r π + ((β + 1) * (ro R E (Rload + Riso))) Impedance looking into BJT base. Rb = Rb1 Rb2 Rin2 = Rb Rbase R seen by C hi R Chi = (Rgen + Ri) Rin2 Page 23 of 24

24 C hi = 1 2πf Chi (R seen by C hi ) R seen by C hi2 R Chi2 = Rout Rload C hi2 = 1 2πf Chi2 (R seen by C hi2 ) The following table enlists the particular expressions. Thevenin equivalent resistance seen by the capacitor. Rsig C in Cout Chi Chi2 Rgen+Ri Rsig + Rin2 R Load + Rout Rsig Rin2 Rout Rload CC Table 1: Resistance Seen By Capacitors Page 24 of 24

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