DC Biasing. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

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Contents Three States of Operation BJT DC Analysis Fixed-Bias Circuit Emitter-Stabilized Bias Circuit Voltage Divider Bias Circuit DC Bias with Voltage Feedback Various Dierent Bias Circuits pnp

1 Contents Three States of Operation BJT DC Analysis Fixed-Bias Circuit Emitter-Stabilized Bias Circuit Voltage Divider Bias Circuit DC Bias with Voltage Feedback Various Dierent Bias Circuits pnp Transistors Bias Stabilization Stability Factors Stability of Transistor Circuits with Active Components Practical Applications Relay Driver Transistor Switch Transistor Switching Networks Logic Gates Current Mirror Voltage Level Indicator Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 DC Biasing Biasing refers to the DC voltages applied to the transistor to put it into active mode, so that it can amplify the AC signal. The DC input establishes an operating point or quiescent point called the Q-point. Proper DC biasing should try to set the Q-point towards the middle of active region, e.g., Point B in the gure below. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

2 Three States of Operation Three States of Operation Proper DC biasing sets the BJT transistor into the active state, so that it can amplify the AC signal. Let us remember the states of the transistor: Active: Operating state of the amplier: IC = βi B. Base-Emitter (BE) junction: forward-biased (ON). Base-Collector (BC) junction: reverse-biased (OFF). Cut-O: The amplier is basically o. There is no current, i.e., IC = I B = I E = 0 A. Base-Emitter (BE) junction: reverse-biased (OFF). Base-Collector (BC) junction: reverse-biased (OFF). Saturation: The amplier is saturated. Voltages are xed, e.g., VCE = V CE(sat) = 0 V. Output is distorted, i.e., not the same shape as the input waveform. Base-Emitter (BE) junction: forward-biased (ON). Base-Collector (BC) junction: forward-biased (ON). Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 BJT DC Analysis BJT DC Analysis 1. Draw the DC equivalent circuit (signal frequency is zero, i.e., f = 0) a) Capacitors are open circuit, i.e., X C. b) Kill the AC power sources (short-circuit AC voltage sources and open-circuit AC current sources). c) Inductors are short circuit or replaced by their DC resistance (winding resistance) if given, i.e., X L Write KVL for the loop which contains BE junction a) Take V BE = V BE(ON) to ensure the transistor is ON (or not in the cut-o state). Note: For a pnp transistor, V EB = V BE(ON). b) Determine the base current I BQ (or emitter current I EQ ). 3. Write KVL for the loop which contains CE terminals a) Assume the transistor is in the active state and take I CQ = βi BQ (or I CQ = αi EQ ). b) Calculate V CEQ. c) If V CEQ V CE(sat) then the transistor is in the saturation (SAT) state (i.e., I CQ βi BQ ), so take V CEQ = V CE(sat) and recalculate I CQ. NOTE: Normally, a BJT should not be in the saturation state if it is used as an amplier. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

3 Most common four common-emitter biasing circuits are given below 1. Fixed-Bias Circuit 2. Emitter-Stabilized Bias Circuit 3. Voltage Divider Bias Circuit 4. DC Bias with Voltage Feedback Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Fixed-Bias Circuit Fixed-bias circuit is given below Let us start DC analysis by drawing the DC equivalent circuit as shown below Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

4 Base-Emitter Loop Let us continue with the BE loop shown below Writing KVL on the BE loop V CC I B R B V BE = 0 and given V BE = V BE(ON), we obtain I BQ as I BQ = V CC V BE(ON) R B Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Collector-Emitter Loop Let us continue with the CE loop shown below Writing KVL on the CE loop (i.e., DC load-line equation) V CC I C R C V CE = 0 and given (assuming BJT is in active state) we obtain V CEQ as I CQ = βi BQ V CEQ = V CC I CQ R C Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

5 Saturation The term saturation is applied to any system where levels have reached their maximum values. A saturated sponge is one that cannot hold another drop of water. For a transistor operating in the saturation region, the current is a maximum value for the particular design. Note that it is in a region where the characteristic curves join and the collector-to-emitter voltage is at or below V CE(sat). If we approximate the curves of the left gure by those appearing in the right gure, then the saturation voltage V CE(sat) is assumed to be 0 V, i.e, V CE(sat) = 0 V Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 For the xed-bias conguration shown below, the resulting saturation current (i.e., maximum current) I C(sat) is given by I C(sat) = I C(max) = V CC V CE(sat) R C = V CC R C Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

6 Example 1: For the gure above, calculate all DC currents and voltages. Solution: Let us nd I BQ, I CQ and V CEQ as follows I BQ = V CC V BE(ON) R B = k I CQ = βi BQ = (50)(47.08µ) = 2.35 ma, = µa, V CEQ = V CC I CQ R C = 12 (2.35m)(2.2k) = 6.83 V. As V CEQ > V CE(sat) = 0 V, transistor is in the active state. Let us also prove it by showing V BCQ < V BC(ON) = 0.7 V as follows V BCQ = V BQ V CQ = V BEQ V CEQ = = 6.13 V < 0.7 V. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 DC Load Line DC load line equation comes from KVL equation in the CE loop (i.e., output loop). For the xed-bias circuit, DC load line equation is given by V CE = V CC I C R C Let us draw the load line over output characteristics curve as shown below. The intersection of the load-line with the output characteristics curve (determined by the base current I BQ ) is the operating point, i.e., Q-point. The Q-point is the operating point where the value of R B sets the value of I BQ that controls the values of V CEQ and I CQ. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

7 Fixed-bias load line equation: V CE = V CC I C R C The load line end points are the SATURATION and CUTOFF points, i.e., I C(sat) end point (on the current axis): I C = V CC /R C V CE = 0 V V CE(cutoff) end point (on the voltage axis): V CE = V CC I C = 0 ma Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 The Eect of I B on the Q-Point Movement of the Q-point with increasing level of I B (or decreasing level of R B ) is shown below. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

8 The Eect of R C on the Q-Point Eect of an increasing level of R C on the load line (slope decreases with increasing R C ) and the Q-point is shown below. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 The Eect of V CC on the Q-Point Eect of an decreasing level of V CC on the load line (end points gets smaller with decreasing V CC ) and the Q-point is shown below. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

9 Example 2: For the xed-bias load line above, calculate V CC, R C and R B. Solution: From the gure, I BQ = 25 µa. So, let us nd V CC, R C and R B as follows V CC = V CE(cutoff) = 20 V, R C = V CC = 20 I C(sat) 10m = 2 kω, R B = V CC V BE(ON) I BQ = µ = 772 kω. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Emitter-Stabilized Bias Circuit Adding a resistor to the emitter circuit stabilizes the bias circuit, as shown below. Let us start DC analysis by drawing the DC equivalent circuit as shown below Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

10 Base-Emitter Loop Let us continue with the BE loop shown below Writing KVL on the BE loop V CC I B R B V BE I E R E = 0 V CC I B R B V BE(ON) (β + 1)I B R E = 0,... as V BE = V BE(ON) and I E = (β + 1)I B in active mode we obtain I BQ as I BQ = V CC V BE(ON) R B + (β + 1)R E Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Similarly, we can obtain I EQ directly from the gure below, or dividing the denominator of the I BQ by (β + 1) as follows I EQ = V CC V BE(ON) R B β R E It is generally better to calculate I EQ directly to reduce the number of calculations, especially when there is an emitter resistor R E is connected. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

Collector-Emitter Loop Let us continue with the CE loop shown below Let us write down the KVL equation on the CE loop V CC I C R C V CE I E R E = 0 V CC I C R C V CE I C R E = 0 V CC I C (R C + R E )

11 Collector-Emitter Loop Let us continue with the CE loop shown below Let us write down the KVL equation on the CE loop V CC I C R C V CE I E R E = 0 V CC I C R C V CE I C R E = 0 V CC I C (R C + R E ) V CE = 0 As I CQ = βi BQ = IEQ in active mode, we obtain V CEQ as V CEQ = V CC I CQ (R C + R E )... as I C = αi E = IE in active mode... DC load line equation Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 DC Load Line DC load line equation comes from KVL equation in the CE loop (i.e., output loop). For the emitter-stabilized bias circuit, DC load line equation is given by V CE = V CC I C (R C + R E ) Let us draw the load line over output characteristics curve as shown below. Here, V CE(cutoff) = V CC and I C(sat) is given by I C(sat) = V CC R C + R E The Q-point is the operating point where the value of R B and R E sets the value of I BQ that controls the values of V CEQ and I CQ. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

12 Improved Biased Stability Stability refers to a condition in which the currents and voltages remain fairly constant over a wide range of temperatures and transistor beta (β) values. Adding R E resistor to the emitter improves the stability of a transistor. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Example 3: For the gure above, calculate all DC currents and voltages. Solution: Let us nd I BQ, I CQ and V CEQ as follows I BQ = V CC V BE(ON) R B + (β + 1)R E = k + (50 + 1)(1k) I CQ = βi BQ = (50)(40.13µ) = 2.01 ma, = µa, V CEQ = VCC I CQ (R C + R E ) = 20 (2.01m)(2k + 1k) = V. As V CEQ > 0 V (V CE(sat) ), transistor is in the active state. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

Voltage Divider Bias Circuit Voltage divider bias circuit is given below Let us start DC analysis by drawing

) ELE230 Electronics I 15-Mar-2017 25 / 59 Base-Emitter Loop (Exact Analysis) Let us transform the BE loop

V BB and Thévenin resistance R BB are calculated as follows V BB = R BB = R 1 R 2 R 2 R 1 + R 2 V CC.

13 Voltage Divider Bias Circuit Voltage divider bias circuit is given below Let us start DC analysis by drawing the DC equivalent circuit as shown below Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Base-Emitter Loop (Exact Analysis) Let us transform the BE loop circuit shown on the left below to the Thévenin simplied circuit on the right below where the Thévenin voltage V BB and Thévenin resistance R BB are calculated as follows V BB = R BB = R 1 R 2 R 2 R 1 + R 2 V CC... from the gure on the left below... from the gure on the right below Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

14 Writing KVL on the Thévenin equivalent BE loop shown above V BB I B R BB V BE I E R E = 0 V BB I B R BB V BE(ON) (β + 1)I B R E = 0, we obtain I BQ as Similarly, we obtain I EQ as I BQ = V BB V BE(ON) R BB + (β + 1)R E I EQ = V BB V BE(ON) R BB β R E... as V BE = V BE(ON) and I E = (β + 1)I B in active mode Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Base-Emitter Loop (Approximate Analysis) I EQ = V BB V BE(ON) R BB /(β + 1) + R E If we look at the I EQ equation above, we see that if R E R BB, equation simplies to β+1 I EQ = V BB V BE(ON) R E where V BB = R 2 R 1 +R 2 V CC. Approximate approach can be used when (β + 1)R E R BB. Approximate analysis condition can be rewritten as (β + 1)R E 10(R 1 R 2 ). Assuming R 1 > R 2, we know that (R 1 R 2 ) R 2. So, the condition above can be further simplied to βr E 10R 2. Satisfying this condition means that we can safely ignore the base current I B in the DC equivalent circuit and apply the voltage divider rule between R 2 and R 1. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

15 Collector-Emitter Loop and DC Load Line Analysis on the CE loop (i.e., output loop), is the same as the CE loop analysis of the emitter-stabilized circuit. So, V CEQ is given by where I CQ = IEQ. V CEQ = V CC I CQ (R C + R E ) Similarly, DC load line analysis is also the same as the DC load line of the emitter-stabilized circuit. So, DC load line equation is given by V CE = V CC I C (R C + R E ) Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Example 4: For the gure above, calculate all DC currents and voltages using both exact and approximate analysis. Solution: Let us rst nd the Thévenin voltage V BB and resistance R BB as follows V BB = R 2 R 1 + R 2 V CC = 3.9k 22 = 2 V, 39k + 3.9k R BB = R 1 R 2 = 3.9k 39k = 3.55 kω. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

16 Now, let us calculate I BQ, I CQ and V CEQ as follows I EQ = V BB V BE(ON) = = 0.85 ma, R BB /(β + 1) + R E 3.55k/( ) + 1.5k I CQ = IEQ = 0.85 ma, V CEQ = VCC I CQ (R C + R E ) = 22 (0.85m)(10k + 1.5k) = V. As βr E 10R 2 (i.e., 210 kω 39 kω), we can use the approximate analysis and ignore I B and R BB as follows I EQ = V BB V BE(ON) = = 0.87 ma, R E 1.5k I CQ = IEQ = 0.87 ma, V CEQ = VCC I CQ (R C + R E ) = 22 (0.87m)(10k + 1.5k) = 12 V. We see that approximate analysis provides close values to the exact analysis. The dierences in I CQ and V CEQ are only 0.02 ma and 0.23 V, respectively. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 DC Bias with Voltage Feedback Another way to improve the stability of a bias circuit is to add a feedback path from collector to base as shown below Let us start DC analysis by drawing the DC equivalent circuit as shown below Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

17 Base-Emitter Loop Let us continue with the BE loop shown below We can write KVL equation on the BE loop noting that I C = I C + I B = I E V CC I C R C I B R F V BE I E R E = 0 V CC I E R C and we obtain I EQ as I E β + 1 R F V BE(ON) I E R E = 0, I EQ = V CC V BE(ON) R F β (R C + R E )... as V BE = V BE(ON) and I B = I E β + 1 in active mode Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Collector-Emitter Loop Let us continue with the CE loop shown below Let us write down the KVL equation on the CE loop noting that I C = I C + I B V CC I C R C V CE I E R E = 0 V CC I C R C V CE I C R E = 0 V CC I C (R C + R E ) V CE = 0 As I CQ = IEQ in active mode, we obtain V CEQ as... as I C = IE and I C = I C in active mode... DC load line equation V CEQ = V CC I CQ (R C + R E ) Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

18 DC Load Line Note that I C = I E, and I C = IE in active mode (and β is high). So, DC load line analysis is the same as the DC load line of the emitter-stabilized circuit. So, DC load line equation is given by V CE = V CC I C (R C + R E ) Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Various Dierent Bias Circuits Example 5: For the gure above, calculate all DC currents and voltages. Solution: Let us nd I EQ, I CQ and V CEQ as follows I EQ = 0 V BE(ON) V EE R B /(β + 1) + R E = I CQ = IEQ = 4.16 ma, k/(90 + 1) + 2k = 4.16 ma, V CEQ = 0 I EQ R E V EE = 20 (4.16m)(2k) = V. As V CEQ > V CE(sat) = 0 V, transistor is in the active state. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

19 pnp Transistors The analysis for pnp bias transistor circuits is the same as that for npn transistor circuits. The only dierences are that 1. Currents are owing in the opposite direction. 2. Voltages have opposite polarity, e.g., V EB = V BE(ON) = 0.7 V in the active mode. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Example 6: For the gure above, calculate all DC currents and voltages. Solution: As βr E 10R 2, i.e., 132 kω 100 kω, we can ignore the base current I B and use the approximate approach. Thus, we can nd V BB, I EQ, I CQ and V CEQ as follows V B R 2 10k = V CC = ( 18) = 3.16 V R 1 + R 2 47k + 10k I EQ 0 V EB V B ( 3.16) = = = 2.46 = 2.24 ma, R E 1.1k 1.1k I CQ = IEQ = 2.24 ma, V ECQ = 0 I CQ (R C + R E ) V CC = (2.24m)(2.4k + 1.1k) ( 18) = V. As V ECQ > V CE(sat) = 0 V, transistor is in the active state. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

20 Bias Stabilization Bias Stabilization Variation of three BJT (Si) parameters (I CO, β and V BE(ON) ) with temperature are summarized below T I CO β V BE(ON) I CO (reverse saturation current) doubles in value for every 10 C β (transistor current gain) increases with increasing temperature V BE(ON) (forward bias potential of the base-emitter junction) decreases about 2.5 mv per 1 C increase in temperature Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Bias Stabilization Variation of the transistor parameters with temperature causes a shift in the operating point (i.e., Q-point). Figures below (at 25 C on the left and at 100 C on the right) show the shift of the Q-point (or DC bias point) due to temperature change for a xed-bias circuit. at 25 C at 100 C Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

21 Bias Stabilization Stability Factors Stability of the collector current I C depends on the stability of several parameters like I CO, β, V BE(ON), V CC, R B, R C, etc. A stability factor S is dened for each of the parameters aecting bias stability as follows: S ICO = I C = I C I CO S β = I C β S VBE(ON) = = I C β I C V BE(ON) = I CO β,vbe(on),... constant ICO,V BE(ON),... constant I C V BE(ON) ICO,β,... constant We know that dierential di C is given by the linear map of parameter dierentials as follows di C = I C di CO + I C I CO β dβ + I C dv BE(ON) + V BE(ON) Thus, we obtain the collector-current change I C using the stability factors as follows I C = SICO I CO + S β β + S VBE(ON) V BE(ON) Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Bias Stabilization Derivation of Stability Factors (Voltage-Divider Bias Circuit) Let us write down the active mode collector current and BE-loop KVL equations for the circuit shown above, I C = βi B + (β + 1) I CO V BB = I B R BB + V BE(ON) + (I B + I C )R E Combining the two equations above, we obtain the expression for I C as I C = β ( ) (β + 1) (R BB + R E ) VBB V BE(ON) + R BB + (β + 1) R E R BB + (β + 1) R E I CO Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

22 Bias Stabilization I C = β ( ) (β + 1) (R BB + R E ) VBB V BE(ON) + R BB + (β + 1) R E R BB + (β + 1) R E I CO 1. From the I C equation above, let us derive S ICO = I C I CO as R BB + R E S ICO = (β + 1) R BB + (β + 1) R E 2. From the I C equation above, let us derive S VBE(ON) = I C V BE(ON) as S VBE(ON) = β R BB + (β + 1) R E 3. In order to derive S β = I C β, let us rst simplify I C equation by letting I CO = 0 I C = β ( ) VBB V BE(ON) R BB + (β + 1) R E Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Bias Stabilization Using the simplied I C equation we can express I C1 and I C2 as follows I C1 = β 1 R BB + (β 1 + 1) R E ( VBB V BE(ON) ) I C2 = β 2 R BB + (β 2 + 1) R E ( VBB V BE(ON) ) Thus, using the equations above, let us obrain the ratio I C 2 I C1 I C1 as I C2 I C1 I C1 = β 2 β 1 β 1 R BB + R E R BB + (β 2 + 1) R E From the equation above, we can obtain the ratio I C β by using I C = I C2 I C1 and β = β 2 β 1 as I C β = I C 1 R BB + R E β 1 R BB + (β 2 + 1) R E Thus, as S β = I C β = I C β S β = I C 1 β 1 R BB + R E R BB + (β 2 + 1) R E Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

23 Bias Stabilization Stability Factors for Other Bias Circuits A. For the xed-bias circuit, i.e., by substituting R E = 0 and R BB = R B, the stability factors are given by S ICO = β + 1 S VBE(ON) = β R B S β = I C 1 β 1 B. For the emitter-stabilized bias circuit, i.e., R BB = R B and R B R E, the stability factors are given by S ICO = (β + 1) S VBE(ON) = S β = I C 1 β 1 R B + R E β + 1 = R B + (β + 1) R E β R B + (β + 1) R E 1 + (β + 1) R E R B R B + R E R B + (β 2 + 1) R E = I C1 β (β 2 + 1) R E R B Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Bias Stabilization C. For the voltage-divider bias circuit with (β + 1)R E 10R BB, the stability factors are given by S ICO = (β + 1) S VBE(ON) = S β = I C 1 β 1 R BB + R E R BB + (β + 1) R E = 1 + R BB R E β R BB + (β + 1) R E = 1 R E R BB + R E R BB + (β 2 + 1) R E = I C1 β 1 β 2 ( 1 + R ) BB R E D. For the voltage-feedback bias circuit, i.e., R BB = R F, replacing R E with R CE = R C + R E and R F R CE, the stability factors are given by S ICO = (β + 1) S VBE(ON) = S β = I C 1 β 1 R F + R CE β + 1 = R F + (β + 1) R CE β R F + (β + 1) R CE 1 + (β + 1) R CE R F R F + R CE R F + (β 2 + 1) R CE = I C1 β (β 2 + 1) R CE R F Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

24 Bias Stabilization Temperature I CO β V BE(ON) 65 C 0.02 na V 25 C 0.1 na V 100 C 20 na V 175 C 3.3 µa V Example 7: Find and compare the collector current change I C when the temperature rises from 25 C to 100 C for the transistor dened by the table above for the following bias arrangements. a. Fixed-bias with R B = 240 kω and I C1 = 2 ma, b. Voltage-divider bias with R E = 4.7 kω, R BB /R E = 2 and I C1 = 2 ma. Solution: From the table above, let us rst calculate I CO, β and V BE(ON) I CO = I CO2 I CO1 = 20n 0.1n = 19.9 na β = β 2 β 1 = = 30 V BE(ON) = V BE(ON)2 V BE(ON)1 = = 0.17 V We are goiung to calculate I C using I C = SICO I CO + S β β + S VBE(ON) V BE(ON) Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Bias Stabilization a. Let us calculate the stability factors for the xed-bias circuit Thus, I C is given by S ICO = β + 1 = 51 S β = I C 1 β 1 = 2m 50 S VBE(ON) = β R B = k = 0.04 ma = 0.21 mω 1 I C = (51)(19.9n) + (0.04m)(30) + ( 0.21m)( 0.17) = 1.02µ + 1.2m m = ma That means, for the xed-bias circuit I C increases to ma at 100 C from 2 ma. b. Let us calculate the stability factors for the voltage-divider bias circuit S ICO R BB = 1 + = = 3 R E ) S β I C1 = β 1 β 2 ( 1 + R BB R E S VBE(ON) = 1 R E = 1 4.7k = 2m (1 + 2) = 1.5 µa (50)(80) = 0.21 mω 1 Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

25 Bias Stabilization Thus, I C is given by I C = (3)(19.9n) + (1.5µ)(30) + ( 0.21m)( 0.17) = 0.060µ m m = ma That means, for the voltage-divider bias circuit I C increases to 2.08 ma at 100 C from 2 ma. Most of the improvement comes from the reduction in S β. These two results show that voltage-divider bias circuit is much more stable than the xed-bias circuit. In other words, adding R E resistor to the emitter leg of the transistor stabilizes the bias circuit. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Bias Stabilization Stability of Transistor Circuits with Active Components V BE compensation by using a reverse-biased diode at the emitter Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

26 Bias Stabilization I CO compensation by replacing R 2 with a reverse-biased diode I C compensation (without R E ) by using a current mirror Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Practical Applications Practical Applications Relay Driver Transistor Switch Transistor Switching Networks Logic Gates Current Mirror Voltage Level Indicator Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

27 Practical Applications Relay Driver When the transistor turns OFF, a high voltage (given by v L = L (di L /dt)) is induced across the coil as shown above. If its magnitude exceeds the maximum ratings of the transistor, then the semiconductor device will be permanently damaged. This destructive action can be subdued by placing a diode across the coil as shown below. Now, when the transistor turns o, the voltage across the coil will reverse and will forward-bias the diode, placing the diode in its ON state (hence protecting the transistor). Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Practical Applications Transistor Switch A transistor can be used as a switch to control the ON and OFF states of the light-bulb in the collector branch of the circuit as shown below. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

28 Practical Applications Transistor Switching Networks Transistors can also be used as switches for computer and control applications. The circuit shown above can be employed an inverter in computer logic circuitry. Inversion process requires that the Q-point switch from cuto (V o = V CE(cutoff) = 5 V) to saturation (V o = V CE(sat) = 0 V) along the load line depicted below. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Practical Applications The total time required for the transistor to switch from the OFF to the ON state is designated as t on, and he total time required for a transistor to switch from the ON to the OFF state is referred to as t off as shown below. t on and t off are dened by t on = t r + t d t off = t s + t f where t r is the rise time from 10% to 90% of the output, t d is the delay time between the changing state of the input and the beginning of a response at the output, t s is the storage time and and t f the fall time from 90% to 10% of the output. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

Practical Applications Logic Gates The gure above shows a BJT logic OR gate, and similarly The gure below shows a BJT logic AND gate. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.

29 Practical Applications Logic Gates The gure above shows a BJT logic OR gate, and similarly The gure below shows a BJT logic AND gate. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59 Practical Applications Current Mirror The current mirror shown below is a DC circuit in which the current through a load is controlled by a current at another point in the circuit. That is, the current through the load is indepedent of the load. Homework 1: For the gure above, show that the load current is equal to the load control current and given by I L = Icontrol = V CC V BE(ON) R where the transistors are identical (Q 1 Q 2 ), i.e., V BE1 (ON) = V BE2 (ON) = V BE(ON) and β 1 = β 2 = β, and current gain β is high, e.g., β 100. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

30 Practical Applications Voltage Level Indicator The voltage level indicator circuit uses a green LED to indicate when the source voltage is close to its monitoring level of 9 V. The potentiometer is set to establish 5.4 V at the point indicated below. The result is sucient voltage to turn on both the 4.7 V Zener and the transistor and establish a collector current through the LED sucient in magnitude to turn on the green LED. The LED will immediately turn o, revealing that the supply voltage has dropped below 9 V or that the power source has been disconnected (i.e., when the voltage set up by the voltage divider circuit drops below 5.4 V). Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

Chapter 2 - DC Biasing - BJTs

Objectives Chapter 2 - DC Biasing - BJTs To Understand: Concept of Operating point and stability Analyzing Various biasing circuits and their comparison with respect to stability BJT A Review Invented