Lecture 150 Simple BJT Op Amps (1/28/04) Page 150-1

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1 Lecture 50 Simple BJT Op Amps (/28/04) Page 50 LECTURE 50 SIMPLE BJT OP AMPS (READING: TextGHLM , , AH ) INTRODUCTION The objective of this presentation is:.) Illustrate the analysis of BJT op amps 2.) Prepare for the design of BJT op amps Outline Simple BJT Op Amps Twostage Foldedcascode Summary ECE 642 Analog Integrated Circuit Design II P.E. Allen 2002 Lecture 50 Simple BJT Op Amps (/28/04) Page 502 SIMPLE TWOSTAGE BJT OP AMPS BJT TwoStage Op Amp Circuit: DC Conditions: = I bias, Q8 I 3 I 4 I Bias I 6 I I 2 v OUT Q Q2 v IN I 7 x x xn Fig. 500 I = I 2 = 0.5 = 0.5I bias, I 7 = I 6 = ni Bias V icm (max) = V EB3 V CE (sat) V BE V icm (min) = V CE5 (sat) V BE V out (max) = V EC6 (sat) V out (min) = V CE7 (sat) Notice that the output stage is class A I sink = I 7 and I source = β F I 7 ECE 642 Analog Integrated Circuit Design II P.E. Allen 2002

2 Lecture 50 Simple BJT Op Amps (/28/04) Page 503 TwoStage BJT Op Amp Continued Small Signal Performance: Assuming differential mode operation, we can write the smallsignal model as, where, R = g m v in 2 R C v g m2v in 2 g m4 v R 2 C v2 R 3 C 3 2 gm6 v 2 Fig g m3 r π3 r π4 r o3 g m3 R 2 = r π6 r o2 r o4 r π6 and R 3 = r o6 r o7 C = C π3 C π4 s s3 C 2 = C π6 s2 s4 and C 3 = s6 s7 Note that we have ignored the basecollector capacitors, C µ, except for M6, which is called. Assuming the pole due to C is much greater than the poles due to C 2 and C 3 gives g m v in R 2 C v2 R 3 C 3 2 gm6 v 2 ECE 642 Analog Integrated Circuit Design II P.E. Allen 2002 Fig Lecture 50 Simple BJT Op Amps (/28/04) Page 504 TwoStage BJT Op Amp Continued Summary of the small signal performance: Midband performance A o = g mi g mii R I R II g m g m6 r π6 (r o6 r o7 ) = g m βf6(r o6 r o7 ), R out = r o6 r o7, R in = 2r π Roots Zero = g mii = g m6 Poles at p g mii R I R II = g m6 r π6 (r o6 r o7 ) = g m A o and p g mii g m6 2 C II Assume that βf =00, g m =ms, g m6 =0mS, r o6 =r o7 =0.5MΩ, =5pF and =0pF: A o =(ms)(00)( 250kΩ)=25,000V/V, R in 2(βF/g m )2(00kΩ)=200kΩ, R out =250kΩ Zero = 0mS 5pF = 2x0 9 rads/sec jω or 38.3MHz, 8x03 ms p = (25,000)5pF = 2x0 8 σ 09 2x09 Fig ,000 = 8000 rads/sec or 273Hz, and p 2 = 0mS/0pF = 09 rads/sec or 59.5MHz ECE 642 Analog Integrated Circuit Design II P.E. Allen 2002

3 Lecture 50 Simple BJT Op Amps (/28/04) Page 505 Slew Rate of the TwoStage BJT Op Amp Remember that slew rate occurs when currents flowing in a capacitor become limited and is given as I lim = C dv C dt where v C is the voltage across the capacitor C. v in >>0 Q VBias Q2 Positive Slew Rate I5 Assume a virtural ground I 6 I CL I 7 v in <<0 Fig ECE 642 Analog Integrated Circuit Design II P.E. Allen 2002 Q VBias Q2 Negative Slew Rate Assume a virtural ground I 6 =0 ICL I 5 SR = min, I 6 I 7 = I 5 because I 6 >> SR = min, I 7 = if I 7 >>. Therefore, if is not too large and if I 7 is significantly greater than, then the slew rate of the twostage op amp should be, SR = Cc I 7 Lecture 50 Simple BJT Op Amps (/28/04) Page 506 FoldedCascode BJT Op Amp Circuit I C3 i C0 Q0 Q i C V BE V CE (sat) i C0 Q0 Q i C v in Q Q2 Q8 i C i C2 Q9 i out Q8 Q9 i out Fig I C4 Simplified circuit I C5 V BE V CE (sat) Biasing details of the output DC Conditions: I 3 = I bias, I = I 2 = 0.5 = 0.5I bias, I 4 = = ki Bias, I 0 = I = ki Bias 0.5I bias (k>) V icm (max) = V CE3 (sat)v EB V icm (min) = V CE4 (sat)v EC (sat)v BE V out (max) = V EC9 (sat)v EC (sat) V out (min) = V CE5 (sat)v CE7 (sat) Notice that the output stage is pushpull I sink and I source are limited by the base current. ECE 642 Analog Integrated Circuit Design II P.E. Allen 2002 V BE R A I C4 RB I C5

4 Lecture 50 Simple BJT Op Amps (/28/04) Page 507 FoldedCascode BJT Op Amp Continued SmallSignal Analysis: R A g m6 v be6 g m v in 2 r r π6 r o6 o r v be6 o4 g m0 R B g m7 v be7 i 0 g m2 v in v r o7 2 be7 r o2 r o5 r π7 where R A /g m6 and R B r o7βpr o /2 g m7 r o7 r π7 2 if r o7 r o i g mr π6 v in g mv in 0 2(r π6 R A ) 2 i g m2r π7 v in g m2 r π7 v in 7 2(r π7 R B ) 2(r π7 0.5r π7 ) = g m2v in 3 = (i 7 i 0 )R out v in = 5 6 (g mr out )v in if g m = g m2 i 0 i 7 v in = 5 6 (g mr out ) v βr out o Fig R out = βpr o [β Ν (r o5 r o2 )] and R in = 2r π Assume that βfn =00, βfp =50, g m = g m2 =ms, r on = MΩ, and r op = 0. 5MΩ: v = 4,285V/V R in out = MΩ and R in = 00kΩ ECE 642 Analog Integrated Circuit Design II P.E. Allen 2002 Lecture 50 Simple BJT Op Amps (/28/04) Page 508 FoldedCascode BJT Op Amp Continued Frequency response includes only dominant pole at the output (selfcompensation), p = R out There are other poles but we shall assume that they are less than GB If = 25pF, then p = 2800 rads/sec. or 446Hz GB = 6.37 MHz Checking some of the nondominant poles gives: p A = R A C = g m6 A C A 59MHz if C A = pf (the capacitance to ac ground at the emitter of ) 2 p B = R B C B = r π7 C B 6.37MHz if C B = pf (the capacitance to ac ground at the emitter of ) This indicates that for small capacitive 60 loads, this op amp will suffer from 40 higher poles with respect to phase 20 margin. Capacitive loads greater than 0 25pF, will have better stability (and less 20 GB). 40 VdB(3) Frequency (Hz) Fig ECE 642 Analog Integrated Circuit Design II P.E. Allen 2002

5 Lecture 50 Simple BJT Op Amps (/28/04) Page 509 SUMMARY Two stage op amp gives reasonably robust performance as an onchip op amp DC balance conditions insure proper mirroring and all transistors in saturation Slew rate of the twostage op amp is / Folded cascode op amp offers wider input common voltage range Folded cascode op amp is a selfcompensated op amp because the dominant pole at the output and proportional to the load capacitor ECE 642 Analog Integrated Circuit Design II P.E. Allen 2002