Generation and classification of Kerwin Huelsman Newcomb circuits using the DVCC

Transcription

1 INTENATIONAL JOUNAL OF CICUIT THEOY AND APPLICATIONS Int. J. Circ. Theor. Appl. 2009; 37: Published online 20 June 2008 in Wiley InterScience ( DOI: 0.002/cta.503 Generation and classification of Kerwin Huelsman Newcomb circuits using the Ahmed M. Soliman, Electronics and Communication Engineering Department, Faculty of Engineering Cairo University, Egypt SUMMAY New circuits realizing the Kerwin Huelsman Newcomb (KHN) and using three or four differential voltage current conveyor () are generated from the basic KHN and inverted KHN block diagrams. The circuits are classified into two types, type A employs three and type B employs four. Each type includes four classes of circuits depending on the four possible integrator polarities. Each class can be realized by several circuits as will be demonstrated in the paper. All the eight possible sign combinations of the output voltages polarities are obtainable from the two types; four sign combinations from each type. The eight block diagrams are included to demonstrate the difference between each class of circuits. Spice simulation results demonstrating the practicality of the proposed filters are included. Copyright q 2008 John Wiley & Sons, Ltd. eceived 7 October 2007; evised 8 February 2008; Accepted 27 April 2008 KEY WODS: universal filters; differential voltage current conveyors; KHN circuit. INTODUCTION Analog integrated filters are basic building blocks in most electronic circuit applications. The state variable filter known in the literature as the Kerwin Huelsman Newcomb (KHN) filter [] is a basic building block in many analog signal-processing applications. It provides the three basic filtering functions, namely the high-pass (HP), band-pass (BP) and low-pass (LP) responses. The circuit uses three operational amplifiers (Op Amps) as shown in Figure. Owing to the importance of this circuit, a brief review will be given here. The block diagram of the KHN circuit is shown in Figure, which consists of three stages, namely the summing stage and the two inverting integrators. The circuit equation for each stage is summarized in Table I and the three transfer functions polarities are given in Table II. The signal input of the KHN circuit is the non-inverting input terminal of the op amp as shown in Figure. It is also possible to inject the input signal Correspondence to: Ahmed M. Soliman, Electronics and Communication Engineering Department, Faculty of Engineering Cairo University, Egypt. asoliman@ieee.org, asoliman@idsc.net.eg Copyright q 2008 John Wiley & Sons, Ltd.

2 836 A. M. SOLIMAN C - A - + V A + V 2 - A + = (2Q-) - - V Σ Q sc s + V Q Figure. The Kerwin Huelsman Newcomb (KHN) filter using three op amps [] and block diagram of the KHN circuit of. Table I. Circuit equations of the three stages of KHN and inverted KHN. Circuit Summer stage Integrator V 2 V Integrator 2 V 2 ] KHN Figure V = [2 Q +V 2 Q V 3 sc s Inverted KHN Figure 2 V = +V 2 Q V 3 sc s Table II. The three output voltage polarities in KHN and inverted KHN. Circuit Polarity V HP Polarity V BP Polarity V LP KHN + + Inverted KHN + to the inverting op amp terminal resulting in the inverted KHN filter shown in Figure 2 [2]. The inverted KHN circuit uses one resistor more than the classical KHN and it differs only in the summation stage. The block diagram of the inverted KHN is shown in Figure 2 and the circuit equations for each stage is given in Table I. The polarities of the three outputs are given in Table II and they are opposite to those of the classical KHN and is defined as the inverted KHN for this reason. Both KHN and the inverted KHN filters belong to the two integrator loop class of filters [3, 4]. Such filters suffer from the finite gain bandwidth of the op amp, which results in a pole Q enhancement thus limiting the frequency of operation of the filter [4 6]. The finite gain bandwidth effect on the filter performance has been studied [4] and methods of active compensation has been developed to improve the circuit operation [5, 6]. Universal filter structure that uses the three DOI: 0.002/cta

3 KEWIN HUELSMAN NEWCOMB CICUITS 837 C - A - + V A + V 2 - A + = (3Q-) - - Σ + sc s V - V 2 - Q Figure 2. The inverted polarity KHN filter using three op amps [2] and block diagram of the inverted polarity KHN circuit of. single ended op amps and MOS transistors has been introduced in the literature [7]. Other forms of MOS-C KHN filters using active devices other than the op amp have been also introduced in the literature [8]. The starting point in the MOS-C filter design is an active C prototype [7]; therefore, it is necessary to develop new active C filters using active devices that can operate at higher frequencies than the op amp. The KHN circuit using current conveyors (CCII) [9] was introduced in [0] with a one to one correspondence to the three building blocks in the classical KHN resulting in circuits with four or three floating resistors. Shortly thereafter it was modified to have all grounded resistors and capacitors [] and to provide all possible eight sign combinations of the three filter responses by changing the polarity of the Z terminal of the CCII []. Current mode two integrator loop filters using CCII was also introduced in the literature in [2]. ecently new type of universal voltage mode filter using the differential voltage current conveyor () has been introduced in [3, 4]. The circuit reported in [3] employs two floating resistors and has no independent control on Q. The circuit reported in [4] is based on three input excitations and has no independent control on Q also. The single output differential difference current conveyor has been introduced in [5]. The same circuit defined as with a balanced output has also been introduced independently in [6]. The is defined in [6] as a five port building block having I = I =0, V x = V V, I = I x and I Z = I x () It is seen that the includes CCII+, CCII and both types of inverting CCII (ICCII) as special cases [7 9]. DOI: 0.002/cta

4 838 A. M. SOLIMAN Active C circuits of the Tow Thomas two integrator loop filter using the and the ICCII have been introduced in [5, 9], respectively. In this paper several new circuits realizing the KHN and using three or four are generated from the basic KHN and inverted KHN block diagrams. The circuits are classified into two types, type A employs three and type B employs four. Each type includes four classes of circuits depending on the four possible integrator polarities. Each class can be realized by several circuits as will be demonstrated in the paper. All the eight possible sign combinations of the output voltages polarities are obtainable from the two types; four sign combinations from each type. It is worth noting that the proposed KHN circuits using the employs three, two grounded capacitors and four grounded resistors, on the other hand, the KHN circuit using CCII reported in [] employs five CCII, two grounded capacitors and six grounded resistors. 2. TYPE A KHN CICUITS USING THEE In this section the type A-KHN circuits using three are classified into four classes based on the two integrators polarities. Five equivalent circuits of the class I type A-circuits are shown in Figure 3. Table III includes the three basic equations for the type A-KHN circuits. Solving the three equations in the first row results in the voltage transfer functions for this class of circuits; taking =, the three transfer functions are given by V s 2 C = s 2 C +s + (2a) V 2 s = s 2 C +s + = s 2 C +s + The ω 0 and Q are given, respectively, by ω 0 =, C The design equations are given by taking C = =C (2b) (2c) Q = C (3) = =/ω 0 C, = = /Q (4) It is seen that Q is controlled by the two equal resistors and. The band-pass center frequency gain= Q and the LP DC gain is unity as well as the HP high-frequency gain is also unity. Figure 3 represents the block diagram of the type A-class I circuits. It is similar to the classical KHN block diagram of Figure except that the forward gain of the input voltage to the summer is unity. It is seen that the circuit of Figure 3 uses only, which is an advantage in avoiding current mirrors for current transfer from to Z terminals. The other four circuits given represent a variety of equivalent circuits based on terminal interchanges of the. DOI: 0.002/cta

5 KEWIN HUELSMAN NEWCOMB CICUITS 839 The class II circuits employ two non-inverting integrators and three equivalent circuits are given in Figure 4 together with the block diagram shown in Figure 4, which is different from that of Figure 3. The three output voltages are all non-inverting, which could not be achieved with the three op amp KHN. The transfer functions and the design equations are the same as given by Equations (2) and (4) except for the sign of the band-pass, which is positive as given in Table IV. It is seen that the circuit of Figure 4 is the only circuit from this class which uses only, which is an advantage in avoiding current mirrors for current transfer from to Z terminals and consumes less power than the circuits using the balanced output. The class III circuits employ an inverting integrator and a non-inverting integrator and three equivalent circuits are given in Figure 5 together with the block diagram shown in Figure 5. The transfer functions and the design equations are the same as given by Equations (2) and (4) V V2 V3 Z + 3 C V Z- V2 V3 Z - Z + 3 C (d) V - V sc s + Σ 2 Q V V2 V3 Z - Z - Z - 3 C (e) V V2 V3 Z - Z - 3 C V Z- V2 V3 Z - Z - Z + 3 C (c) (f) Figure 3. Type A-class I-circuit grounded resistor and capacitor KHN circuit and block diagram of type A-class I KHN circuits, (c) circuit 2, (d) circuit 3, (e) circuit 4, and (f) circuit 5. DOI: 0.002/cta

6 840 A. M. SOLIMAN Table III. Circuit equations of the three stages of the type A-KHN. Type A class Summer stage = Integrator V 2 V Integrator 2 V 2 I V = + V 2 sc II V = V 2 sc III V = + V 2 + IV V = V 2 + sc s s sc s s V V 2 V 3 Z + 3 C V Z - V2 V3 Z - Z + 3 C (c) Σ V + V 2 + sc s Q V Z - V2 V3 Z - Z - Z + 3 C (d) Figure 4. Type A-class II circuit grounded resistor and capacitor KHN circuit and block diagram of type A-class II KHN circuits, (c) circuit 2, and (d) circuit 3. Table IV. Three output voltage polarities in type A-KHN circuits. Type A-class Polarity V HP Polarity V BP Polarity V LP I + + II III + + IV + DOI: 0.002/cta

7 KEWIN HUELSMAN NEWCOMB CICUITS 84 V Z + V 2 V 3 Z + Z - C V Z + V 2 V 3 Z - Z + C (c) V - V Σ sc s Q V Z + V2 V3 Z - Z - Z + 3 C (d) Figure 5. Type A-class III circuit grounded resistor and capacitor KHN circuit and block diagram of type A-class III KHN circuits, (c) circuit 2, and (d) circuit 3. except for the signs of the HP and the band-pass which are negative and positive, respectively, as given in Table IV. The class IV circuits employ a non-inverting integrator followed by an inverting integrator and three equivalent circuits are given in Figure 6 together with the block diagram shown in Figure 6. The transfer functions and the design equations are the same as given by Equations (2) and (4) except for the sign of the HP which is negative as given in Table IV. The above four classes provide four possible sign combinations of the three filter responses, so there are four more possible sign combinations. Based on the three structure used in the type-a circuits and to avoid the use of floating resistors a new type of the KHN circuits referred to as type-b will be introduced in the next section to achieve the remaining feedback mixing combinations. 3. TYPE B-KHN CICUITS USING FOU The type-b KHN circuits include four classes of circuits and employ four, two capacitors and five resistors, that is, it uses one and one resistor more than the type-a KHN. 3.. Class I-type B-KHN Figure 7 represents three equivalent type-b class I KHN circuits using two inverting integrators and the block diagram is shown in Figure 7. The circuit equation for each block is given in DOI: 0.002/cta

8 842 A. M. SOLIMAN V Z + V 2 Z - Z + C V Z + V2 V3 Z - Z - Z + 3 C (c) V + V sc s - Σ 2 Q V Z + V2 V3 Z + Z - 3 C (d) Figure 6. Type A-class IV circuit grounded resistor and capacitor KHN circuit and block diagram of type A-class IV KHN circuits, (c) circuit 2, and (d) circuit 3. Table V. Solving the three equations of the three blocks the three transfer functions are obtained as: V = V 2 = s 2 C s 2 C +s + 5 s s 2 C +s + 5 (5a) (5b) = s 2 C +s + 5 Taking 5 = (and is arbitrary), the ω 0 and Q are given, respectively, by ω 0 =, Q = C (6) C (5c) DOI: 0.002/cta

9 KEWIN HUELSMAN NEWCOMB CICUITS 843 V V 2 C C V V 2 Z - Z - C C 5 5 (c) V - V Q - Σ + sc s V Z - V 2 C C Q 5 (d) Figure 7. Type B-class I grounded and C KHN circuit using four and block diagram of the type B-class I-KHN circuit. Type B-class I Grounded and C KHN (c) circuit 2 using four and (d) circuit 3 using four. The design equations are given by taking C = =C = =/ω 0 C, = Q (7) It is seen that Q is controlled by without affecting ω 0 which is an advantage over type-a circuits in which Q is adjusted by varying two equal resistors Class II-type B-KHN The class II circuits employ a non-inverting integrator followed by an inverting integrator and the circuit is given in Figure 8 together with the block diagram shown in Figure 8, which is different from that of Figure 7 in all of the three signs at the summation stage. The transfer functions and the design equations are the same as given by Equations (5) and (7) except for the sign of the HP which is positive as given in Table VI. DOI: 0.002/cta

10 844 A. M. SOLIMAN Table V. Circuit equations of the three stages of the type B-KHN. Type B class Summer stage = 5 Integrator V 2 V Integrator 2 V 2 I V = + V 2 sc II V = V 2 + III V = + V 2 + s s sc + sc s IV V = V 2 + sc + s Z - V V 2 C C V + V Q sc s +- Σ 2 5 Q Figure 8. Type B-class II-Grounded and C KHN circuit using four and block diagram of the type B-class II-KHN circuit. Table VI. Three output voltage polarities in type B-KHN circuits. Type B-class Polarity V HP Polarity V BP Polarity V LP I + II + + III + IV 3.3. Class III-type B-KHN In this class the integrators are inverting and non-inverting, respectively. In this case the summation of, V 2 and will be different from all previous classes as they are mixed with the same polarity. In this case both types of feedback from V 2 and will be based on shunt mixing as shown in Figure 9. The circuit equation for each block is given in Table V. Solving the three equations DOI: 0.002/cta

11 KEWIN HUELSMAN NEWCOMB CICUITS 845 V V 2 C Z - V - V Σ + sc s Q 5 Figure 9. Type B-class III-grounded and C KHN circuit using four and block diagram of the type B-class III-KHN circuit. of the three blocks and taking 5 = the three transfer functions are obtained as: s V 2 C 2 = 3 s 2 C +s + sc V 2 2 = 3 s 2 C +s + = 3 s 2 C +s + (8a) (8b) (8c) The ω 0 and Q are given, respectively, by ω 0 =, C Q = C (9) The design equations are given by taking C = =C = =/ω 0 C, = /Q (0) It is seen that Q is controlled by the two equal resistors and 5 without affecting ω 0 which is the same as in type-a circuits in which Q is adjusted by varying two equal resistors. The circuit block diagram is shown in Figure 9. DOI: 0.002/cta

12 846 A. M. SOLIMAN V V 2 C Z + Z + V + V Σ - sc s 5 Q Figure 0. Type B-class IV grounded and C KHN circuit using four and block diagram of the type B-class IV KHN circuit. Examining the circuit of Figure 9 it is seen that all the four are used with one Y input thus this circuit can also be realized with four CCII, but in this case two of the will be replaced by two CCII to achieve the same signs. Of course it is an advantage to use having outputs over using the CCII with Z outputs Class IV-type B-KHN In this class the integrators are both non-inverting and in this case the summation of, V 2 and will be mixed with an inverting polarity, which is opposite to mixing sign in the class III. In this case both types of feedback from V 2 and will be based on shunt mixing (as in class III) as shown in Figure 0. The circuit block diagram is shown in Figure 0 and the circuit equation for each block is given in Table V. The transfer functions and the design equations are the same as given by Equations (8) and (0) except for the sign of the HP which is negative as given in Table VI. Examining the circuit of Figure 0 it is seen that all the four are used with one Y input thus this circuit can also be realized with four CCII, but in this case the three will be replaced by two CCII and one balanced output CCII to achieve the same signs. Of course it is an advantage to use having outputs over using the CCII with Z outputs since current mirrors will be avoided in current transfer to port Z. 4. SIMULATION ESULTS Spice simulation results using technology SCN 05 feature size 0.5 μm from MOSIS vendor: AGILENT and the CMOS parameters are given in Table VII. Figure represents the CMOS circuit of a with a double output terminal that can be used with the KHN circuits of Figures 3, 4, 7 and 0 reported in this paper. The operation of the circuits of Figure is insensitive to the threshold voltage variation caused by the body effect. All the PMOS transistors have sources that are connected to V DD, while all the DOI: 0.002/cta

13 KEWIN HUELSMAN NEWCOMB CICUITS 847 Table VII. Mosis parametric test results. UN: TAY VENDO: AGILENT TECHNOLOGY: SCN05 FEATUE SIZE: 0.5-μm TAY SPICE BSIM3 VESION 3. PAAMETES SPICE 3f5 Level 8, Star-HSPICE Level 49, UTMOST Level 8 *DATE: Dec 20/0 *LOT: TAY WAF: 5257 *Temperature parameters=default.model CMOSN NMOS (LEVEL=49 +VESION =3. TNOM =27 TO=9.6E 9 +J =.5E 7 NCH=.7E7 VTH0= K= K2= K3= K3B= W0=E 5 NL=4.8848E 8 +DVT0W =0 DVTW=0 DVT2W=0 +DVT0 = DVT= DVT2= U0= UA=.55899E 2 UB= E 8 +UC =.93783E VSAT=.9034E5 A0= AGS = B0= E 6 B=5E 6 +KETA=.2950E 3 A=0 A2= +DSW = E3 PWG= E 3 PWB= W= WINT= E 7 LINT= E 7 +L = E 7 W=0 DWG= E 9 +DWB =.06778E 8 VOFF= NFACTO= CIT=0 CDSC=2.4E 4 CDSCD=0 +CDSCB=0 ETA0= ETAB=.65258E 3 +DSUB= PCLM= PDIBLC = E 3 +PDIBL = E 3 PDIBLCB= DOUT= PSCBE=4.272E0 PSCBE2= E 8 PVAG= DELTA=0.0 SH=2.8 MOBMOD= +PT =0 UTE =.5 KT= 0. +KTL=0 KT2=0.022 UA=4.3E 9 +UB= 7.6E 8 UC = 5.6E AT=3.3E4 +WL=0 WLN= WW=0 +WWN= WWL=0 LL=0 +LLN= LW=0 LWN= +LWL =0 CAPMOD=2 PAT=0.5 +CGDO =2.58E 0 CGSO=2.58E 0 CGBO=E 9 +CJ= E 4 PB=0.99 MJ= CJSW =4.7007E 0 PBSW =0.99 MJSW=0. +CJSWG =2.2346E 0 PBSWG=0.99 MJSWG=0. +CF=0 PVTH0= E 3 PDSW= PK2=9.6637E 3 WKETA= E 3 LKETA= PAGS = MODEL CMOSP PMOS (LEVEL =49 +VESION =3. TNOM =27 TO=9.6E 9 +J =.5E 7 NCH=.7E7 VTH0= K= K2= K3= K3B= 5 W0=E 5 NL=2.0392E 7 +DVT0W =0 DVTW=0 DVT2W=0 DVT0= DVT= DVT2= U0= UA= E 9 UB= E 8 DOI: 0.002/cta

14 848 A. M. SOLIMAN Table VII. Continued. +UC = E VSAT= E5 A0= AGS = B0= E 6 B=5E 6 +KETA= E 3 A=0A2= +DSW =3.5E3 PWG= E 4 PWB= W= WINT= E 7 LINT= E 8 +L = E 7 W=0 DWG= E 8 +DWB = E 9 VOFF= NFACTO= CIT=0 CDSC=2.4E 4 CDSCD=0 +CDSCB=0 ETA0= ETAB= E 3 +DSUB= PCLM= PDIBLC = E 5 +PDIBL = E 3 PDIBLCB= 0.5 DOUT=0 +PSCBE=8E0 PSCBE2= E 9 PVAG= DELTA=0.0 SH=2.5 MOBMOD = +PT =0 UTE =.5 KT= 0. KTL=0 KT2=0.022 UA=4.3E 9 +UB= 7.6E 8 UC = 5.6E AT=3.3E4 +WL=0 WLN= WW=0 WWN= WWL=0 LL=0 +LLN= LW=0 LWN= +LWL =0 CAPMOD=2 PAT=0.5 +CGDO =2.44E 0 CGSO =2.44E 0 CGBO=E 9 +CJ= E 4 PB= MJ= CJSW =.49272E 0 PBSW = MJSW = CJSWG =4.256E PBSWG= MJSWG= CF=0 PVTH0= E 3 PDSW= PK2= E 3 WKETA= E 3 LKETA= PAGS = NMOS transistors except M to M 4 have sources connected to VSS. This causes no variation in the threshold voltage because the source to body voltage is maintained equal to zero at all times. Although the sources of transistors M and M 2 are not connected to the body, their operation is still unaffected by the body effect because they form a differential pair, and hence have the same source voltage. This causes equal variation in the threshold voltage of M and M 2 and hence the two threshold voltage cancels out. The same is true for the differential pair M 3 and M 4. Therefore, the circuits shown in Figure can be implemented effectively in either N-well or P-well CMOS process [6]. The spice simulations reported next are carried out using the CMOS- of Figures and [6] with the aspect ratios given in Table VIII and, respectively, and with V DD =.5V, V SS =.5V. The circuit of Figure 3 is simulated to have f 0 =MHz and Q =0.707 for LP maximally flat magnitude response using the CMOS circuit of Figure. The circuit design parameters taken are C = =0PF, = =5.9kΩ, = =22.5kΩ. Figure 2 represents the magnitude and phase characteristics together with the ideal response. It is seen that the simulated results agree well with the ideal responses. Total power dissipation is equal to mw. The circuit of Figure 3 is simulated again for f 0 =MHz and Q =0 for a band-pass response and using the CMOS circuit of Figure. The circuit design parameters taken are C = =0PF, = =5.9kΩ, = =.59kΩ. Figure 2 represents the magnitude and phase characteristics together with the ideal response. It is seen that the simulated results agree well with the ideal responses. DOI: 0.002/cta

15 KEWIN HUELSMAN NEWCOMB CICUITS 849 The circuit of Figure 3(d) is simulated to have f 0 =MHz and Q =0.707 for LP maximally flat magnitude response and Q =0 for band-pass response. The circuit design parameters are the same as given above. Figure 3 represents the magnitude and phase characteristics of the LP response together with the ideal response. It is seen that the simulated results agree well with the ideal responses. Total power dissipation is equal to mw. Figure 3 represents the magnitude and phase characteristics of the band-pass response together with the ideal response. It is seen that the simulated results agree well with the ideal responses. Next, the circuit of Figure 4 is simulated to have f 0 =MHz and Q =0.707 for LP maximally flat magnitude response and Q =0 for band-pass response. The circuit design parameters are the same as given above. Figure 4 represents the magnitude and phase characteristics of the LP response together with the ideal response. The total power dissipation is equal to mw. V DD M 7 M 8 M 9 M 0 M Y 2 Y Z + Z + M M 2 M 3 M 4 V b M 5 M 6 M 2 M 3 M 4 V b2 V SS V DD M 7 M 8 M 7 M 8 V b2 M 9 M 0 M Y 2 Y Z - M M 2 M 3 M 4 V b M 5 M 6 M 2 M 3 M 4 M 5 M 6 V SS Figure. The CMOS with double outputs and with balanced outputs and Z [6]. DOI: 0.002/cta

16 850 A. M. SOLIMAN Table VIII. Transistor aspect ratios of the CMOS shown in: Figure and Figure. NMOS transistors W (μm)/l (μm) M, M 2, M 3, M 4 8/ M 5, M 6 8/ M 2, M 3, M 4 20/2.5 PMOS transistors W (μm)/l (μm) M 7, M 8 0/ M 9, M 0, M 40/2 NMOS transistors W (μm)/l (μm) M, M 2, M 3, M 4 8/ M 5, M 6 8/ M 2, M 3, M 4, M 5, M 6 20/2.5 PMOS transistors W (μm)/l (μm) M 7 and M 8 0/ M 9, M 0, M, M 7, M 8 40/2 Figure 2. Magnitude and phase characteristics of the low-pass response and band-pass response of the circuit of Figure 3 for f 0 =MHz. Figure 4 represents the magnitude and phase characteristics of the band-pass response together with the ideal response. It is seen that the simulated results agree well with the ideal responses. DOI: 0.002/cta

17 KEWIN HUELSMAN NEWCOMB CICUITS 85 Figure 3. Magnitude and phase characteristics of the low-pass response and band-pass response of the circuit of Figure 3(d) for f 0 =MHz. Figure 4. Magnitude and phase characteristics of the low-pass response and band-pass response of the circuit of Figure 4 at f 0 =MHz. Next, the circuit of Figure 4(c) is simulated to have f 0 =MHz and Q =0.707 for LP maximally flat magnitude response and Q =0 for band-pass response. The circuit design parameters are the same as given above. DOI: 0.002/cta

18 852 A. M. SOLIMAN Figure 5. Magnitude and phase characteristics of the low-pass response and band-pass response of the circuit of Figure 4(c) at f 0 =MHz. Figure 5 represents the magnitude and phase characteristics of the LP response together with the ideal response. Figure 5 represents the magnitude and phase characteristics of the band-pass response together with the ideal response. It is seen that the simulated results agree well with the ideal responses. The frequency response for the circuits is close to the ideal response, the power dissipation in the circuits that use the with only terminals is slightly lower than the circuits that use the balanced output of Figure. 5. COMPAISONS WITH CCII KHN The current conveyor-based KHN circuit using five CCII is shown in Figure 6 []. The simulation results for a BP filter with Q =0, f 0 =00kHz and MHz using five AD844 are shown in Figures 6 and (c), respectively. It is seen that the deviation from the ideal response increases as the frequency increases. Other CMOS CCII circuits may give better results than the commercially available AD 844. It is worth noting that the proposed type A-KHN circuits using the employs three, two grounded capacitors and four grounded resistors; on the other hand, the KHN circuit using CCII reported in [] and shown in Figure 6 employs five CCII, two grounded capacitors and six grounded resistors. The two circuits of Figures 9 and 0 can be realized with CCII and they are new CCII KHN circuits. The and CCII belong to the same family and it is the objective of this paper to complete the set of KHN circuits using and CCII as basic building blocks. DOI: 0.002/cta

19 KEWIN HUELSMAN NEWCOMB CICUITS 853 Y V I V HP CCII Y V BP CCII i C Y CCII V LP CCII Y Y CCII (c) Figure 6. The grounded resistor grounded capacitor KHN circuit using five CCII+ []. Magnitude and phase characteristics of the band-pass response of the KHN CCII circuit at f 0 =00kHz and (c) f 0 =MHz. DOI: 0.002/cta

20 854 A. M. SOLIMAN 6. CONCLUSIONS New high input impedance voltage mode circuits realizing the KHN and using three or four are generated from the basic KHN and the inverted KHN block diagrams. The availability of non-inverting integrators with grounded resistors and capacitors gives more degrees of freedom in designing two integrator loop filters. The circuits are classified into two types, type A employs three and type B employs four. Each type includes four classes of circuits depending on the four possible integrator polarities. Each class can be realized by several circuits as demonstrated in the paper. All the eight possible sign combinations of the output voltages polarities are obtainable from the two types; four sign combinations from each type. The eight block diagrams are included to demonstrate the difference between each class of circuits. It is worth noting that the use of CCII in KHN realization given in [] results also in all possible sign combinations but was limited to one circuit only for each sign combinations. Spice simulation results demonstrating the practicality of the proposed filters are included. For all simulations it is seen that the simulated results agree well with the ideal responses. It should be noted that the circuits of Figures 3, 4, 7 and 0 have only outputs which is an advantage in avoiding current mirrors to produce Z. The circuit of Figure 7 is the only circuit that uses with single output. The circuits of Figures 9 and 0 can be realized with CCII as a special case, thus this generation of the -based KHN circuits resulted in new CCII-based KHN circuits not previously known in the literature. It is hoped that this paper will open the door for the development of new MOS-C KHN filters using the. It is worth noting that other forms of MOS-C filters using operational transresitance amplifier (OTA) have been recently introduced in the literature [20]. EFEENCES. Kerwin W, Huelsman L, Newcomb. State variable synthesis for insensitive integrated circuit transfer functions. IEEE Journal of Solid State Circuits 967; 2: Geffe P. C amplifier resonators for active filters. IEEE Transactions on Circuit Theory 968; 5:P45 P Ghausi MS, Laker K. Modern Filter Design Active C and Switched Capacitor. Prentice-Hall: Englewood Cliffs, NJ, Budak A, Petrala D. Frequency limitations of active filters using operational amplifiers. IEEE Transactions on Circuit Theory 972; 9: Brackett PO, Sedra AS. Active compensation for high frequency effects in op amp circuits with applications to active C filters. IEEE Transactions on Circuits and Systems 976; 23: Soliman AM, Ismail M. A novel active compensation method of op amp VCVS structures. Archiv Fur Elektronik und Ubertragungstechnik 979; 33: Ismail M, Smith S, Beale. A new MOSFET-C universal filter structure for VLSI. IEEE Journal of Solid State Circuits 988; 23: Salama KN, Soliman AM. Voltage mode Kerwin Huelsman Newcomb circuit using CDBAs. Frequenz 2000; 54: Sedra AS, Smith KC. A second generation current conveyor and its applications. IEEE Transactions on Circuits and Systems 970; 7: Soliman AM. Kerwin Huelsman Newcomb circuit using current conveyors. Electronics Letters 994; 30: Soliman AM. Current conveyor steer universal filter. IEEE Circuits Devices Magazine 995; : Soliman AM. Current mode universal filter. Electronics Letters 995; 3: Horng JW, Hou CL, Chang CM, Chou HP, Lin CT. High input impedance voltage mode universal filter with one input and five outputs using current conveyors. Circuits Systems and Signal Processing 2006; 25: Chui WY, Horng JW. High input and low output impedance voltage mode universal biquadratic filter using DDCCs. IEEE Transactions on Circuits and Systems II 2007; 54: DOI: 0.002/cta

21 KEWIN HUELSMAN NEWCOMB CICUITS Chiu W, Liu SI, Tsao HW, Chen JJ. CMOS differential difference current conveyors and their applications. IEE Proceedings Circuits, Devices and Systems 996; 43: Elwan HO, Soliman AM. A novel CMOS differential voltage current conveyor and its applications. IEE Proceedings, Circuits, Devices and Systems 997; 44: Lopez-Martin AJ, amirez-angulo J, Carvaial G. A proposal for high performance CCII-based analogue CMOS design. International Journal of Circuit Theory and Applications 2005; 33: Cajka J, Dostal T, Vrba K. General view on current conveyors. International Journal of Circuit Theory and Applications 2004; 32: Soliman AM. Voltage mode and current mode Tow Thomas bi-quadratic filters using inverting CCII. International Journal of Circuit Theory and Applications 2007; 35: Hwang Y-S, Wu D-S, Chen J-J, Shih C-C, Chou W-S. Design of current mode MOSFET-C filters using OTAs. International Journal of Circuit Theory and Applications DOI: 0.002/cta.477. DOI: 0.002/cta