Emerging spintronics-based logic technologies

Transcription

1 Center for Spintronic Materials, Interfaces, and Novel Architectures Emerging spintronics-based logic technologies Zhaoxin Liang Meghna Mankalale Jian-Ping Wang Sachin S. Sapatnekar University of Minnesota

2 On-chip heterogeneity Apple [ Snapdragon [ITRS 2014 whitepaper] 2

3 Outline Contenders: spintronic logic Requirements for spin-based logic A new device concept

4 Background: ASL and HEAL V DD V DD V SS I charge I DC GND Mn2Ga FePt Cu Input magnet Channel I S I spin V DD Contact Isolation Output magnet Input magnet injects spin into channel Channel transfers spin to output end Output magnet receives spin and stores state Heusler-based ASL (HEAL) Heusler alloys: high spin polarization (0.7~1.0), high perpendicular magnetic anisotropy (H k >10000 Oe), high spin injection efficiency, no tunnel barrier Other variations based on Spin-Hall effect

5 Background: Magnetoelectric (ME) devices ME-based device MESO Charge-mediated device [Chang et al., JxCDC16] [Manipatruni et al., ArXiv] ME effect used to switch input Signal propagation and majority evaluation using domain wall automotion Inverse ME effect used to switch output Charge used to switch input magnet using the ME effect Spin-orbit coupling (Spin- Hall effect, inverse Rashba-Edelstein effect) creates output charge current

6 Goals for spin-based logic devices High speed ~100ps switching time Low energy ~100aJ energy

7 ME + current-driven domain walls [Mankalale et al., DRC 2016] Goal: ~100ps delay, < 100aJ energy Domain wall speed bottleneck ME-based device using automotion proposed in [1] Experimentally, automotion ~70m/s [2] Expend energy, fast propagation Design-space exploration of material parameters Existing/exploratory material We propose CoMET: Composite-input Magneto- Electric Technology with domain wall propagation using spin orbit torque [1] S-. C. Chang et al., IEEE JxCDC, 2016 [2] J. Chauleau et al., PRB, 2010.

8 ME Logic with Current driven DW Motion

9 Device Dimensions MAJ3 LAYOUT Input Input FE i Output Dimension (l x w x h) FE 1F x 1F x 1 nm FM/HRM 5F x 1F x 1 nm Oxide 3F x 1F x 1 nm 1F FE i FM FE o 1F 1F FE i Input 5F Technology nodes considered: 1F = 5nm, 7nm,10nm

10 Domain Wall Nucleation V supply t = 0 Effective magnetic field from ME coupling, H ME t = 25ps Zeeman field t = 50ps Obtain t nucleate DW nucleation in FM

11 Current-driven Domain Wall Propagation 1 + $ % &' &( = +Δ -. % sin $% Δ 8 % $9 6-: + 9 ;<= sin ϕ 1 + $ % &? = +α -. &( % sin 23 + (BCD) F % 9 6-: cos (3) + $9 ;<= sin ϕ where 9 6-: = ħ N OPQ R, 9 %S T U< V W ;<= = ;, 5 XY S T < V F 677 = S [\ XY R, Δ = U< V `a b T Y c V._ d XY d XY e f C ] ^_ d XY d XY eg XY hij c? Ø Impact of scaled geometries considered for calculation of V, velocity of DW and Φ, phase of the DW. Ø Current density, J = 9 x A/m 2 (below electromigration limit). Ø Walker breakdown field also accounted for.

12 Design Space Exploration Design space large Focus only on FM material parameters Range of parameters chosen to cover both existing and exploratory materials Saturation Magnetization, M s (emu/cc) t nucleate increases 100 emu/cc 1000 emu/cc Uniaxial anisotropy, K u (J/m 3 ) t propagate increases Balance t nucleate vs. t propagate

13 Design Space Exploration - DW Propagation

14 Design Space Exploration - DW Propagation

15 Parameters Set Exchange constant, A (pj/m) Saturation Magnetization, M s (emu/cc) Results Set 1 Set 2 Set Supply voltage, V supply (V) Spin Polarization 0.5 Spin Hall Angle 0.5 Uniaxial anisotropy, K u (J/m 3 ) 10 6 Damping constant, α 0.05 Energy-delay tradeoff between parameter sets. Delay Energy Technology node (1F) Set 1 (ps) Set 2 (ps) Set 3 (ps) 5nm nm nm DW Velocity (m/s) Technology node (1F) t delay Energy Set 1 (aj) Set 2 (aj) Set 3 (aj) 5nm nm nm

16 Set Mapping to Materials Set 1 Set 2 Set 3 FM Parameters Exchange constant, A (pj/m) Saturation Magnetization, M s (emu/cc) Spin Polarization 0.5 Uniaxial anisotropy, K u ( J/m 3 ) 10 6 Mn-Ga based Heusler alloy Damping constant, α 0.05 FE Capacitor HRM BFO β-ta, Pt, β-w

17 Based on the use of a Sneak Peek of CoMET composite input structure Similar speeds Much lower Vdd V à < 0.3V Energy ~60aJ (currently being validated) Technology node (1F) Set 1 (ps) Set 2 (ps) Set 3 (ps) 5nm nm nm DW Velocity (m/s) t delay Supply voltage (V) Set 1 Set 2 Set 3 5nm nm nm Technology node (1F) Energy Set 1 (aj) Set 2 (aj) Set 3 (aj) 5nm nm nm

18 Summary New device for logic applications: ~100ps, ~100aJ per device Currently being extended to build larger circuits Possible applications Logic circuits In-/Near-memory processing structures IoT elements Acknowledgments Angeline Smith, Mahendra DC, Mahdi Jamali