Perpendicular MTJ stack development for STT MRAM on Endura PVD platform

Transcription

1 Perpendicular MTJ stack development for STT MRAM on Endura PVD platform Mahendra Pakala, Silicon Systems Group, AMAT Dec 16 th, 2014 AVS 2014 *All data in presentation is internal Applied generated data

2 OUTLINE STT MRAM Background Perpendicular Magnetic Tunnel Junction Basics Perpendicular Magnetic Tunnel Junction Using Endura PVD 2

3 Key Drivers for STT MRAM Today s Hierarchy CPU/ Register 10 ns 1 ns L1 Cache - SRAM L2, L3 Cache - SRAM STT MRAM 100 ns Main Off Chip Memory - DRAM 10 4 ns Local Storage - FLASH 10 6 ns Local Storage- HDD 10 9 ns Offline Storage - TAPE Scaling challenges of current RAM Latency gap between Storage and RAM 3

4 Endurance Random Read Access (s) Memory Performance Comparison SRAM DRAM STTRAM NAND NOR NAND NOR DRAM STTRAM SRAM Random Program Time (s) Cell Size (mm 2 ) STT RAM attributes: Endurance, Fast Access & Non-Volatility 4

5 Energy STTRAM BIT OPERATION Storing Data Magnetic direction of storage layer SL RL k B T FM INS FM 0 DE = KV 1 Reading Data Reading is done by sensing the resistance (high or low) Writing Data Writing is done using Spin Transfer Torque (STT) switching (MRAM, a precursor used magnetic field writing not scalable) i MgO SL Angle K, Anisotropy is material property and, V is the volume of storage layer N-B thermally activated flip probability: F t = 1 exp N t τ o exp E k B T Tunneling Magneto-resistance (TMR): TMR% = R AP R P R P 100 Switching current: D (= DE/ k B T) is a measure of length of data retention. High TMR% and low s (R) for fast read Low I c at high D is one of the tradeoffs in design 5

6 Switching Current (Writing) vs. Data Retention Switching Current (I co ) Data Retention / Thermal Stability (D) moment of SL damping const. Volume of SL Anisotropy (~ effective field for pmtj) I co α M V η H eff = VH km s 2 k B T spin polarization effective field Low I co at high D is key challenge for Magnetic Tunnel Junction (MTJ) stack development (along with high TMR, large pinning and thermal stability of stacks) 6

7 STT RAM Technology Options Type 1 NV SRAM / NV DRAM Type 2 SRAM, edram, Embedded Type 3 DRAM, Dense Standalone Pitch > 200 nm Pitch < 200 nm CD < 60 nm Pitch < 70 nm CD < 30nm M In-plane MTJ M Bottom Pin pmtj M Top Pin pmtj Perpendicular MTJ preferred for scalability Many new thin films (few Å) and, interfaces to control 7

8 Key Enabler: Magnetic Tunnel Junctions (MTJ) STT MRAM Sampling: Everspin TDK/Headway MTJ Developing: Toshiba/Hynix Samsung Global Foundries Micron Intel.... In-plane MTJ manufacturability demonstrated in HDD/MRAM (in products since 2007) Current Industry focus is on Perpendicular MTJ to enable high density arrays 8

9 OUTLINE STT MRAM Background Perpendicular Magnetic Tunnel Junction Basics Perpendicular Magnetic Tunnel Junction Using Endura PVD 9

10 MAX RESISTANCE (R MAX or R AP ) MIN RESISTANCE (R MIN or R P ) Magnetic Tunneling Junction (MTJ) a) Density of States in Semiconductor E 1 st Insulator/ Ferromagnet 2 nd Ferromagnet Barrier E E A Conduction 2 nd Ferromagnet E f E f E f Insulator 1 st Ferromagnet Valence D ( E) D (E) D ( E) D (E) D ( E) b) Density of States in Ferromagnet E D (E) RA(Ω. μm 2 ) = R P A i E E TMR% = R AP R P R P 100 E f E f E f D ( E) D (E) D ( E) D (E) D (E) D (E) 2 spin independent channel conduction amorphous barrier Spin filtering for tunneling through MgO crystalline barrier 10

11 Growth and Annealing of MgO MTJ Annealing at 300 to 450 C to obtain high TMR% 11

12 Anisotropy in Magnetic Films Anisotropy: Preferred direction/axis of magnetization. Many sources only 2 shown here Shape Anisotropy (in-plane) Demagnetizing field (H D ) M S Interfacial Anisotropy ( to plane) Symmetry breaking Strain Electron hybridization t _ H D = 4 M S cos t Metal or Oxides Ferromagnet film prefer in-plane magnetization, to reduce demagnetization field/energy For a film to have perpendicular ( ) magnetization, need to satisfy: H K H D > 0 K = K V + K S / t Effective Anisotropy bulk interface H K = 2K / M S 12

13 Stray Field Balance in MTJ: SAF SAF: Synthetic Anti-Ferromagnet SL Balanced SL M SL RL M RL RL PL Ru spacer RKKY Oscillatory Coupling in nonmagnetic spacer layer (Ru, Ir, Cr, ) Eg., CoFe\Ru\CoFe(FCC) j > 0 Ferromagnetic coupling spacer thickness j < 0: Anti-ferromagnetic coupling Reduces stray field on storage layer. Increases pin layer stability 13

14 STT MRAM: pmtj Stack Engineering Summary PMA Interface & Bulk PMA Basic MTJ Spin Dependent Coherent tunneling SyAF /SAF Pin MTJ RKKY coupling // MgO CoFeB (t) Ta SL e RL M SL M RL MgO e SL RL PL BCC FCC Thickness and thermal budget control Atomic level matching across interface 4.5Å 8.5Å Ru (t) RKKY coupling as function of Ru thickness Sub Å control of film thickness and interface roughness MgO growth condition for crystal texture/quality (low impurity, OH) and anneal Crystalline texture for magnetic materials 14

15 OUTLINE STT MRAM Background Perpendicular Magnetic Tunnel Junction Basics Perpendicular Magnetic Tunnel Junction Using Endura PVD 15

16 Perpendicular MTJ Stack Deposition Endura PVD Platform

17 Perpendicular MTJ Stack Blanket Film Performance: Transport/Tunneling (CIPT) Optimized Top Pin (RA:12, TMR : 200%) Top Pin Bottom Pin Thermal Stability of Bottom Pin High TMR and BEOL Thermal Budget Compatibility for MTJ Stack Dep 17

18 Moment Perpendicular MTJ Stack Blanket Film Performance, Magnetics (VSM) Bottom Pin Top Pin SL SAF PL RL FL Field (koe) Large pinning strength for SAF and square loop for Free Layer 18

19 Patterned pmtj Performance Metrics 1) Quasi Static Test (measure MTJ resistance as field is scanned), 2) Pulse current measurements V R AP Hc Field Scan Direction Hoff High TMR for fast read Low H off for reliability Low R P sigma for yield R P TMR = R AP R P R P 100% High H c ( Hk) for data retention 19

20 Resistance (Ohms) MTJ Size Dependence (Patterned): Top Pin 20nm H c ~ 850 Oe Patterned H off R min :30k, R max : 70k TMR ~ 153% Field (Oe) 20nm (smallest CD) High TMR and H C can be achieved by MTJ stack optimization and etch process tuning. 20nm bits with highest TMR of ~ 153% and Hc ~ 850 Oe. 20

21 Switching Current (Ic) & Scalability 20-25nm (smallest CD) Low switching current (~ 20uA) obtained by pmtj stack optimization D (data retention) ~ 50 for ~ 20nm. 21

22 Summary STT MRAM offers good endurance, speed and non-volatility. Hence being considered for embedded, cache and stand alone memory. One key challenge for making high density STT MRAM is developing materials with low switching current (I co ) at high thermal stability (D), with high TMR% & pinning. Using Endura PVD system, perpendicular MTJ stacks with performance suitable for dense arrays were demonstrated. Blanket film performance: TMR ~ 200% at RA ~ 12. Pinning > 2kOe. 20nm patterned MTJ: I co of ~ 20uA, D > 50, patterned TMR of ~ 153% Thanks for your attention! 22

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