Switched Capacitor Circuits II. Dr. Paul Hasler Georgia Institute of Technology


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1 Switched Capacitor Circuits II Dr. Paul Hasler Georgia Institute of Technology
2 Basic SwitchCap Integrator = [n1]  ( / ) H(jω) =  ( / ) e jωt ~  ( / ) / jωt (z)  z 1 1 (z) = H(z) =  ( / ) 1 assumes ωt << 1; therefore we need to sample much higher (factor of 10 to 20) over frequencies of interest.
3 SwitchCap Implementation
4 SwitchCap Implementation Transistor switches result in: Parasitic capacitances Charge / clock feedthrough
5 SwitchCap Implementation Now adding Parasitic capacitors: C p4 C p5 C p2 C p0 C p1 C p3
6 SwitchCap Implementation C p4 C p5 C p2 C p0 C p1 C p3 Fortunately, many of these capacitors have minimal effect on the circuit Parasitic capacitances to a voltage source can be neglected Parasitic capacitances to a virtual AC can be neglected (the effect of the capacitance is divided by the openloop gain)
7 SwitchCap Implementation C p1 C p2 We still have parasitic capacitances effecting our result We can either make large to swamp out parasitic capacitors, or use a stray insensitive design
8 SwitchCap Integrator V 2 We will step through all four phases, to get the proper result.
9 SwitchCap Integrator (4), [n1] cycle [n1] Q =  [n1] Voltage = 0V [n1] (Voltage remains held) V 2 [n1] This case is important to understand our starting point charge is stored on a capacitor ; therefore we need to know the initial state
10 SwitchCap Integrator (1), cycle: Q =  [n1] [n1] (Output unchanged) V 2 Charge up the capacitor with voltage
11 SwitchCap Integrator (2), cycle Q 1 = Q =  [n1] [n1] (Output unchanged) V 2 Q 1 =  We remove the capacitor from the first voltage. The voltage is stored across the capacitor
12 SwitchCap Integrator (3), cycle: Q =  [n1] +  V 2 [n1] + ( / ) (V 2  ) V 2 We connect the capacitor to the charge summing node The charge initially stored on the capacitor as well as the resulting charge from the second input (V 2 ) contributes to the total charge
13 SwitchCap Integrator (4), cycle Q =  [n1] + ( V 2 ) = [n1] + ( / ) (V 2  ) (Output unchanged) V 2 We disconnect the capacitor from the charge summing node, and return to our initial case = [n1] + ( / ) (V 2  )
14 SwitchCap Integrator C A A V 2 V 2 By switching which input is first, we can digitally invert the signal
15 Differential SwitchCap Circuit V in V in  Why?
16 Differential SwitchCap Circuit V in V in  Why? Higher PSRR, lower harmonic Distortion, lower noise Cost?
17 Differential SwitchCap Circuit V in V in  V in = V in +  V in  = (assume balanced output) Why? Higher PSRR, lower harmonic Distortion, lower noise Cost? Larger OpAmp, more power
18 Differential SwitchCap Circuit (4), [n1] cycle Voltage = 0V Q =  [n1]/2 V in + [n1] + [n1]  [n1] V in  [n1] Q = [n1]/2 (Voltage remains held) This case is important to understand our starting point charge is stored on a capacitor ; therefore we need to know the initial state
19 Differential SwitchCap Circuit (1), cycle: Q =  [n1]/2 V in + V in + [n1]  [n1] V in  (Output unchanged) Q = [n1]/2 Charge up the capacitor with voltage V in
20 Differential SwitchCap Circuit (2), cycle Q 1 = V in Q =  [n1]/2 V in + V in + [n1]  [n1] V in  (Output unchanged) Q 1 =  V in Q = [n1]/2 We remove the capacitor from the first voltage. The voltage is stored across the capacitor
21 Differential SwitchCap Circuit (3), cycle: Q =  [n1]/2 + V in V in + V in  Q = [n1]/2  V in +  = [n1] + 2( / ) (V in ) We connect the capacitor to the charge summing node
22 Differential SwitchCap Circuit (4), cycle V in + ~0 +  V in  (Output unchanged) We disconnect the capacitor from the charge summing node, and return to our initial case = [n1] 2 ( / ) V in
23 Stray Insensitive Circuits Discussed issue of stray insensitive circuits Discussed two typically used circuits, one single ended and one differential ended
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