Switched Capacitor Circuits I. Prof. Paul Hasler Georgia Institute of Technology

Transcription

1 Switched Capacitor Circuits I Prof. Paul Hasler Georgia Institute of Technology

2 Switched Capacitor Circuits Making a resistor using a capacitor and switches; therefore resistance is set by a digital clock and the capacitor. Filters built in this technology are set by external clocks, and ratio of capacitors (matching of 0.1% to 1%) The precision of the frequency response is realized by ratios of capacitors (1% to 0.1% better matching, larger caps; therefore more power/area), and a clock signal (which can be set precisely with a crystal reference)

3 Capacitor Circuits Capacitive Voltage Divider Q Capacitive Feedback Q = + C T Q C T C T Vfg Multiple Input Voltage Divider = - - Q C2 Q C 3 C T = + + C T C T Q C T Vfg = (1 + ) - Q C2

4 Non-Overlapping Clocks We will always be using non-overlapping clocks; therefore, we want a waveform like We effectively have four phases. t d (1) (2) (3) (4) cycle t

5 Non-Overlapping Clocks We will always be using non-overlapping clocks; therefore, we want a waveform like We effectively have four phases. t d (1) (2) (3) (4) cycle t Would want t d as small as possible for proper operation We will also assume that the input is held constant through the entire th cycle

6 Non-Overlapping Clocks We will always be using non-overlapping clocks; therefore, we want a waveform like We effectively have four phases. t d (1) (2) (3) (4) cycle Would want t d as small as possible for proper operation We will also assume that the input is held constant through the entire th cycle t Circuit to generate waveform N-stages of delay (sets t d ) Clock in

7 Basic Switched Capacitors

8 Basic Switched Capacitors (1), cycle I Q = ( [n-1])

9 Basic Switched Capacitors (1), cycle I Q = ( [n-1]) (3), cycle Q = ( ) I

10 Basic Switched Capacitors (1), cycle I Q = ( [n-1]) (3), cycle If we assume the input changes slowly ( [n-1] ~ ; therefore we are oversampling), we get Q = ( ) I I = Q f = f ( ) ; R = 1 / ( f) where f = clock frequency.

11 Basic Switched Capacitors ~ I R = 1 / ( f) where f = clock frequency.

12 Basic Switched Capacitors ~ I R = 1 / ( f) where f = clock frequency. For 0.1pF capacitor, and a 10kHz clock, we get a resistance of 1GOhm

13 Basic Switched Capacitors ~ I R = 1 / ( f) where f = clock frequency. For 0.1pF capacitor, and a 10kHz clock, we get a resistance of 1GOhm Rule of thumb: slow moving means we oversample the Nyquist frequency of the input signal by a factor of 20 or more.

14 Basic Switch-Cap Integrator R 1

15 Basic Switch-Cap Integrator R 1 We will step through all four phases, to get the proper result.

16 Basic Switch-Cap Integrator (4), [n-1] cycle [n-1] Q = - [n-1] Voltage = 0V [n-1] (Voltage remains held) This case is important to understand our starting point charge is stored on a capacitor ; therefore we need to know the initial state

17 Basic Switch-Cap Integrator (1), cycle: Q = - [n-1] [n-1] (Output unchanged) Charge up the capacitor with voltage

18 Basic Switch-Cap Integrator (2), cycle Q 1 = Q = - [n-1] [n-1] (Output unchanged) We remove the capacitor from the input voltage. The voltage is stored across the capacitor

19 Basic Switch-Cap Integrator (3), cycle: Q = - [n-1] + = [n-1] - ( / ) We connect the capacitor to the charge summing node The charge initially stored on the capacitor as well as the resulting charge from the second input ( ) contributes to the total charge

20 Basic Switch-Cap Integrator (4), cycle Q 1 = 0 Q = - [n-1] + Voltage = 0V = [n-1] - ( / ) (Output unchanged) We disconnect the capacitor from the charge summing node, and return to our initial case = [n-1] - ( / )

21 Basic Switch-Cap Integrator = [n-1] - ( / ) (z) - z -1 1 (z) = H(z) = - ( / ) 1

22 Basic Switch-Cap Integrator = [n-1] - ( / ) H(jω) = - ( / ) e -jωt ~ - ( / ) / jωt (z) - z -1 1 (z) = H(z) = - ( / ) 1 assumes ωt << 1; therefore we need to sample much higher (factor of 10 to 20) over frequencies of interest.