MC10H130. Dual Latch. Features MARKING DIAGRAMS* Table 1. TRUTH TABLE. Figure 1. Logic Diagram. Figure 2.

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1 00 ual atch escription The 00 is a E 0 part which is a functional/pinout duplication of the standard E 0 family part, with 00% improvement in clock speed and propagation delay and no increase in power supply current. eatures Propagation elay,.0 ns Typical Power issipation, 55 mw Typical Improved Noise argin 50 mv (Over Operating Voltage and Temperature Range) Voltage ompensated E 0 ompatible Pbree Packages are vailable* S 5 7 E 6 R 4 R E 0 Q Q V = PIN V = PIN V EE = PIN Table. TRUT TE E + IP SUI SE 60 PIP P SUI SE 648 RIN IRS* 00 WYYWW 00P WYYWW S igure. ogic iagram 0 V Q Q R S E V EE V R S E Pin assignment is for ualinine Package. igure. Pin ssignment *or additional information on our Pbree strategy and soldering details, please download the ON Semiconductor Soldering and ounting Techniques Reference anual, SOERR/ WYYWW P0 N SUI SE 775 W YY WW = ssembly ocation = Wafer ot = Year = Work Week = Pbree Package *or additional marking information, refer to pplication Note N800/. ORERIN INORTION See detailed ordering and shipping information in the package dimensions section on page of this data sheet. Semiconductor omponents Industries,, 006 ebruary, 006 Rev. 8 Publication Order Number: 00/

2 00 Table. IU RTINS Symbol haracteristic Rating Unit V EE Power Supply (V = 0) 8.0 to 0 Vdc V I Input Voltage (V = 0) 0 to V EE Vdc I out Output urrent ontinuous Surge T Operating Temperature Range 0 to +75 T stg Storage Temperature Range Plastic eramic to to +5 aximum ratings are those values beyond which device damage can occur. aximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. m Table. EETRI RTERISTIS (V EE = 5. V ±5%) (Note ) Symbol haracteristic in ax in ax in ax Unit I E Power Supply urrent m I in Input urrent igh Pins 6, Pins 7,, 0 Pins 4, 5,, I in Input urrent ow V O igh Output Voltage Vdc V O ow Output Voltage Vdc V I igh Input Voltage Vdc V I ow Input Voltage Vdc. Each E 0 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50 resistor to.0 V. Table. PRETERS Symbol haracteristic in ax in ax in ax Unit t pd Propagation elay ata Set, Reset lock, E ns t r Rise Time ns t f all Time ns t set Setup Time... ns t hold old Time ns NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. unctional operation of the device exceeding these conditions is not implied. evice specification limit values are applied individually under normal operating conditions and not valid simultaneously.

3 00 PPITION INORTION The 00 is a clocked dual type latch. Each latch may be clocked separately by holding the common clock in the low state, and using the clock enable inputs for the clocking function. If the common clock is to be used to clock the latch, the clock enable (E) inputs must be in the low state. In this mode, the enable inputs perform the function of controlling the common clock (). ny change at the input will be reflected at the output while the clock is low. The outputs are latched on the positive transition of the clock. While the clock is in the high state, a change in the information present at the data inputs will not affect the output information. The set and reset inputs do not override the clock and inputs. They are effective only when either or E or both are high. ORERIN INORTION evice Package Shipping 00N P0 46 Units / Rail 00N P0 (Pbree) 46 Units / Rail 00NR P0 500 / Tape & Reel 00NR P0 (Pbree) 500 / Tape & Reel 00 IP 5 Unit / Rail 00P PIP 5 Unit / Rail 00P PIP (Pbree) 5 Unit / Rail or information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications rochure, R80/.

4 00 PE IENSIONS 0 E P SE 7750 ISSUE E (0.80) T S N S N Y R U (0.80) T S N S Z W (0.50) S T S N S V VIEW (0.80) T S N S Z R (0.80) T S N S (0.80) T S N S 0.00 (0.50) S T S N S E (0.00) J T SETIN PNE VIEW S VIEW S. IENSIONS N TOERNIN PER NSI Y4.5, 8.. IENSIONS IN INES.. TUS,, N N ETERINE WERE TOP O E SOUER EITS PSTI OY T O PRTIN INE. 4. IENSION, TRUE POSITION TO E ESURE T TU T, SETIN PNE. 5. IENSIONS R N U O NOT INUE O S. OWE O S IS 0.00 (0.50) PER SIE. 6. IENSIONS IN TE PE TOP Y E SER TN TE PE OTTO Y UP TO 0.0 (0.00). IENSIONS R N U RE ETERINE T TE OUTEROST ETREES O TE PSTI OY EUSIVE O O S, TIE R URRS, TE URRS N INTERE S, UT INUIN NY IST ETWEEN TE TOP N OTTO O TE PSTI OY. 7. IENSION OES NOT INUE R PROTRUSION OR INTRUSION. TE R PROTRUSION(S) S NOT USE TE IENSION TO E RETER TN 0.07 (0.40). TE R INTRUSION(S) S NOT USE TE IENSION TO E SER TN 0.05 (0.65) (0.80) T S N S INES IIETERS I IN IN E S.7 S J R U V W Y Z

5 00 PE IENSIONS IP SUI ERI IP PE SE 600 ISSUE O. IENSIONIN N TOERNIN PER SE Y4.5, 4.. ONTROIN IENSION: IN.. IENSION TO ENTER O E WEN ORE PRE. 4. IENSION Y NRROW TO 0.76 (0.00) WERE TE E ENTERS TE ERI OY. 5 TIS RWIN REPES OSOETE SE OUTINE 600. E 8 J 0.5 (0.00) T INES IIETERS I IN IN E S.7 S S.54 S S 7.6 S N N T SETIN PNE 0.5 (0.00) T 8 P S 0.5 (0.00) T SETIN T PNE PIP P SUI PSTI IP PE SE ISSUE R J. IENSIONIN N TOERNIN PER NSI Y4.5, 8.. ONTROIN IENSION: IN.. IENSION TO ENTER O ES WEN ORE PRE. 4. IENSION OES NOT INUE O S. 5. ROUNE ORNERS OPTION. INES IIETERS I IN IN S.54 S S.7 S J S E 0 and E 0 are trademarks of otorola, Inc. ON Semiconductor and are registered trademarks of Semiconductor omponents Industries, (SI). SI reserves the right to make changes without further notice to any products herein. SI makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SI assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SI data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SI does not convey any license under its patent rights nor the rights of others. SI products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SI product could create a situation where personal injury or death may occur. Should uyer purchase or use SI products for any such unintended or unauthorized application, uyer shall indemnify and hold SI and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SI was negligent regarding the design or manufacture of the part. SI is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUITION ORERIN INORTION ITERTURE UIENT: iterature istribution enter for ON Semiconductor P.O. ox 6, Phoenix, rizona 8508 US Phone: or Toll ree US/anada ax: or Toll ree US/anada orderlit@onsemi.com N. merican Technical Support: Toll ree US/anada Japan: ON Semiconductor, Japan ustomer ocus enter amimeguro, eguroku, Tokyo, Japan 5005 Phone: ON Semiconductor Website: Order iterature: or additional information, please contact your local Sales Representative. 00/