Resistive Random Access Memories (RRAMs)
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1 Resistive Random Access Memories (RRAMs) J. Joshua Yang HP Labs, Palo Alto, CA, USA (currently) ECE Dept., Umass Amherst (Jan/ ) 1 Copyright 2010 Hewlett-Packard Development Company, L.P.
2 Resistive Random Access Memory (RRAM, Memristor) 1. Introduction: stack, classifications 2. Applications: store information, process information 3. Mechanisms: electroforming, switching, modeling 4. Promises, Challenges and solutions: variance, selector, 3D stacking 5. Summary and Outlook 2 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
3 Simple structure but rich materials, physics, chemistry, electrical issues Metal 1 insulator Metal 1 insulator V Metal 2 Metal 2 3 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
4 Images of Oxide nanodevice Cross-section TEM BE TE Nano-devices 1x17 Top electrode insulator oxide Bottom electrode V 5nm J. Joshua Yang et al., Nature Nano. 3, 429 (2008) 4 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
5 Classification: switching polarity nonpolar Compared with bipolar, Unipolar Usually has: higher power, larger resistance window, but less endurance. R. Waser and M. Aono, Nature Mater. 6, 833 (2007) 5 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
6 Classification: switching location Localized laterally filamentary interfacial Localized vertically R. Waser and M. Aono, Nature Mater. 6, 833 (2007) A. Sawa, Mater. Today 11, (2008) Filamentary & interfacial The Most common cases! Localized both laterally and vertically. 6 J. Joshua Yang MRS Fall 2014 RRAM Tutorial J. Joshua Yang et al., Nature Nanotechnol. 3, 429 (2008)
7 Classification: mobile species (cation/anion) Cation Anion Ag 2 S Ag Pt Terabe et al., Nature 433,47 (2005) Kozicki et al., IEEE Tans. Nano 4, 331 (2005) Jo et al., Nano Lett. 8, 392 (2008) Szot et al., Nat. Mater. 5, 312 (2006) Janousch et al., Adv. Mater. 19, 2232 (2007) 7 J. Joshua Yang MRS Fall 2014 RRAM Tutorial D. H. Kwon et al., Nature Nano 5, 148 (2010).
8 Classification: dopant type (P type/ n type) P type n type Opposite switching polarity A. Sawa, Mater. Today 11, (2008) 8 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
9 Classification: Switching mechanisms Physical switches Chemical switches Physical switches Adapted from R. Waser, IEDM J. Joshua Yang MRS Fall 2014 RRAM Tutorial R. Waser, Adv. Mater. 21, 2632 (2009)
10 Resistive Random Access Memory (RRAM) 1. Introduction: stack, classifications 2. Applications: store information, process information 3. Mechanisms: electroforming, switching, modeling 4. Promises, Challenges and solutions: variance, selector, 3D stacking 5. Summary and Outlook 10 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
11 Long history and Revived interest The first two switches in 1960 s Nb/Nb 2 O 5 125nm/Bi J.F. Gibbons and W. E. Beadle, Solid-state electronics 7, 785 (1964) W. R. Hiatt and T. W. Hickmott, Appl. Phys. Lett. 6, 106 (1965) Not interesting between 1970s 2000s due to the rise of Si technology Interest revived because the physical limit of Si technology is here now! 11 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
12 Useful both for storing and processing information Heterogeneous integrations (development) Existing technologies Completely new concepts (research) Extended CMOS Memristor New technologies (1) Emerging memory (2) Emerging logic devices (3) New architectures: Neuromorphic computing year ITRS 2013 (The International Technology Roadmap for Semiconductors) 12 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
13 (1) Emerging Memory: exponential growth in demand Non-volatile Memory Gigabyte Growth Trends Cloud is really memory and Storage Source: Micron & Gartner 13 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
14 (1) Emerging Memory: RRAM fast, non-volatile, low energy, Ultra-Dense Switching materials (e.g. TiO 2 ) Smaller cell (scalability) and 3D (stackability) lead to ultra-high density! 14 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
15 (2) Emerging Logic: Type I: Memristor/CMOS hybrid logic FPGA With much improved density and performance! CMOS circuit Hybrid circuit Q. Xia et al., Nano Letters., 9, 3640 (2009) 15 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
16 (2) Emerging Logic: Type II: implication logic Bertrand Russell Material Implication + FALSE operation = universal computing OR, AND, NOT Material implication The forth fundamental logic operations 16 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
17 (2) Emerging Logic: Type II: implication logic based NAND Computation Naturally realized with nano-crossbars: 2 Memristors implication logic 3 Memristors NAND logic P Q S Advantages: Denser Non-volatile logic R G s q IMP (p IMP 0) = p NAND q J. Borghetti et al., Nature 464, 873 ( 2010) 17 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
18 (3) Analog computing: Computing accelerator, e.g. Dot-Product Engine Vector x Matrix multiplications Computation intensive tasks (many multiplication and addition steps) Only one step in dot-product engine With orders of magnitude Improvement in speed and power efficiency! 18 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
19 (4) Neuromorphic computing: the last computing frontier Analog Parallel Multifunctional Adaptive- HW Learning Neurons + Synapses Process & store information Neurons spike, which changes Resistance of Synapses 19 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
20 Neuromorphic computing: the winner memristor! The last computing frontier CMOS 100 W neurons synapses 2 Memristors ~ neuron 1 Mimristor ~ synapse Possible with nano memristors (on an A4 paper) 100 W 10 9 transistors 10 transistors / synapse 10 8 synapses 10 5 neurons Need ~ 1,000,000 chips!!! Impossible with CMOS chips 20 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
21 Resistive Random Access Memory (RRAM) 1. Introduction: stack, classifications 2. Applications: store information, process information 3. Mechanisms: electroforming, switching, modeling 4. Promises, Challenges and solutions: variance, selector, 3D stacking 5. Summary and Outlook 21 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
22 Electroforming mechanism: Bubbling Phenomena Micro device (5µm 5µm) Current (A) Forming ON 1st OFF Reversible Switching Voltage (V) TE TE forming BE BE J. Joshua Yang et al., Nanotechnology 20, (2009). 22 J. Joshua Yang MRS Fall 2014 RRAM Tutorial Gas Eruption Feature
23 Electroforming mechanism: Bubbling Phenomena Larger devices, clear bubble evolving process; Different polarities cause different behavior. Little movie for Pt/TiO2/Pt stack Polarity, numbers, retention J. Joshua Yang et al., Nanotechnology 20, (2009). 23 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
24 Electroforming mechanism: Bubbling Phenomena a Initial state b - V On TE c - V removed d Then +V On TE -V TiO 2 TE Pt 30nm TiO 2 60nm BE Pt 15nm V Junction area O 2- O 2- O O 2-2 +V A few bubbles form under the TiO 2 layer The Bubbles remain even after -V biasing is removed Previous bubbles shrink, new bubbles form above thetio 2 layer e keep f + V removed g h + V On TE +V O 2- O2 O 2- O 2-60nm Larger and longer +V on TE TiO 2 -V New bubbles grow in size and number with time Bubbles disappeared immediately when the +V is removed Some small permanent deformations remain Large bubbles grow to engulf neighbors 24 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
25 Electroforming mechanism: no bubbles found in the nm Fortunately, nano makes difference! Nano device (50nm 50nm) Formed and switched devices No detectable deformation by AFM 25 J. Joshua Yang MRS Fall 2014 RRAM Tutorial J. Joshua Yang et al., Nanotechnology 20, (2009).
26 Electroforming mechanism: peering inside a functioning device Scanning Transmission X-ray Microscope (STXM) (Scanning Transmission electron Microscope, STEM) Feature observed Window V Devices fabricated atop 20 nm silicon nitride membrane windows Blanket oxide between two electrodes J. P Strachan et al., Advanced Materials 22, 3573 (2010) 26 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
27 What were learned from STXM Scanning Transmission X-ray Microscopy Full of oxygen vacancies What we learned from STXM: 1) Localized channel 2) Oxygen vacancies 3) Joule heating TiO 2 Amorphous TiO 2 Anatase (crystallization sign of heating) TiO 2-x Reduced (with V 2+ o dopants) Oxygen vacancies: Positive charged; mobile under electric field/temperature 1) n-type dopants 2) e - hopping centers 3) gap states 27 J. Joshua Yang MRS Fall 2014 RRAM Tutorial J. P Strachan et al., Advanced Materials 22, 3573 (2010)
28 Electroforming mechanism: peering inside a functioning device Magneli phase J. P Strachan et al., Advanced Materials 22, 3573 (2010) D. H. Kwon, et al. Nature Nano. 5, 148 (2010) 28 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
29 Electroforming free device: by thinning the oxide layer Pt Pt 33nm TiO 2 Pt Forming 33nm TiO 2 Pt TiO 2-x 4nm Pt TiO 2 Pt Forming 4nm Pt TiO 2 Pt J. Joshua Yang et al., Nanotechnology 20, (2009). 29 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
30 Electroforming free device: by thinning the oxide layer Pt Similar ON resistance Similar OFF resistance 33nm TiO 2 Pt Similar ON/OFF ratio 4nm Pt TiO 2 Pt Current (A) Forming ON 1st OFF Reversible Switching Eliminated the electroforming -5 step!! linear Voltage (V) 30 J. Joshua Yang MRS Fall 2014 RRAM Tutorial Current (A) Current (A) Voltage (V) Forming ON 1st OFF Reversible Switching Log Voltage (V)
31 Electroforming free devices: Bilayer structure thin stoichiometric layer + thick off-stoichiometric layer 25x nm TiO 2 /120 TiO 2-x IF_J061216x5_2Form IF_J061216x5_3OFF IF_J061216x5_4Switch IF_J061216x5_50Switch IF_J061216x5_100Switch IF_J061216x5_150Switch IF_J061216x5_204Switch Pt TiO 2 4nm 120nm TiO 2-x Pt I (A) V(V) J. Joshua Yang et al., Nanotechnology 20, (2009). 31 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
32 Resistive Random Access Memory (RRAM) 1. Introduction: stack, classifications 2. Applications: store information, process information 3. Mechanisms: electroforming, switching, modeling 4. Promises, Challenges and solutions: variance, selector, 3D stacking 5. Summary and Outlook 32 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
33 Simplified picture of switching mechanism: TiO x Where: interface; What: oxygen vacancies (2 +, n-dopant); How: drift. metallic Schottky-like: OFF Φ b w OFF ON V Pt TiO 2 Ohmic-like: ON w Φ b TiO 2-X Ti TiO 2 J. Joshua Yang et al., Nature Nanotechnology 3, 429 (2008) J. P Strachan et al., Advanced Materials 22, 3573 (2010) F. Miao, J.P. Stranchan, J. JoshuaYang* et al., Adv. Mater (2011) V o 2+ n-type dopant 33 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
34 Nanodevice family: M/I/M with two interfaces Pt 10 Complementary switching TiO 2 I TiO 2-X V TiO 2-X Pt Measured V V -V Measured 1.5 -V +V Measured I Intrinsic diode V I I V V J. Joshua Yang et al., Advanced Materials, 21, 3754 (2009) 34 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
35 Mechanisms: more switching types Switching is a result of ionic motion under the combined effect of electric field and Joule heating Field dominating thermal dominating Bipolar Bipolar Nonpolar Nonpolar TiO x TaO x NiO x NbO 2 Current Nonlinear IV Current Linear IV Current Bi-stable Current Threshold Voltage Voltage Voltage Voltage J. Joshua Yang et al., Nature Nanotechnology 8, 13 (2013) 35 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
36 Mechanisms: four Ionic transport mechanisms Drift Electromigration Electric potential gradient e ē - e - e - e - e - e - Electric potential gradient Fick Diffusion Concentration gradient Thermophoresis Temperature gradient J. Joshua Yang et al., Nature Nanotechnology 8, 13 (2013) 36 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
37 Possible Electron transport mechanisms (1) Schottky emission (2) Fowler-Nordheim (F-N) tunneling (3) Direct tunneling (4) tunneling from cathode to traps (5) emission from trap to conduction band (6) F-N - like tunneling from trap to conduction band (7) trap to trap hopping or tunneling (8) tunneling from traps to anode. S.M. Yu et al., APL 99, (2011) 37 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
38 Cation based RRAM switching process: classic 38 J. Joshua Yang MRS Fall 2014 RRAM Tutorial I Valov et al., Nanotechnology 22, (2011)
39 Different filament growth orientation Ag + drifts fast Ag + drifts slow Pt Ag -V Pt Ag 1μm 0.1μm Ag Ag H 2 O, GeTe Pt a-si, HfO 2 Pt X. Guo et al., Appl. Phys. Lett. 91, (2007) Y. Yang et al. Nature Commun 3, 732 (2012) Q. Liu et al. Adv. Mater. 24, 1844 (2012) Y. Yang et al. Nat Commun 5, 4232 (2014) H. Sun, Adv. Funct. Mater. 24, 5679 (2014) F. Pan et al., Mater. Sci. Eng. R 83, 1 (2014) 39 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
40 Resistive Random Access Memory (RRAM) 1. Introduction: stack, classifications 2. Applications: store information, process information 3. Mechanisms: electroforming, switching, modeling 4. Promises, Challenges and solutions: variance, selector, 3D stacking 5. Summary and Outlook 40 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
41 History of Memristor: Theory Resistor 1827 Georg Ohm RESISTOR v = R i CAPACITOR q = C v INDUCTOR φ = L i Capacitor Volta / von Kleist & van Musschenbroek Benjamin Franklin Inductor 1831 Michael Faraday Joseph Henry 41 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
42 History of Memristor: Theory v i RESISTOR dv = R di INDUCTOR dφ = L di dφ/dt = v φ CAPACITOR dq = C dv dq /dt = i q Missing relation here! The Father of Non-Linear Circuit Theory Introduction to Nonlinear Network Theory, NY: McGraw-Hill, J. Joshua Yang MRS Fall 2014 RRAM Tutorial
43 History of Memristor: Theory v RESISTOR dv = R di CAPACITOR dq = C dv Memristor - the missing circuit element, IEEE Trans. Circuit Theory 18, 507 (1971). i INDUCTOR dφ = L di dφ/dt = v dq /dt = i MEMRISTOR dφ = M dq q M is a memory resistor it is a nonvolatile resistive memory! φ 43 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
44 Chua s equations for memristor modeling L. O. Chua IEEE Trans. Circuit Theory 18, 507 (1971) L. O. Chua and S. M. Kang, Proc. IEEE (1976) L. O. Chua, Applied Physics A 102, 765 (2011) Adapted from R. Waser, IEDM 2011, short course 44 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
45 Static I-V curve fitting: static J. P. Strachan et al., IEEE TED 60, 2194 (2013) S. Menzel et al., Adv. Func. Mater. 21, 4487 (2011) 45 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
46 Switching process fitting: dynamic 46 J. Joshua Yang MRS Fall 2014 RRAM Tutorial J. P. Strachan et al., IEEE TED 60, 2194 (2013)
47 Resistive Random Access Memory (RRAM) 1. Introduction: stack, classifications 2. Applications: store information, process information 3. Mechanisms: electroforming, switching, modeling 4. Promises, Challenges and solutions: variance, selector, 3D stacking 5. Summary and Outlook 47 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
48 Promises and Challenges Promises: Historically Strong Challenges: To be improved 1. Speed (<0.1ns) 2. Scalability (<5nm ) 3. Operation energy (<1pJ) 4. Non- volatility (>10years) 5. Non- destructive reading 6. Multilevel (analogue) 7. Stackability (infinite) 8. CMOS com patibility 9. Low cost Variability 2. Nonlinearity Review: Metal oxide memories based on thermochemical and valence change mechanisms J. Joshua Yang et al., MRS Bulletin 37, 131 (2012) Review: Memristors in computing - promises and challenges J. Joshua Yang et al., ACM JETC 9, 11 (2013) 48 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
49 Promises Promises: Historically Strong 1. speed Speed (0.1 (<0.1ns) 2. Scalability (<5nm ) 3. Operation energy (<1pJ) 4. Non- volatility (>10years) 5. Non- destructive reading 6. Multilevel (analogue) 7. Stackability (infinite) 8. CMOS com patibility 9. Low cost 10. Too fast to measure! 49 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
50 Demonstrated switching on the order of 100 ps Reproducible fast switching observed over consecutive cycles 100ps 100ps Can be even faster than 0.1ns Not limited by the memristor itself, but by how fast a pulse can be applied. A. Torrezan et al. Nanotechnology, 22, (2011) 50 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
51 Promises and Challenges Promises: Historically Strong Switching the individual dislocations 1. Speed (<2ns) 2. Scalability (<5nm (<5nm) ) 3. Operation energy 4. Non- volatility (>10years) 5. Non- destructive reading S. Pi et al., JVST B 31, 06FA02 (2013) 6. Multilevel (analogue) 7. Stackability (infinite) IEDM, P.729 (2011) 8. CMOS com patibility 9. Low cost 10. Szot et al., Nat. Mater. 5, 312 (2006) 51 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
52 Promises and Challenges Promises: Historically Strong 1. Speed (<0.1ns) 2. Scalability (<5nm ) 3. Operation energy energy (<1pJ) (<1pJ) 4. Non- volatility (>10years) 5. Non- destructive reading 6. Multilevel (analogue) 7. Stackability (infinite) 8. CMOS com patibility 9. Low cost J. Joshua Yang MRS Fall 2014 RRAM Tutorial
53 TaOx nanodevice: low energy 5000 TaOx microdevice 500x 10 TaOx nanodevice Current (ua) Current (ua) Voltage (V) Voltage (V) 20uA*100ps*5V = 10fJ/switching F. Miao, J.P. Strachan, J. Joshua Yang * et al., Advanced Materials 23, 5633 (2011). 53 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
54 Promises and Challenges Promises: Historically strong 1. Speed (<0.1ns) 2. Scalability (<5nm ) 3. Operation energy (<1pJ) Non- volatility (>10years) 4. Non- volatility (>10years) 5. Non- destructive reading 6. Multilevel (analogue) 7. Stackability (infinite) 8. CMOS com patibility 9. Low cost V (Ω) nm device OFF ON 0.5year time (s) Choi, Torrezan, Norris, Miao, Strachan, Zhang, Ohlberg, Kobayashi, Yang*, and Williams, Nano Letters 13, 3213 (2013) 54 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
55 Promises and Challenges Promises: Historically strong 1. Speed (<0.1ns) 2. Scalability (<5nm ) 3. Operation energy (<1pJ) 4. Non- volatility (>10years) Non- destructive reading 5. Non- destructive reading 6. Multilevel (analogue) 7. Stackability (infinite) 8. CMOS com patibility 9. Low cost 10. IEDM , 443 (2010) 55 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
56 Promises and Challenges Promises: Historically strong Pt/TaOx/Ta devices 1. Speed (<0.1ns) 2. Scalability (<5nm ) 3. Operation energy (<1pJ) 4. Non- volatility (>10years) Current (A) 5. Non- destructive reading Multilevel (analog) 6. Multilevel (analogue) 7. Stackability (infinite) Voltage (V) 8. CMOS com patibility 9. Low cost 10. Pt/TaOx/Ta devices 56 J. Joshua Yang MRS Fall 2014 RRAM Tutorial J. Joshua Yang et al., ACM JETC 9, 11 (2013)
57 Promises and Challenges Promises: Historically strong 1. Speed (<0.1ns) 2. Scalability (<5nm ) 3. Operation energy (<1pJ) 4. Non- volatility (>10years) 5. Non- destructive reading 6. Multilevel (analogue) Stackability (infinite) 7. Stackability (infinite) 8. CMOS com patibility 9. Low cost 10. PNAS 106, (2009) 57 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
58 Promises and Challenges Promises: Historically strong 1. Speed (<0.1ns) 2. Scalability (<5nm ) 3. Operation energy (<1pJ) 4. Non- volatility (>10years) 5. Non- destructive reading 6. Multilevel (analogue) CMOS com patibility 7. Stackability (infinite) Low cost 8. CMOS com patibility 9. Low cost 10. J. H. Nickel et al., Microelectronic Engineering 103, 66 (2013). Low temperature process No exotic materials and process Amorphous or poly-crystal materials Very simple structures 58 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
59 Resistive Random Access Memory (RRAM) 1. Introduction: stack, classifications 2. Applications: store information, process information 3. Mechanisms: electroforming, switching, modeling 4. Promises, Challenges and solutions: variance, selector, 3D stacking 5. Summary and Outlook 59 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
60 Promises and Challenges Promises: Historically Strong Challenges: To be improved 1. Speed (<0.1ns) 2. Scalability (<5nm ) 3. Operation energy (<1pJ) 4. Non- volatility (>10years) 5. Non- destructive reading 6. Multilevel (analogue) 7. Stackability (infinite) 8. CMOS com patibility 9. Low cost Variability : Cycle to cycle Dev ice to dev ice 2. Nonlinearity : What Why How Review: Metal oxide memories based on thermochemical and valence change mechanisms J. Joshua Yang et al., MRS Bulletin 37, 131 (2012) Review: Memristors in computing - promises and challenges J. Joshua Yang et al., ACM JETC, ACM JETC 9, 11 (2013) 60 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
61 Variability I: from switching cycle to cycle materials play an important role: (a) R (ohm) 10 4 Ti 1nm /Pt 100nm/TiOx 29nm/Ti 4 O 7 100nm 10 3 R OFF R ON switching cycles (b) R (ohm) 10 3 Ti 1nm /Pt 100nm/TaOx 12nm/Ta 100nm R OFF R ON switching cycles 61 J. Joshua Yang MRS Fall 2014 RRAM Tutorial TiOx TaOx
62 Variability I: from switching cycle to cycle Thermodynamic origin Pt Ta 2 O 5 Ta Conducting phase (Ta) Insulating phase ( Ta 2 O 5 ) Channel material and matrix material need to be thermally stable with each other! J. Joshua Yang et al., Applied Physics Letters 97, (2010). 62 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
63 Variability I: from switching cycle to cycle Thermodynamic origin TiO 2 Ti 4 O 7 Pt Pt Conducting phase (Ti 4 O 7 ) Insulating phase (TiO 2 ) J. Joshua Yang et al., Applied Physics Letters 97, (2010). 63 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
64 Material Selection Criteria Temperature (Me) Conduction channel liquid Me at. % MeO n Insulating matrix O 1) Two stable phases: conducting and insulating 2) Large solubility of oxygen Promising systems: Hf-O Zr-O Y-O Er-O Sc-O... J. Joshua Yang et al., Nature Nanotechnology 8, 13 (2013) 64 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
65 Other interesting systems O Zr Er O Hf-O Zr-O Y-O Er-O Sc-O... O Y O Sc J. Joshua Yang et al., Applied Physics Letters 97, (2010). 65 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
66 Variability III: from switching device to device Control the formation of filaments Thermal diffusion Approach Origin: different switching channels in different devices; Solution: plant similar seeds (nanoclusters) for switching channels in different devices J. Joshua Yang et al., Advanced Materials 22, 4034 (2010). Composite material approach 2.5 nm (Pt) 5nm 66 J. Joshua Yang MRS Fall 2014 RRAM Tutorial Choi, Torrezan, Norris, Miao, Strachan, Zhang, Ohlberg, Kobayashi, Yang*, and Williams, Nano Letters 13, (2013)
67 Promises and Challenges Promises: Historically Strong Challenges: To be improved 1. Speed (<0.1ns) 2. Scalability (<5nm ) 3. Operation energy (<1pJ) 4. Non- volatility (>10years) 5. Non- destructive reading 6. Multilevel (analogue) 7. Stackability (infinite) 8. CMOS com patibility 9. Low cost Variability : Cycle to cycle Dev ice to dev ice 2. Nonlinearity : What Why How Review: Metal oxide memories based on thermochemical and valence change mechanisms J. Joshua Yang et al., MRS Bulletin 37, 131 (2012) Review: Memristors in computing - promises and challenges J. Joshua Yang et al., ACM JETC, ACM JETC 9, 11 (2013) 67 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
68 Nonlinearity: What? Definition of nonlinearity k Current (a.u) I Vwr I Vwr/2 (large) Vwr/ Voltage (a.u.) Vwr K= I Vwr / I Vwr/2 = 2 (linear) 68 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
69 Nonlinearity: What? Definition of nonlinearity k Current (a.u) I Vwr I Vwr/2 (small) Vwr/2 Vwr Voltage (a.u.) Definition of Nonlinearity K= I Vwr / I Vwr/2 >> 2 (nonlinear) 69 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
70 Nonlinearity: Why? Cross bar challenges Current Sneak Paths V/2 v -V/2 70 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
71 Nonlinearity: Why? Cross bar challenges V/2 +V/2 V V/2 V/2 V/2 V/2 V/2 V/2 -V/2 71 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
72 Nonlinearity: Why? Cross bar challenges Current Sneak Paths V/2 -V/2 The smaller the better!! 72 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
73 Nonlinearity: Why? Cross bar challenges Current Sneak Paths V/2 V/2 V V/2 -V/2 V/2 Large sneak path current - Bad! 73 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
74 Nonlinearity: Why? Cross bar challenges Current Sneak Paths V/2 V/2 V V/2 -V/2 V/2 small sneak path current - Good! 74 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
75 Nonlinearity: Why? linear I-V observed in most devices TaO x single layer oxide: 50 nm 50 nm device Current (µa) Large I V/2 Current (µa) V/ Voltage (V) Voltage (V) J. Joshua Yang et al., Applied Physics Letters 100, (2012). 75 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
76 Nonlinearity: How? Strategy to increase the nonlinearity Current (ma) Linear Memristor Nonlinear Selector Nonlinear Memristor Voltage (V) Current (ma) Voltage (V) Current (ma) Voltage (V) selector? 76 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
77 Nonlinearity: How? Ideal selector (more demanding than RRAM) 1. High nonlinearity (10 6 for 1000 x 1000 array); 2. High endurance (switching for both read and write); 3. High speed (fast switching and very short retention); 4. High current density (enough for memory programming/erasing) 5. Low energy (better not relying on heating); 6. Low variability (better forming-free and non-filamentary); 7. Low temperature dependence of Resistance (better to be tunneling); 8. Low temperature process (3D integration).. (tunable threshold voltage etc..) S. Kim et al., IEEE TED 61, 2820 (2014) G. W. Burr et al., JVST B 32, (2014) 77 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
78 Nonlinearity: How? Classification of selectors 1. Electronic based selectors PNP/PN junctions: Si based or oxide based (IEDL 33, 1396; IEDM 31.7, 2011; IEDL 32, 1427; VLSI T ) Schottky or Tunnel barrier based: single/multi-layer or vacuum barrier (ACS Nano 6, 8166; IEDM ) High endurance, low energy, low Temp depend. of R, low variability! Current density? 2. Ionic based selectors: Ovonics threshold switch: AsGeTeSiN (IEDM 27.1, 2009; Nat. Comm. 4, 2629; JAP102, ) Insulator-Metal-Transition: NbO 2 (Adv Mater 23, 4063; Nanotechnol. 22, ; VLSI T ) High current density, high nonlinearity! High endurance, low energy, low Temp depend. of R, low variability? 3. Electronic Ionic Mixed selectors: MIEC (Mixed-Ionic-Electronic-Conduction) (VLSI, T5.4, 2012; VLSI T6.4, 2013;IEDM, 2.7, 2012.) High nonlinearity, high current density, low energy! High speed (relaxation time µs), low Temp depend. of R? 78 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
79 Nonlinearity: How? Triangular tunnel barrier Selector Low nonlinearity Normal tunnel barrier high nonlinearity Triangular tunnel barrier Appl. Phys. Lett. 73, 2137 (1998) Non-Pt electrode? Current density for smaller devices? 79 J. Joshua Yang MRS Fall 2014 RRAM Tutorial ACS Nano 6, 8166 (2012)
80 Nonlinearity: How? Insulator Metal Transition (IMT) materials TaO x (memristor) + Ti 2 O 3 (IMT) 50 nm 50 nm device 20 Small I V/2 V/2 Current (µa) Current (µa) Voltage (V) Voltage (V) 80 J. Joshua Yang MRS Fall 2014 RRAM Tutorial 10 2 Endurance, Low energy? J. Joshua Yang et al., Applied Physics Letters 100, (2012).
81 Nonlinearity: How? Mixed-Ionic-Electronic-Conductor Selector Fast relaxing (µs) between operations? Low Temp. dependence of R? 81 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
82 A caveat on the 1S+1R strategy Highly nonlinear selector + linear Memristor slightly nonlinear memory cell Selector nonlinearity=10 6 R+S cell nonlinearity=20 (courtesy of Dr. Rene Meyer) 82 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
83 Other concepts to reduce the sneak path currents: 1.1T1R 2.Complementary switches 3.Switch with Intrinsic diode J. Joshua Yang MRS Fall 2014 RRAM Tutorial
84 1T1R or 1TnR S. Shyh-Shyuan et al., VLSI Circuits, 82, (2009) 84 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
85 Complementary switches J. Joshua Yang et al., Advanced Materials, 21, 3754 (2009) 85 J. Joshua Yang MRS Fall 2014 RRAM Tutorial E. Linn et al., Nat. Mater. 9, 403 (2010).
86 Switches with an Intrinsic diode K. Kim et al., Nano Lett , (2012) J. Joshua Yang et al., Advanced Materials, 21, 3754 (2009) 86 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
87 Resistive Random Access Memory (RRAM) 1. Introduction: stack, classifications 2. Applications: store information, process information 3. Mechanisms: electroforming, switching, modeling 4. Promises, Challenges and solutions: variance, selector, 3D stacking 5. Summary and Outlook 87 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
88 3D architectures: design issue J.Y. Seok et al., Adv. Func. Mater. 24, 5316 (2014) 88 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
89 Major challenge: How to electrically address all memory cells? J.Y. Seok et al., Adv. Func. Mater. 24, 5316 (2014) Electrically address all cells by: 1) Sharing address channels 2) Increasing logical address dimensionality 89 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
90 Sharing address channels: Reducing interconnection lines Shared bit/word lines Word planes 90 J. Joshua Yang MRS Fall 2014 RRAM Tutorial J.Y. Seok et al., Adv. Func. Mater. 24, 5316 (2014)
91 Increasing logical address dimensionality: from 2D to 4D Area interface : much more area efficient Edge interface : less area efficient D. B. Strukov and R. S. Williams PNAS 106, (2009) (N x, N y ) define a cell (2N lines ~ N 2 ) 2D addressing 91 J. Joshua Yang MRS Fall 2014 RRAM Tutorial (N x, N y; N x, N y ) define a cell (4N lines ~ N 2 *N 2 =N 4 ) 4D addressing
92 Resistive Random Access Memory (RRAM) 1. Introduction: stack, classifications 2. Applications: store information, process information 3. Mechanisms: electroforming, switching, modeling 4. Promises, Challenges and solutions: variance, selector, 3D stacking 5. Summary and Outlook 92 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
93 Summary and Outlook: Research Objectives Research topics Short term medium term long term J. Joshua Yang et al., Nature Nanotechnology 8, 13 (2013) 93 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
94 Summary and Outlook: Roadmap W.G. Kim et al., SK-hynix J. Joshua Yang et al., HP Labs VLSI Technology Symposium (2014) DRAM Flash RAM Flash Solid State Disk Hard Disk Optical disk Floppy Disk Chip development Storage Class Memory Universal Memory Analog and Neural Computing Time 94 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
95 Acknowledgements: Max Zhang; John Paul Strachan; Matthew Pickett; Feng Miao; Kate Norris; Wei Yi; Douglas Ohlberg; Antonio Torrezan; Xuema Li; Warren Jackson; Dick Henze; Janice H. Nickel; Stan Williams 95 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
96 Q & A? Recruiting Postdocs & graduate students Contact Jianhua (Joshua) Yang, The Department of electrical & Computer Engineering The University of Massachusetts, Amherst 96 J. Joshua Yang MRS Fall 2014 RRAM Tutorial
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