Nanoimprint Lithography

Transcription

1 Nanoimprint Lithography Wei Wu Quantum Science Research Advanced Studies HP Labs, Hewlett-Packard

2 Outline Background Nanoimprint lithography Thermal based UV-based Applications based on nanofabrication Molecular memory and logic Single electron memory Patterned magnetic media Future work Summary April. 1,

3 ITRS Lithography Requirements 140 DRAM 1/2 Pitch (nm) Year Source: ITRS 2002 update April. 1,

4 Nano is Great but New frontier of science o Fundamental knowledge o Convergence of physics, chemistry and biology. Potential commercial impact DNA Carbon nanotubes Molecular electronics Technological challenge Lithography! April. 1,

5 Microprocessor A microprocessor (intel P4) April. 1,

6 Photolithography W = k λ N.A. Source: Britney Spears guide to Semiconductor physics April. 1,

7 Next generation lithography (NGL) tools: Extreme UV lithography (EUV) Extremely expensive (complex optical system, expensive and fragile mask) X-ray lithography Expensive light source (synchrotron preferred) Mask material E-beam direct write lithography (EBL) Extremely slow (serial process) E-beam projection lithography (EPL) Mask material Distortion due to heat April. 1,

8 Extreme Ultraviolet (EUV) Lithography Expensive Reflective mask and optics require < 2.5Å accuracy. Low efficiency (a few percent) of the light source. Small resist absorption length. Source: Lawrence Livermore National Lab April. 1,

9 Time for Using EBL to Write Gratings on 4 inch Wafer EBL I used in graduate school Resist: 950K PMMA Dose: 600µC/cm 2 Current: 4.5 pa Area: 4inch wafer with 50% duty cycle. ~40cm 2 Time = Dose Area Current = 2 600µ C / cm 40cm 4.5 pa S 158 years! April. 1,

10 Nanoimprint Lithography (NIL) 1. Imprint mold Press Mold resist substrate Remove Mold 2. Pattern Transfer RIE Chou, Krauss, and Renstrom, APL, Vol. 67, 3114 (1995); Science, Vol. 272, 85 (1996) April. 1,

11 Nanoimprint Lithography (NIL) High resolution -not limited by wavelength High throughput -parallel process Low cost 10 nm Chou, Krauss, and Renstrom, APL, Vol. 67, 3114 (1995); Science, Vol. 272, 85 (1996) April. 1,

12 Step & Flash Imprint UV curable process Room temperature Low pressure UV polymer is applied by droping M. Colburn, A. Grot, G. Wilson s et al SPIE 2000 April. 1,

13 UV-curable NIL with Double-layer Spin-on Resist 1. Prepare substrate, spin under layer and liquid resist on 4. Mold and substrate separation 2. Alignment UV 5. Residue layer and under layer etching 3. Press and exposure 6. Metal evaporation and lift-off W. Wu, H. Ge, S.Y. Chou et al., EIPBN 2004 April. 1,

14 NIL is on ITRS (international technology roadmap for semiconductors) * ITRS 2003 update April. 1,

15 Major Players Princeton University ---- Nanonex, NanoOpto University of Taxes at Austin ---- Molecular Imprints University of Michigan Hewlett-Packard Motorola Micro resist Europe: Aachen University. Lund University Obducat, EVG, SUSS Japan: Hitachi April. 1,

16 Nano-circuit Crossbar Architecture Electrodes Molecule Y. Chen, G.Y. Jung et al., Nanotech. 14, 462 (2003) April. 1,

17 64 bits Cross-bar Memory at 60 nm Half-pitch by Thermal Nanoimprint Lithography R (10 9 ohm) A-H 2A-H 3A-H 4A-H 5A-H 6A-H 7A-H 8A-H First working circuit fabricated using NIL First working Molecular memory circuit H P i n v e n t Y. Chen, G.Y. Jung et al., Nanotech. 14, 462 (2003) April. 1,

18 Schematic of Single Electron Memory Poly Si Control Gate Drain Injection Channel Store e 2 /C dot Source Buried Oxide Floating Dot Gate Floating gate E = e 2 Coulomb blockade E >> kt Substrate C dot Higher operation temperature requires larger energy gap, implying smaller dot size. Sub-10 nm dot size is required for room temperature operation. W. Wu, J. Gu, H. X. Ge, et al., Applied Physics Letters 83, 2268 (2003). April. 1,

19 Room Temperature Si Single Electron Memory Fabricated by NIL 1E-9 V =50 mv ds Original 30nm I ds (A) 1E-10 7 V, 1 µs 9 V, 1 µs 1E-11 V =22 mv th t =13.6 nm thermal + ox 33.1 nm PECVD 1E V (V) g Imprinted channel Before oxidation I d vs. V g W. Wu, J. Gu, H. X. Ge, et al., Applied Physics Letters 83, 2268 (2003). April. 1,

20 Single Electron Memory at Room Temperature Threshold vs. Pulse Voltage Pulse duration 1 µs *same result for 1 ms pulse V t (V) Control Gate Voltage (V) W. Wu, J. Gu, H. X. Ge, et al., Applied Physics Letters 83, 2268 (2003). April. 1,

21 Threshold Shift Independent of Charging Time 40 Threshold shift (V) V ctrl = 7 V Pulse width (Sec) W. Wu, J. Gu, H. X. Ge, et al., Applied Physics Letters 83, 2268 (2003). April. 1,

22 Density Limit of Continuous Thin Film Magnetic Media 1. Each grain has to be large enough to be thermally stable (superparamagnetism). 2. Transition noise of each bit Answer: Patterned magnetic media April. 1,

23 Quantized Magnetic Disk Several orders higher density limit than continuous thin film. Nonmagnetic Each bit is a single domain. Week coupling between each bit. Magnetic S N N S S N Nano-lithography needed. N S S N Substrate Chou, Wei, Krauss and Fischer, JAP, 76(10), 6673 (1994) April. 1, 2005

24 18 Gbits/in 2 Large Area Quantized Magnetic Disk April. 1, 2005 W. Wu, B. Cui, X. Sun, W. Zhang, L. Zhuang, L. Kong, and S. Chou, JVSTB, Vol 16, Iss 6, 3825 (1998)

25 MFM Image of 18 Gbits/in 2 Large Area Quantized Magnetic Disk (After Polishing) Every bit is a single domain. April. 1, 2005 W. Wu, B. Cui, X. Sun, W. Zhang, L. Zhuang, L. Kong, and S. Chou, JVSTB, Vol 16, Iss 6, 3825 (1998)

26 30 Gbits/in 2 Co Longitudinal Quantized Magnetic Disk 25 nm SEM MFM April. 1, 2005 W. Wu, B. Cui, X. Sun, W. Zhang, L. Zhuang, L. Kong, and S. Chou, JVSTB, Vol 16, Iss 6, 3825 (1998)

27 Future Work: Challenges of NIL: Yield It is easier to have defects, because it is a contact lithography Alignment accuracy is currently 10x worse than resolution Alignment must be achieved without high cost April. 1,

28 Summary Nanoimprint lithography is: High throughput High resolution Low cost Capable of making real applications More need to be done. April. 1,

29 April. 1,