A Power, JTAG, LEDs FPGA_TCK FPGA_TDO FPGA_TMS FPGA_TRST FPGA_TDI nanofip_misc.sch

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1 opyright ERN. This documentation describes Open Hardware and is licensed under the ERN OHL v... You may redistribute and modify this under the terms of the ERN OHL v... ( This documentation is distributed NY EXPRESS OR IMPLIE WRRNTY, INLUING OF MERHNTILITY, STISFTORY N FITNESS FOR PRTIULR PURPOSE. Please see the ERN OHL v.. for applicable conditions. FM fmc.sch nanofip settings settings.sch FPG_TK FPG_TO FPG_TMS FPG_TRST FPG_TI NOSTT VR_RY VR_ VR_RY VR_ VR_RY VR_ U_ER U_PER R_FSER T_I[..] T_O[..] WLK_I R_I[..] ST_I K_O Y_I NF_J_TK NF_J_TMS NF_J_TI NF_J_TO GPIO[..] P_LGTH[..] P_LGTH[..] SUS[..] _I[..] M_I[..] S_I S_I T_I[..] T_O[..] R_I[..] GPIO[..] P_LGTH[..] SUS[..] _I[..] M_I[..] Power, JTG, LEs FPG_TK FPG_TO FPG_TMS FPG_TRST FPG_TI LE_W nanofip_misc.sch nanofip NOSTT VR_RY VR_ VR_RY VR_ VR_RY VR_ U_ER U_PER R_FSER T_I[..] T_O[..] WLK_I R_I[..] ST_I K_O Y_I J_TK J_TMS J_TI J_TO GPIO[..] P_LGTH[..] SUS[..] _I[..] M_I[..] S_I S_I nanofip.sch LE_F F_TX F_TXEN F_TXK F_TXER F_RX F_N F_WGN F_RSTN RTE RTE Power supply esigner M.Suminski rawn by M.Suminski (//) heck.by Last Mod. M.Suminski (//) ERN Sheet: / File: fmc-nanofip.sch Title: FM-nanoFIP Size: ate: -- Kiad E... kicad (-- revision c)-master Fieldbus F_TX F_TXEN F_TXK F_TXER F_RX F_N F_WGN F_RSTN RTE RTE F_N_V fieldbus.sch V FM -> V V FM -> V power.sch Fiducials FTG FTG FTG FTG FTG FTG Screw holes for mounting the mezzanine to the carrier Rev: Id: /

2 opyright ERN. This documentation describes Open Hardware and is licensed under the ERN OHL v... You may redistribute and modify this under the terms of the ERN OHL v... ( This documentation is distributed NY EXPRESS OR IMPLIE WRRNTY, INLUING OF MERHNTILITY, STISFTORY N FITNESS FOR PRTIULR PURPOSE. Please see the ERN OHL v.. for applicable conditions. Pin swapping not possible (only GPIO pins can be moved anywhere else) nanofip FPG (I) is preprogrammed T_O[..] I P-PQGI NK G/IORS G/IORS G/IORS G/IORS G/IORS G/IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS G/IORS G/IORS G/IORS G/IORS G/IORS G/IORS T_I T_I T_I T_I T_I T_I T_I T_I T_I T_I T_I T_I T_I T_I T_I T_I _I _I _I _I M_I M_I M_I M_I P_LGTH P_LGTH P_LGTH SUS SUS SUS NOSTT T_I[..] _I[..] S_I S_I M_I[..] P_LGTH[..] I P-PQGI NK ION G/IOP ION G/IOP ION G/IOP ION IOP ION IOP IORS ION IOP G/ION G/IOP G/ION G/IOP G/ION G/IOP G/IOPS G/IOPS ION G/IOP IORS ION IOP IOV IOU G/IOV G/IOU G/IOV G/IOU G/IOV G/IOU SUS SUS SUS SUS SUS LK_M F_TX F_TXK F_RX F_TXER F_N F_TXEN F_WGN F_RSTN RTE RTE I P-PQGI NK G/IORS G/IORS G/IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS IORS GE/IORS GE/IORS GE/IORS VR_RY VR_ VR_RY R_FSER VR_ VR_RY VR_ U_PER U_ER K_O ST_I Y_I T_O T_O T_O T_O (no T_O*) T_O T_O T_O T_O T_O T_O T_O T_O T_O T_O I P-PQGI NK GE/ION GE/IOP GE/ION GE/IOP GE/ION GE/IOP ION IOP ION IOP IOPS ION GF/IOP ION GF/IOP ION GF/IOP GF/IONP GF/IOPP GF/ION GF/IOP GF/ION GF/IOP ION IOP ION IOP ION IOP IOV IOU IOV IOU IOV G/IOU IOV G/IOU IOV G/IOU T_O T_O J_TO J_TMS J_TI J_TK WLK_I R_I R_I R_I R_I (no R_I*) R_I R_I R_I R_I R_I R_I GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO[..] power-on reset R k SUS[..] R_I[..] +Vs E OS MHz OUT esigner M.Suminski rawn by M.Suminski (//) heck.by Last Mod. M.Suminski (//) ERN Sheet: /nanofip/ File: nanofip.sch Title: FM-nanoFIP FPG Size: ate: -- Kiad E... kicad (-- revision c)-master Rev: Id: /

3 opyright ERN. This documentation describes Open Hardware and is licensed under the ERN OHL v... You may redistribute and modify this under the terms of the ERN OHL v... ( This documentation is distributed NY EXPRESS OR IMPLIE WRRNTY, INLUING OF MERHNTILITY, STISFTORY N FITNESS FOR PRTIULR PURPOSE. Please see the ERN OHL v.. for applicable conditions. J FPG_TK FPG_TO FPG_TMS FPG_TRST FPG_TI TK TO TMS TRST TI P JTG pf PV R R G PV S T SSLTG R R P provides pull-ups for JTG pins k R R k W TI TO TK TMS TRST IE P-PQGI jumper disables JTG (mounted by default) NOTE: place close to the FPG pin, on the side with the FM connector PV x nf (for each V pin) + x common uf uf IF P-PQGI VMV VMV VI VI VI VMV VI VI VMV VMV VI VI VI VMV VI VI V V V V V V V VPLF VOMPLF VJTG VPUMP PV PE user guide suggests grounding unused PLL power pins (VPLx) LE_F active low T - Green OT L x nf (for each V* and VMV* pin) + x common uf one-shot triggers to extend LE pulse duration uf LE_W active high pf T R R G Red S TOP R L T ST IG P-PQGI Q Q Q Q IH P-PQGI N N N N N esigner M.Suminski rawn by M.Suminski (//) heck.by Last Mod. M.Suminski (//) ERN Sheet: /Power, JTG, LEs/ File: nanofip_misc.sch Title: FM-nanoFIP JTG, power, LEs Size: ate: -- Kiad E... kicad (-- revision c)-master Rev: Id: /

4 opyright ERN. This documentation describes Open Hardware and is licensed under the ERN OHL v... You may redistribute and modify this under the terms of the ERN OHL v... ( This documentation is distributed NY EXPRESS OR IMPLIE WRRNTY, INLUING OF MERHNTILITY, STISFTORY N FITNESS FOR PRTIULR PURPOSE. Please see the ERN OHL v.. for applicable conditions. PV TP uf nf Vout = (R / R + ) * Vfb = (k / k + ) *. =. V IN EN N EP I NR/SS OUT F TPSR nf TP R k R k uf PV Vout = (R / R + ) * Vfb = (k / k + ) *. =. V TP uf nf IN EN N EP I NR/SS OUT F TPSR nf TP R k R k uf PV esigner M.Suminski rawn by M.Suminski (//) heck.by Last Mod. M.Suminski (//) ERN Sheet: /Power supply/ File: power.sch Title: FM-nanoFIP power supply Size: ate: -- Kiad E... kicad (-- revision c)-master Rev: Id: /

5 opyright ERN. This documentation describes Open Hardware and is licensed under the ERN OHL v... You may redistribute and modify this under the terms of the ERN OHL v... ( This documentation is distributed NY EXPRESS OR IMPLIE WRRNTY, INLUING OF MERHNTILITY, STISFTORY N FITNESS FOR PRTIULR PURPOSE. Please see the ERN OHL v.. for applicable conditions. S_I S_I place dip-switches on the side without the FM connector SUS[..] R R R R R R R R SW _I _I _I SW SUS SUS SUS SUS SUS SUS SUS SUS _I M_I M_I M_I M_I R R R R R R R R Station address (default xff) place dip-switches on the side without the FM connector SW SW _I[..] M_I[..] R R R P_LGTH P_LGTH P_LGTH Produced variable data length (FM signals can override the default value) P_LGTH[:]: : bytes : bytes : bytes : bytes : bytes (default) : bytes other: reserved onstructor & Model I (default x) _I[i]/M_I[i] connected to: Gnd S_I S_I Vcc onstructor/model[*i] onstructor/model[*i+] R R R P_LGTH[..] esigner M.Suminski rawn by M.Suminski (//) heck.by Last Mod. M.Suminski (//) ERN Sheet: /nanofip settings/ File: settings.sch Title: FM-nanoFIP settings Size: ate: -- Kiad E... kicad (-- revision c)-master Rev: Id: /

6 opyright ERN. This documentation describes Open Hardware and is licensed under the ERN OHL v... You may redistribute and modify this under the terms of the ERN OHL v... ( This documentation is distributed NY EXPRESS OR IMPLIE WRRNTY, INLUING OF MERHNTILITY, STISFTORY N FITNESS FOR PRTIULR PURPOSE. Please see the ERN OHL v.. for applicable conditions. marking resistor,, R R R R R R TR R.k M.uF nf nf nf ZV-V TS ZV-V R R k k FIELTR.S nanofip bus speed nf.nf pf pf ZV-V V ZV-V R R R k k FIELTR S selected variant R.M.nF pf pf ZV-V V ZV-V R R k k FIELTR.S M.nF pf pf ZV-V V ZV-V R R k k FIELTR S R NOTE: place a label indicating bus speed next to the marking resistors F_WGN F_TXER F_TXEN F_N F_RX TTL to LVTTL level conversion R k R R R uf R TP F_RSTN PV R R R R reset until FPG changes the output state R R k k F_TX NOTE: in other designs it is uf R F_TXK F_RSENS PV TP TP F_N_V k k R F_VREF WGn TXER TXEN TX KER n RX TXK RESETn TS TS VREF RSENS V V I SSS L Hn n Ln RX FLOUT H FLIN PRERXIN RXIN VEE VEE R R F_RX F_FLIN F_FLOUT F_PRERXIN F_RXIN nf pf.nf nf R pf V V V V V V ZV-V, ZV-V, NOTE: FieldTR has to be placed inside the carrier board cutout area V V n Sec TR Prim R Rn FIELTRS NOTE: FIP_R_P and FIP_R_N belong to a diff pair W nf W FIP_R_P FIP_R_N NOTE: This pin header has to be placed outside the carrier board cutout area J -Sub M PV us speed encoding RTE[:]: :.k : M :.M : M RTE RTE R k R k R k R k uf uf esigner M.Suminski rawn by M.Suminski (//) heck.by Last Mod. M.Suminski (//) ERN Sheet: /Fieldbus/ File: fieldbus.sch Title: FM-nanoFIP fieldbus interface Size: ate: -- Kiad E... kicad (-- revision c)-master Rev: Id: /

7 opyright ERN. This documentation describes Open Hardware and is licensed under the ERN OHL v... You may redistribute and modify this under the terms of the ERN OHL v... ( This documentation is distributed NY EXPRESS OR IMPLIE WRRNTY, INLUING OF MERHNTILITY, STISFTORY N FITNESS FOR PRTIULR PURPOSE. Please see the ERN OHL v.. for applicable conditions. NOTE: pin swapping between L* pins possible Place test points and pin headers on the side without the FM connector GPIO[..] IMPORTNT: te that all GPIO pins are connected to *M signals (one direction by FM standard) T_O[..] U_ER U_PER R_FSER h h h GPIO h GPIO h h T_O h T_O h h T_O h T_O h h T_O h T_O h h T_O h T_O h h T_O h T_O h h T_O h T_O h h T_O h T_O h h T_O h T_O h h h h h h h h h h h h J VREF M PRSNT_M_L LK_M_P LK_M_N L_P L_N L_P L_N L_P L_N L_P L_N L_P L_N L_P L_N L_P L_N L_P L_N L_P L_N L_P L_N L_P L_N VJ (not used) T_I[..] VR_RY VR_RY VR_RY VR_ VR_ VR_ PWR_FLG GPIO GPIO T_I T_I g g g g g g g g g g T_I T_I g T_I g T_I g g T_I g T_I g g T_I g T_I g g T_I g T_I g g T_I g T_I g g T_I g T_I g g TP g TP g g TP g TP g g TP g TP g g g g J LK_M_P LK_M_N L_P_ L_N_ L_P L_N L_P L_N L_P L_N L_P L_N L_P L_N L_P L_N L_P L_N L_P L_N L_P L_N L_P L_N VJ (not used) R_I[..] NOSTT FPG_TK PWR_FLG FPG_TI FPG_TO _UX FPG_TMS FPG_TRST PWR_FLG d d d GPIO d GPIO d d d R_I d R_I d d R_I d R_I d d R_I d R_I d d R_I d R_I d d R_I d R_I d d d d d P_LGTH d P_LGTH d d d d d d d d G d d d d d d J PG_M GTLK_M_P GTLK_M_N L_P_ L_N_ L_P L_N L_P L_N L_P L_N L_P_ L_N_ L_P L_N L_P L_N WLK_I ST_I K_O Y_I NF_J_TMS NF_J* is nanofip JTG controller NF_J_TK NF_J_TI NF_J_TO PWR_FLG PV PV c c P_LGTH c c c GPIO c GPIO c c c c TP c c c TP c c c c TP c c c c ONE_WIRE c c c c c c c c SL c S c c c G c c c c c c c J P_M_P P_M_N P_M_P P_M_N L_P L_N L_P L_N L_P L_N L_P_ L_N_ L_P L_N H G P_LGTH[..] (not radiation tolerant) R k ONE_WIRE V Q I SU+ (not radiation tolerant) _UX S SL G G S SL WP V I EP VSS T-I/M esigner M.Suminski rawn by M.Suminski (//) heck.by Last Mod. M.Suminski (//) ERN Sheet: /FM/ File: fmc.sch Title: FM-nanoFIP FM connector (LP) Size: ate: -- Kiad E... kicad (-- revision c)-master Rev: Id: /