P300. Technical Manual

Transcription

1 + I/Os, solenoid drivers Technical Manual icasso venue, avis, C, US Tel: -- Fax:

2 COYRIHT, i-engine, -Engine, R-Engine and CTF are trademarks of TERN, Inc. mes and mes are trademarks of dvanced Micro evices, Inc. IntelEX and IntelSX are trademarks of Intel Corporation. aradigm C/C++ is a trademark of aradigm Systems. Microsoft, MS-OS, Windows//NT/ME/X are trademarks of Microsoft Corporation. Version. October, No part of this document may be copied or reproduced in any form or by any means without the prior written consent of TERN, Inc. - icasso venue, avis, C, US Tel: -- Fax: -- sales@tern.com Important Notice TERN is developing complex, high technology integration systems. These systems are integrated with software and hardware that are not % defect free. TERN products are not designed, intended, authorized, or warranted to be suitable for use in life-support applications, devices, or systems, or in other critical applications. TERN and the Buyer agree that TERN will not be liable for incidental or consequential damages arising from the use of TERN products. It is the Buyer's responsibility to protect life and property against incidental failure. TERN reserves the right to make changes and improvements to its products without providing notice.

3 Chapter : Introduction Chapter : Introduction. Functional escription Measuring. x. x. inches, the offers a large I/O expansion to any TERN Engine board (-Engine, -Engine, i-engine and R-Engine). The versatility of the allows the use of TTL-level I/O, high voltage input and solenoid driving output plus LC and keypad support. The is the perfect expansion board for applications where high speed and low cost are a concern. The is designed for industrial control applications which require solenoid drivers and protected highvoltage inputs. There are high-voltage I/O lines on the that can be configured as high voltage inputs or solenoid driving outputs. The inputs handle up to V C. The outputs are capable of sinking m at V per line, and they can directly drive solenoids, relays, or lights. The high voltage chips may also be replaced with resistor pack ICs to provide digital TTL I/O to the user. / Bus TTL I/O (C) TERN Host Microcontroller (E, E, ie, RE) / Bus chip select U ecoder (HC) S-S U,U,U,U, U,U,U High Voltage I/O Expansion Controller S / Bus U ecoder (HC) S-S S / Bus / Bus TTL I/O (C) U, U, U TTL I/O (C) U LC and eypad Interface Figure. Functional block diagram of the -

4 Chapter : Introduction. Features Standard Features imensions:. x. x. inches ower input: +V to + V unregulated C (up to +V with optional switching regulator ) Temperature: - C to + C On-board +V switching power supply On-board RS/ serial drivers I/O pins supporting digital, high voltage, LC/keypad interfacing. hysical escription The physical layout of the is shown in Figure.. T T T SER SER J ower Jack U U U U U U U U U U U J T T T Figure. hysical layout of the The physical layout/description of the is shown above. Labels for pin headers are located nearest pin of the respective header (also applies to the J and J expansion sockets). T -

5 Chapter : Introduction Each C I chip is label by location and a letter which corresponds to a specific I/O address found in the p.h header file (of the TERN host controller directory). For example, if the -Engine is being used as the host controller, see tern\\include\p.h, and if using the i-engine, see tern\\include\p.h. The table below will summarize the name of each C I chip. Location U U U U U U U U U U U Name B E F H I L M N R To find the I/O address for the U I chip, for example, open the appropriate header based on the host controller. If using the -Engine, open tern\\include\p.h. Each I chip will have its own define statement based on its letter name. For U, look for the #define I xb statement.. Minimum Requirements for System evelopment.. Minimum Hardware Requirements C or C-compatible computer with serial COMx port that supports, baud TERN Engine controller (E/E/iE/RE). See appropriate technical manual. ebug serial cable (RS; B connector for C COM port and IE x connector for controller) Center negative wall transformer (+V m).. Minimum Software Requirements TERN EV-/V- it C-ROM C software environment: Windows///ME/NT/X The C/C++ Evaluation it (EV-) and C/C++ evelopment it (V-) are available from TERN. The EV- it is a limited-functionality version of the V- it. With the EV- it, the user can download and remote debug an application (STE ), as well as perform standalone field tests with the application residing in the battery-backed SRM of the host controller (STE ). However, the V- it is required to generate application binary and HEX files for a final production version (STE ). -

6 Chapter : Installation Chapter : Installation. Software Installation The technical manual for the host controller will provide details about the software installation for evaluation of TERN controllers.. Hardware Installation Hardware installation for the consists of installing the host controller onto the and connecting the to power and the C for remote debugging. Overview Install the host controller onto the. Connect debug serial cable: For debugging (STE ), place IE connector on SER (J pin header on the ) with red edge of cable at pin. Connect wall transformer: Connect V wall transformer to power and plug into power jack.. Installing the host controller onto the Each host controller will install onto the in the same manner. ll that is necessary is to align the J and J pin headers on the host controller with the J and J expansion sockets on the. See the diagram below for illustrated details... Connecting the to the C The diagram below shows the link between the C and the. It consists of connecting the debug serial cable to the C and the SER pin header of the. It is important to note the red edge of the x IE connector must align with IN of the SER pin header. SER is located at J on the... owering-on the & host controller The TERN EV- and V- its include a +V C power transformer. lug the output of the transformer into the C power jack on the. Refer to the following diagram. Upon power-up, the on-board LE of the host controller should blink twice and remain on to indicate ready for remote debugging. -

7 Chapter : Installation J (SER) Red edge of cable aligns with pin. J. of -Engine aligns with J. of Output of transformer plugs into C power jack. J. of -Engine aligns with J. of -Engine installed onto the ; connected to C via serial debug cable and output of transformer. -

8 Chapter : Hardware Chapter : Hardware. Engine controllers The must be driven by an Engine controller, such as the -Engine, -Engine, i-engine, or R-Engine. The Engine installs on top of the via the x pin headers J and J, and can be secured by two #- mounting screws. See Chapter for full installation details.. Serial orts rivers The can provide up to channels RS-/ drivers. Two RS- drivers are installed to interface the two asynchronous serial channels from the installed Engine controller via x pin header J and J. In addition, the Engine controller can support an additional URT. The can be configured to interface the additional URT with an RS- or RS- driver. The default debug serial port, SER, is routed to J, SER is at J, and the SCC port is at J. art specifications for the serial port drivers can be found in the tern_docs\parts directory of the TERN installation C (max.pdf and snlbc.pdf).. I/O Mapped evices.. I/O Space External I/O devices use I/O mapping for access. You can access such I/O devices with inportb(port) or outportb(port,dat). These functions will transfer one byte of data to/from the specified I/O address. Each I (ca) device is identified by a letter. Each letter then corresponds to its matching I/O address, which can be found in p.h of the host controller s directory. Chapter of this manual gives a table and diagram for identifying each... rogrammable eripheral Interface (C) The I (C, or ul) is a low-power CMOS programmable parallel interface unit for use in microcomputer systems. They each provide TTL level I/O pins that may be individually programmed in two groups of and used in three major modes of operation. Eleven are installed on the for a total of I/Os. They are found in locations U, U, U, U, U, U, U, U, U, U, and U. In MOE, two groups of pins can be programmed in sets of and pins to be inputs or outputs. In MOE, each of the two groups of pins can be programmed to have lines of input or output. Of the remaining pins, are used for handshaking and interrupt control signals. MOE is a strobed bi-directional bus configuration. -

9 Chapter : Hardware ROU ort (L ow er) Output Input ort Mode Output Input Mode Mode ROU ort (U pper) Output Input ort Mode X Output Input M ode M ode M ode Figure. Mode Select Command Word Command Select Bit manip ulation M ode Select To program the I, determine the necessary command word based on chart above. This value must be written to the I s command register. For an example, consider the I at location U. The maps U, the IUB C/u, at base I/O address IUB = x??. The?? address will vary based on host controller. Here, the registers will map as follows: Command Register = IUB+ ort = IUB ort = IUB+ ort = IUB+ Two possible configurations will be shown. () Set all ports to output mode (Mode ) outportb(iub+,x); The output pins can then be driven by writing to each port: outportb(iub+,x); outportb(iub+,x); outportb(iub+,x); () Set all ports to input mode: outportb(iub+,xf); -

10 Chapter : Hardware The input ports can be read using one inport statement per port: inportb(iub+); /* ort */ inportb(iub+); /* ort */ inportb(iub+); /* ort */ This returns an -bit value for each port, with each bit corresponding to the appropriate line on the port. There are a total of x TTL level I/O pins, all free for applications use. These I/O lines are specified as m driving current capability. The I at location U is located near the center of the. Its I/Os are routed directly to headers T and T. Each port is pulled-up via resistor for easy implementation of an LC/keypad interface. (Refer to sample code p_kp.c) Refer to the schematics at the end of this manual (or tern_docs\schs) for additional pin location details. The data sheet for the C can be found in the tern_docs\parts directory under ca.pdf.. High-Voltage, High-Current rivers The ULN has high voltage, high current arlington transistor arrays, consisting of silicon NN arlington pairs on a common monolithic substrate. ll channels feature open-collector outputs for sinking m at V, and integral protection diodes for driving inductive loads. eak inrush currents of up to m sinking are allowed. These outputs may be paralleled to achieve high-load capability, although each driver has a maximum continuous collector current rating of m at V. The maximum power dissipation allowed is. W per chip at degree C. The common substrate,, is routed to. ll currents sinking in must return to. heavy gage () wire must be used to connect to an external common ground return. connects to the protection diodes in the ULN chips and should be tied to highest voltage in the external load system. can be connected to an unregulated on board +V. ULN is a sinking driver not sourcing driver. Typical application wiring is shown below. O Solenoid +V ower Supply /SUB ULN /SUB +V Figure. rive inductive load with high voltage/current drives. The uses ULN devices, providing one high voltage channel per TTL level I/O. By default all channels are high voltage output. Other possible configurations include replacing the ULNs with IC resistor packs for TTL level I/O. See the ULN data sheet, ulna.pdf, found in the tern_docs\parts directory on the TERN installation C for additional details. -

11 U C U C U C U U /WR /WR ST C B B B B B B I B B B B B B B C N N S C B B B B B /WR /WR ST C E E E E E E I E E E E E E E C N N S C E E E E E /WR /WR ST C F /WR /WR ST C F F F I F F I F F F F F F F F F F / F F C C N N N N S C S C /WR /WR ST C H H H H H H I H H H H H H H H H H C H H N N S C S B B B B B B S E E E E E E S F F F F F F S S H H H H H H B B B B B B B U B B B B B B B C C C C C C C ULN V V V V V V V B B B B B B B U B B B B B B B C C C C C C C ULN V V V V V V B B B B B B B V U B B B B B B B C C C C C C C ULN V B V B V V V V V B E E E H U B B B B B B B C C C C C C C ULN V V V V V V V E E E E E E E U B B B B B B B C C C C C C C ULN V V V V V V V E E E E E E E U B B B B B B B C C C C C C C ULN E U V V V E B C V B C V E B C B C V V E B C V V E V V E V E B C B C V V ULN H H H H H H H U B B B B B B B C C C C C C C ULN V V V V V V V H H H H H H H U B B B B B B B C C C C C C C ULN V V V V V V V U F B V F F C V F B C F B C B C V F F B C V F F B C V F F F B C V F V F RX MO TX VLC / C ULN E /CS IE /CS U RO /RE E I /CTS /SIO /RX /RX R U B B B B B B B C C C C C C C V V V V V V F F F F F F F V U B B B B B B B C C C C C C C ULN V F V F V V V V V F H U B B B B B B B C C C C C C C ULN V T V V V HR V V V V V V V U B B B B B B B C C C C C C C ULN V T V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V HR V V V V V V V U B B B B B B B T C C C C C C C ULN V V V V V V V V V V V V V V V V V V HR U V B V V C V B C V B C B C V V B C V V B C V V V B C V V ULN H H H H H H H Title LTC HRS +V N LM U V OU V IN LX T I /TX N F B O FF / ON B R R uh RCH ULN H /TX /RX /SIO +V R M VOFF /TX S / B C B J HR C /TX /RX U HC B B C U B Y Y Y Y Y Y Y Y HC B Y Y Y Y Y Y Y Y J J S S S S S S S S S S S S /TX /RX C C B J- BEE V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V. V V H S S S S S S / /SIO /WR V V V V V V V V V V V V V V V V V V V V V V /TX /RX H /TX /RX C+ C C+ V+ C- C+ C- V- TO RI C- C+ C C- BT +VI J N +V /TX /RX C J H S S S S S S / /SIO /WR /RT +VI T T /RT U C+ V+ C- C+ C- V- MX V+ TO RI RO TI TI RO C C C J HR V- /TX /RX RX TX TX RX / U B B B B B B B C C C C C C C ULN V V V V V V V J MO /CTS RX TX /INT TX RX /RTS VOFF TX /RTS RX / /CTS /INT /INT MI /WR /WR /INT /NMI /INT C HR J HR MSS I/O EXNSION Size ocument Number REV B.SCH ate: November, Sheet of

12 U U U U U /WR I I I I I I I I C S /WR R ST / C S N I N C N C I V I I I U I B C V I I V I I B C V I B C I B C B C V I I B C V I I V I I B C V I ULN U L V L L B C B V L L C V L B C L B C B C V L L B C V L L L B C V L V L / / /WR /WR S S S S S S S S S S S S H H V /SIO ULN RN V /SIO R R R R R R R I I T R R R R R R R R R R HRS RN HR T B B B B B B B I I I I I I I I I I C /WR /WR ST C I C N N S C V V V S I I I B B B B B B B V V V I I I C B B B B B B B /WR /WR ST C L /WR /WR ST C M L L M M L I L M M L I L M M L L M M L L M L L M L L M L / L M L C C N N N N S C S C S S L V V V L L L L L B B B B B B B V V V B B B B B B B M V V V M M M M M U C C C C C C C ULN B B B B B B B V V V V V V V I I I I L L L U C C C C C C C ULN U C C C C C C C ULN U C C C C C C C ULN U C C C C C C C ULN R R R R R R R V V V V V V V V V V V V V V V V V V V V V V V V L L L L T HR U B B B B B B B C C C C C C C ULN V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V N L L L M M M N T HR U B B B B B B B C C C C C C C ULN V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V T HR M M M M M M M U B B B B B B B C C C C C C C ULN V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V /WR R R R R R R R R /WR M M M M M M M U C C C C C C C ULN U B B B B B B B C C C C C C C ULN V V V V V V V V V V V M M M M M M M N N N N N N S R ST / C S N N C N C I V R R R R U R R R R R R R R R R RN N RN R R R R R Title M M M M M U B B B B B B B /WR /WR ST C N N N N N N I N N N N N N N N N N C N N N N S C C C C C C C C ULN U B B B B B B B C C C C C C C ULN U B B B B B B B C C C C C C C S V V V V V V V V V V V V V V V V V V V V V ULN RN R R R R R R RN STE/TERN. Is Size ocument Number REV B. ate: November, Sheet of N R R R R R R R R R N N N N N U N B C V N V N B C V B C N B C B C V N B C V N V N B C V ULN U N V N B C B V N C B V C N B C B C V N B C V N N B C V V ULN U N H B C V V B C B C B C B C B C B C M M M M M ULN RN M M M M M M R R RN N N N N N N N M RN RN RN /SIO I I I I I I I I I RN I I I I I I I I I I I I I I I RN RN L L L L L L L L RN L L L L L L L L L RN N N N N N N N N R RN R R R N N N N N N N N N RN L L L L L L L M M / M M M M M M M M M M