LATEST INSIGHTS IN MATERIAL AND PROCESS TECHNOLOGIES FOR INTERPOSER AND 3D STACKING
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1 LATEST INSIGHTS IN MATERIAL AND PROCESS TECHNOLOGIES FOR INTERPOSER AND 3D STACKING European 3D TSV Summit, January 22-23, 2013, Grenoble Dr. Rainer Knippelmeyer, CTO and VP of R&D, GM Product Line Bonder
2 SUSS PRODUCTS & SEGMENTS Segments Photomask Equipment Lithography Substrate Bonder Products MaskTrack Pro Exposure Systems Coater/Developer Wafer Bonder Frontend Backend Process Steps Photomask Cleaning Stepper, Scanner (UV projection) Laser Ablation Mask Aligner (proximity exposure) Nano Imprinting Coating Developing Bond Alignment Permanent Bonding Temporary Bonding Markets Mask Manufacturing Advanced Packaging 3D Integration MEMS LED 2
3 CONCENTRATE ON THIN WAFER HANDLING FOR 3DIC & INTERPOSERS Device Manufacturing TSV Processing Temp Bonding Thinning Post Processing Temp Debonding Stacking C2C C2W W2W Thin Wafer Handling 3
4 WHAT IS THE STATUS OF ROOM TEMPERATURE DEBONDING PROCESSES & MATERIALS? Initial R&D Line R&D (Integration) Volume Ramp-up HVM Industry Process & Material Requirements PROMISE YIELD IMPROVEMENT Basic requirements Basic process Compatibility Initial Cost of Ownership Specific Process Compatibility Voids, CMP, Test, Solvent comp. Process Latitude Repeatability Cost of Ownership Technical Roadmap (Thinner Wafer, more bumps) 4
5 OUTLINE Room Temperature Debonding Prepare Processes & Materials for high volume manufacturing Material & Process Survey Next steps 5
6 2.5D / 3D-TSV PROCESS COMPATIBLITY MATRIX AND SUSS STRATEGIC PROCESS FOCUS DEBOND METHOD / MATERIAL SOLVENT RELEASE THERMAL SLIDE LASER RELEASE Room Temperature Bond Simple Carrier (low CoO) No thermal stress on solder High throughput capable Compatible to Si - Carrier No (laser) energy on active device SUSS Focus 6
7 GENERAL ROOM TEMPERATURE DEBOND PROCESS Temporary Bond Device Wafer Add & Prepare Release or Zoned Layer(s) Flip Wafer Bond Debond Carrier Wafer Spin Coat & Prepare Adhesive(s) Thinned Device Wafer Flip Wafer Carrier Wafer Attach to Dicing Frame Mechanical Debond at Room Temperature Clean Device Wafer 7
8 SUSS OPEN EQUIPMENT PLATFORM AND SUPPORTED MATERIALS Material Supplier WaferBOND WSS laser free ZoneBOND 8 Interposer and 3D Stacking
9 OUTLINE Introduction: Room Temperature Debonding Prepare Processes & Materials for high volume manufacturing Material & Process Survey Next steps 9
10 STEP1: WORKING WITH MATERIAL SUPPLIERS TO OVERCOME PROCESS CHALLENGES Voids TTV (Total Thickness Variation) Adhesive Conformity and strength to topography Adhesive strength varying with surface properties Coating of high viscosity adhesives Adhesive Conformity and strength to topography Mechanical stability of adhesives for backside processing (grinding) Thermal stability Chemical stability Particles 10
11 OVERVIEW ON SELECTED TEMPORARY BONDING MATERIALS FOR USE WITH GLASS AND SILICON CARRIERS Mechanical Room Temperature Release Materials: THERMOSET THERMOPLASTIC PHOTOSET Material made by Distribution by ZoneBOND WSS laser free Thermal Slide: Laser Release: THERMOPLASTIC PHOTOSET THERMOPLASTIC WaferBOND WSS (Wafer Support System) 11 Interposer and 3D Stacking
12 STEP2: SUCCESFULL DEBONDING & INTEGRATION FOR VARIOUS TEMPORARY BONDING MATERIALS 12
13 STEP 3: PROCESS OPTIMIZATION FOR PRODUCTION EXAMPLE TTV OPTIMIZATION - INFLUENCING FACTORS Release layer coating Release layer treatment Adhesive Coating Adhesive Curing Leveling Processes Bond Process Post Bond Curing Material Main influencing factors Thermoset Thermoplastic 13
14 STEP 3: PROCESS OPTIMIZATION FOR PRODUCTION EXAMPLE TTV OPTIMIZATION - RESULTS Carrier Device TTV C4 bumps (70um), ~ 2M bumps / wafer 120µm adhesive thickness Stack TTV < 4µm 14
15 EXAMPLES FOR POST GRINDING TTV FOR DIFFERENT ADHESIVES AT IMEC Kommentar Fertig, liegt zur fre imec Temp. Bond Adhesive Adhesive Thickness TTV on 50µm Si TTV[%] as a function of Adh. Thickness A 55µm 3µm 5,5% B 45µm 4µm 8,9% C 50µm 2µm 4,0% D 60µm 5µm 8,3% Device Carrier Device Carrier Thinned Device Wafer TTV 50µm Si wafer 15
16 STEP4: REPEATIBILITY MACHINE / MATERIAL COMBINATION Centering Arm Notch Finder Spec LF300 bond chamber Notch alignment results on 300mm wafer pair 16
17 OUTLINE Introduction: Room Temperature Debonding Prepare Processes & Materials for high volume manufacturing Material & Process Survey Next steps 17
18 TEMP. BONDING/DEBONDING PROCESS SURVEY Production Readiness Cost of Ownership Performance Temperature Categorized: Calculated: Weighted: 1 : Qualified /used for high volume manufacturing 2: Integration tests in line at institute 3: Qualified by SUSS internal tests Equipment cost Process times & cycles Other consumables: e.g. Cost of Tape (Cost of materials) Process Latitude (Survivability / Debondability) Achievable min. wafer thickness (TTV) Max. temperature for post processing WaferBOND WSS laser free ZoneBOND 18
19 READINESS COST OF OWNERSHIP MATRIX (JAN 13) Readiness level Qualified/Used for High Volume Manufacturing C D B A A B Integration tests at Institute F E Maturity C D E Qualified with SUSS test criterias G H F G H 7,00 6,00 5,00 4,00 2,50 3,00 2,00 1,50 1,00 Cost of Cost Ownership of (normalized to 1 for best process) - 0,50 50% Performance (TTV / Process Latitude) 100%: Si TTV 1µm & all bump sizes / layers more or less plug and play Max. Temperature 500 C 400 C 250 C 200 C 19
20 OUTLINE Introduction: Room Temperature Debonding Prepare Processes & Materials for high volume manufacturing Material & Process Survey Next steps 20
21 DO TEMPORARY BOND PROCESSES MEET THE INDUSTRY STATUS? Initial R&D Line R&D (Integration) Volume Ramp-up HVM Industry PROMISE YIELD (COST) IMPROVEMENT Basic requirements Basic process compatibility Initial Cost of Ownership Specific Process Compatibility Voids, CMP, Test, Solvent; Process Latitude Repeatability Cost of Ownership improvement Technical Roadmap (Thinner Wafer, more bumps) 21
22 HOW TO FURTHER IMPROVE COST OF OWNERSHIP / PROCESS LATITUDE Cost of Materials: Material Usage Choice of Materials Process Times Minimization of steps & timings Optimization of Total Thickness Variations Bump density and size Thickness after Thinning Extend room temperature debonding 22
23 CLEANING OPTIMIZATION- INFLUENCING FACTORS Solvent Dispense Spin Off Rinse Dry Process Steps Nozzle Flow Rate Nozzle Flow Rate Time / Spin Speed / Puddle Number of cycles Time Spin Speed Time Spin Speed Time Spin Speed Influencing Parameters Chemical #1 Chemical #2 Chemical #3 Chemical #4 Solves Adhesive Tape Frame Wafer Solvent Compability 23
24 CLEANING OPTIMIZATION - EXPERIMENTAL RESULTS Solvent Glue thickness Cleaning time Consumption of the solvent Origin POR 110 µm 100% 100% Improved POR 110 µm 72% 66% Comparison of the cleaning time and solvent consumption Solvent Price per liter Consumption of the solvent Volume Costs Origin POR Improved POR 100% 100% 100% 30% 66% 12,5% Comparison of the solvent consumption and the costs 1,5 8 24
25 EXAMPLE FOR ROADMAP WORK ON VERY THIN WAFERS AT ITRI 300mm 50µm thickness with TSV wafer 5µm Ultra Thin Wafer SUSS XBS Interposer and 3D Stacking
26 SUSS ROADMAP TEMPORARY BONDING / DEBONDING ONE PLATFORM ACROSS PRODUCT LINES / APPLICATIONS Qualifiying new materials Optimizing new materials Enhancement of debonding concept Time line 26
27 THANK YOU 27
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