JE2.1 Block Diagram MBX-114

Size: px
Start display at page:

Download "JE2.1 Block Diagram MBX-114"

Transcription

1 Intel Pentium W PIN mpg JE. lock iagram MX- R VRM MX RT L VOUT R/G/ LVS SIGNL TV SIGNL TI REON (M+X) GP bus System bus /MHz NORTH RIGE TI RSMP RM SIGNL R LOK R SO-IMM / PI bus TI-PI (SNGHK) Mini PI Wirless LN Realtek RTLL NE UP US. South ridge LI + RT TIQLF Memory Stick SLOT RJ US* ROM SEONRY IE US H PRIMRY IE US PU XUS NS P LPT L LINK M LINK JK TOUH P INT.K/ IOS EXT.MI. TP RJ EXT.SPKR. INT.SPKR. MIN POWER OR PWS- TTERY T/P SWITH T/P OR SWX- POWER SWITH Power LE ettery LE K/ LE Power SW OR SWX- QUNT OMPUTER Size ocument Number Rev JE. Main oard ate: 星期二, 十月, Sheet of

2 Page List lock iagram Page List Northwood PU- Northwood PU- RSM-GTL+ RSM-R I/F RSM-PI & GP I/F RSM-VIEO I/F & LKGEN SYSTEM ONFIGURTION R Terminator R SOIMMx RT PORT/TV LI M+ (PI,IS)-/ LI M+ (IE)-/ US. ontroller (NE-uP) TI M+ / TI M+ / TI M+ / VG R VRMX / VG R VRMX / GP SS/FN TI- (RUS++MS) TI- (RUS++MS) ardbus slot LN interface RTL udio OE udio MP & Int. Speaker MiniPI & M RT/POWER GOO LOGI IE/H/LPT onnector PU NS Int. Keyboard/ios/FN VORE POWER MX(VORE POWER ) MX(V/V/V) MX(.V/.V/.V ) MX(V.) Load Switch OVER PGE QUNT OMPUTER Size ocument Number Rev JE. Main oard ate: 星期一, 十一月, Sheet of

3 () H[..] () H[..] () -HI[..] H[..] H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H[..] H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H -HI -HI -HI -HI -HI[..] T T T T K K L K L M L M M N M N N N T R P P R T U P U T V R W T U V W Y G H J H E G F F E F L G H M L J K H M N P M N M N N R P R R T T T T U U U V U V V W Y W Y Y Y E G P V U ZIF_SOKET # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # I I I I M FERR INIT LINT LINT IGNNE SMI SLP STPLK W E Y S G ST L ST R NR G SY H EFER E RY H HIT F HITM E TRY PRI R LOK REQ REQ REQ REQ REQ RS RS RS STP STN STP STN STP STN STP STN LK LK ITP_LK ITP_LK J H G J K J J H F G F F E J K P R W W F F -HM -HFERR -HPUINIT INTR NMI -IGNNE -SMI -SLP -STPLK -HS -H_ST -H_ST -HNR -HSY -HEFER -HRY -HHIT -HHITM -HTRY -HPRI -HREQ -HLOK -HREQ -HREQ -HREQ -HREQ -HREQ -HRS -HRS -HRS -H_STP -H_STN -H_STP -H_STN -H_STP -H_STN -H_STP -H_STN PULK+ PULK- PULK+ PULK- ITP_LK- ITP_LK+ -IERR IERR T MERR V RESET E RESET RESET -PURST PWRGOO PWRG_PU SKTO F T OMP OMP EP EP EP EP THERM THERM THERMTRIP PROHOT TESTHI TESTHI TESTHI TESTHI TESTHI TESTHI TESTHI TESTHI TESTHI TESTHI TESTHI TESTHI TESTHI SEL SEL TK TI TO TMS TRST L P J K K L U W Y F E VI E VI E VI E VI E VI E VI PU_OMP PU_OMP T T T T THERM THERM -TRIP -PROHOT HTEST HTEST HTEST HTEST HTEST HTEST ITPLK ITPLK HTEST HTEST HTEST -GHI -PSLP TK TI TO TMS -TRST P_VI P_VI P_VI P_VI P_VI P_VI T INTR () NMI () -IGNNE () -SMI () -SLP () -STPLK () -HS () -H_ST () -H_ST () -HNR () -HSY () -HEFER () -HRY () -HHIT () -HHITM () -HTRY () -HPRI () -HREQ () -HLOK () -HREQ () -HREQ () -HREQ () -HREQ () -HREQ () -HRS () -HRS () -HRS () -H_STP () -H_STN () -H_STP () -H_STN () -H_STP () -H_STN () -H_STP () -H_STN () PULK+ () PULK- () *P THERM () THERM () -TRIP () S () S () P_VI () P_VI () P_VI () P_VI () P_VI () P_VI () -PURST () PWRG_PU () lose to PU PU_OMP R._% PU_OMP R._% lose to PU -GHI () P_VI P_VI P_VI P_VI P_VI P_VI -HM -HPUINIT -GHI T T T T T T R R R * T.U *R R VORE -HFERR R -PSLP -PUINIT -R TSHFU V V.U/V/YV V R.U K U R _% _% Q MMT K U *TSHFU -M KG -PUINIT () -R () R R R LOSE TO PU -M () -SMI KG () -STPLK () -PROHOT K -FERR () -SLP PWRG_PU -IERR -TRIP -HREQ -PURST ITP_LK+ ITP_LK- TI RESET -PROHOT -HFERR TO TMS TK -TRST.U.U.U.U.U.U.U.U.U.U K K Q MMT + VORE V V -PUSTOP (,,) R R R K THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. ate: 星期一, 十一月, Sheet of R R R R R U/V R R _%._%._% K K R R R _% R _% R _% R R R VORE U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V -HPUINIT ITPLK ITPLK -HM NMI -IGNNE INTR HTEST HTEST HTEST HTEST HTEST HTEST VORE QUNT OMPUTER PU Socket -/- Signal VORE RP HTEST HTEST HTEST VORE R K R K R K x RP x RP x RP x.u Size ocument Number Rev JE. Main oard U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V U/.V.U.U.U

4 Thermal Sensor GTLREF=/VORE THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. VIPWRG,VVIL, For prescott PU Socket -/- Power & Ground JE. Main oard 星期一, 十一月, Size ocument Number Rev ate: Sheet of QUNT OMPUTER PU_V PU_ PU_VIO PU_ PU_GTLREF PU_V VIL PU_GTLREF PM PM PM PM PM PM PU_GTLREF PU_GTLREF THERM THERM PM PM KSMT KSMT KSMLK KSMLK PU_GTLREF PU_VIO IMPSEL VORE_ON THERM () THERM () VRON () VORE_ON () MLK (,,) MT (,,) -SHN () T_LERT () VORE_F- () VORE_F+ () VORE VORE VORE VORE V. V. V V. V. V V V V V V V. U/.V T P L.UH/m T + U/V U/.V + U/V T T R _% *U/.V T T R._% R._% R._% R._%.U.U.U P.U.U U SIH--T NOISE ELY VIN VOUT F ERROR S.U/V/YV.U/V/YV R K R K.U.U R K R K U LM V + - SMLK SMT LERT T_RIT_ R *K R.U/V/YV R._% R *.K Q NE Q NE Q NE Q NE L.UH/m R U ZIF_SOKET E E E E E E F F F F F E E E E E E E E F F F F F F F F F F E E E E E E E F F F F F F F F F F E E F F F H H H H E E E E E E E E E E E E E F F F F V Y F F F F F F F G G G G J J J J K K K K L L L L M M M M N N N N P P P P R R R E Y Y Y Y W W W W V V V V U U U U T T T T R V_SENSE V VIOPLL _SENSE RSP P P PM PM PM PM PM PM INIT VVI GTLREF GTLREF GTLREF GTLREF VVIL VIPWRG R R K R * R

5 -PURST N_GTLREF VORE R.K V R._% U/V/YV R _% isable HT R K Q MMT P P H Q NE (,,) -SUS R () -HREQ K R K () H[..] R * H[..] () -HREQ () -HREQ () -HREQ () -HREQ () -HREQ () -H_ST () -H_ST () -HS () -HNR () -HPRI () -HEFER () -HRY () -HSY () -HLOK () -PURST () -HRS () -HRS () -HRS () -HTRY () -HHIT () -HHITM -PURST -HRS -HRS -HRS H H H H H H H H H H H H H H -HREQ -HREQ -HREQ -HREQ -HREQ H H H H H H H H H H H H H H H (,,,,,,,) -PIRST () N_PWRG R _% N_OMP VORE R._% N_OMP V R R M N R M L P K K L E K K M J K L V V U M # P # M # N # N # M # P # P # P # R # P # R # N # N # REQ# REQ# REQ# REQ# REQ# ST# T # T # R # R # R # T # U # T # U # U # U # T # V # U # V # U ST# S# NR# PRI# L EFER# L RY# J SY# J R# L LOK# PURST# RS# RS# RS# TRY# HIT# HITM# R. GROUP R. GROUP ONTROL SUSSTT# SYSRST# POWERGOO OMP OMP _% N_OMPLK _% N_OMPLK OMPLK OMPLK N_GTLREF V P_VREF VORE VPU G VPU G VPU G VPU H VPU J VPU M VPU N VPU W VPU P VPU MIS. PRT OF GTL+ I/F PENTIUM IV H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H -HI[..] -HI[..] () H[..] H[..] () -HI () -H_STN () -H_STP () -HI () -H_STN () -H_STP () -HI () -H_STN () -H_STP () -HI () -H_STN () -H_STP () VORE T GROUP T GROUP T GROUP T GROUP # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # J H H H J J G H F G G F F H F F I# H STN# G STP# G F E E E E I# STN# STP# E E F F F E F I# STN# E STP# E F E F I# F STN# STP# E RSMP + U/.V.U.U.U.U.U.U.U.U.U.U RSM / Size ocument Number Rev JE. Main oard THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. ate: 星期一, 十一月, Sheet of QUNT OMPUTER

6 TI_RSM+ - ( R Interface ) M[..] M[..] (,) MQM[..] MQM[..] (,) MQS[..] MQS[..] (,) () MLK- () MLK+ () MLK- () MLK+ () MLK- () MLK+ () MLK- () MLK+ () MLK- () MLK+ () MLK- () MLK+ (,) M[..] R * R * R * R * R * R * R * R * R * R * R * R * M[..] (,) -MSRS (,) -MSS (,) -MWE (,) MKE (,) -MS (,) -MS (,) -MS (,) -MS.VSUS M M M M M M M M M M M M M M M RMQM RMQM RMQM RMQM RMQM RMQM RMQM RMQM RMQS RMQS RMQS RMQS RMQS RMQS RMQS RMQS RMLK- RMLK+ RMLK- F RMLK+ R_K# E R_K RMLK- RMLK+ E E E E F E F E E Y F F W U R_ R_ R_ R_ R_ R_ R_ R_ R_ R_ R_ R_ R_ R_ R_ R_M R_M R_M R_M R_M R_M R_M R_M R_RS# R_S# R_WE# R_KE R_QS R_QS R_QS R_QS R_QS R_QS R_QS R_QS R_K# E R_K RMLK- F RMLK+ R_K# E R_K RMLK- Y RMLK+ R_K# R_K R_K# R_K R_K# R_K RMLK- RMLK+ R_S# R_S# R_S# R_S# TESTMOE VRM F VRM VRM VRM VRM F VRM F VRM Y VRM Y VRM Y VRM RSMP PRT OF R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R I/F R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q R_Q VRM VRM VRM VRM VRM VRM VRM R_VREF E F E F E E F E F F F E F F F E E E E E Y Y Y W W Y Y Y Y Y V W RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM U/V/YV.U.U RMQM RMQM RMQM RMQM RMQM RMQM RMQM RMQM RMQS RMQS RMQS RMQS R RMQS R RMQS RMQS RMQS.VSUS R R R R R MVREF_IM () MQM MQM MQM MQM MQM R MQM R MQM R R MQM MQS R MQS R MQS R R R MQS MQS MQS MQS MQS RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RP X X M M M M RP M M M M RP M M M M X RP M M M M X RP M M M M X RP M M M M X RP M M M M X RP M M M M X RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RP M M M M X RP M M M M X RP M M M M X RP M M M M X RP M M M M X RP M M M M X RP M M M M X RP M M M M X.VSUS U/.V.U.U.U.U.U.U.U.U.U.U.U.U.U RSM / Size ocument Number Rev JE. Main oard THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. ate: 星期一, 十一月, Sheet of QUNT OMPUTER

7 (,,,,,) [..] (,,,,,) -E[..] [..] -E[..] For internal graphics used(r,r,r) (~MHZ) VGP For external graphics ST R.K ST R.K V U ST R.K V. T R G UE R T PI_ PRT OF GP_.K G -GIRY (.) SERIRQ (,,) F R R.K PRT OF T PI_ GP_ G -GTRY P R.K K R T PI_ GP_ G -GEVSEL _ORE.K -PERR (,,,) F P R.K K E T PI_ GP_ G -GSTOP _ORE F P R.K K efault : External Gfx RP T PI_ GP_ G GPR _ORE.Kx -SERR (,,,,) E N R.K K N T PI_ GP_ G -GRF _ORE Internal Gfx : -STOP (,,,,) E N R.K K J T PI_ GP_ G -GWF _ORE -IRY (,,,,) N R.K K Y T PI_ GP_ G -GREQ _ORE -REQ () E L R.K L Remove : T PI_ GP_ G -GGNT _ORE E L R.K L F RP T PI_ GP_ G _ORE.Kx R~R,R~R, -EVSEL (,,,,) L F T PI_ GP_ L G _ST _ORE -FRME (,,,,) K R.K L N R~R,R, R, T PI_ GP_ G _ST _ORE PR (,,,,) K R.K L V T PI_ GP_ G -GPIPE _ORE RP,RP,R,R, -TRY (,,,,) E J R.K L T PI_ GP_ G -GSERR _ORE J R.K M K R,R RP T PI_ GP_ G S _ORE.Kx -INTF (,) H RP M F T PI_ GP_ G S _ORE -INT (,,) M.KX M T PI_ GP_ G S _ORE -INT (,,) M G T PI_ GP_ L G S _ORE -INTE (,) Y M F T PI_ GP_ L G S _ORE L RP M E Insatll : T PI_ GP_ R G S _ORE.K -GNT () Y K.KX R T PI_ GP_ R G S _ORE.K R~R,R,R,R, -REQ () Y R T PI_ GP_ K R G S _ORE.K -REQ () Y R R,R,R,,R, T PI_ GP_ K R G _ORE.K -GNT () W R G T PI_ GP_ J G -_ST _ORE W H R.K R G R,U RP T PI_ GP_ G -_ST _ORE.Kx -GNT () W J R.K R G T PI_ GP_ G _ORE -GNT () W T G T PI_ GP_ G G _ORE -REQ () W -GE[..] () T G T PI_ GP_ G G _ORE -LKRUN (,,) V T G T PI_ GP_ G G _ORE V G T J RP T PI_ GP_ G VGP _ORE.Kx -INT (,,) W T G T PI_ GP_ F G _ORE -INT (,,) V PI_ GP_ F T K -GFRME _ORE R.K -PHL () U K S_ST S_ST _ORE -PHOL () F R.K S_ST () U K T -E GP_SST -S_ST -S_ST _ORE E R.K -S_ST () U L T -E PI_E# GP_SST# _ST _ORE _ST () U L T -E PI_E# GP_ST M -_ST _ORE -_ST () U L T -E PI_E# GP_ST# M _ST _ORE Y PI_E# GP_ST H _ST () For internal graphics U -_ST _ORE -_ST () M PR GP_ST# H -GGNT (,,,,) PR R (,) -GP_USY M PR -FRME PI_PR * T -GE G (,,,,) -FRME M R (,) PNL_T V G M -FRME -IRY PI_FRME# GP_E# * T -GE -GRF _.V -IRY (,,,,) -IRY H R () TI_EN G G -TRY PI_IRY# GP_E# * T -GE -GIRY (m) _.V (,,,,) -TRY M R (,) PNL_LK N -TRY -INT PI_TRY# GP_E# * T -GE -GREQ -INT (,,) -INT T J R (,) -GP_STP N -EVSEL INT# GP_E# * T S (,,,,) -EVSEL R (,) -TI_ENL VGP K N -EVSEL -STOP PI_EVSEL# * T -GEVSEL S _GP (,,,,) -STOP N R -GEVSEL () (,,) -LKRUN H N -STOP -SERR PI_STOP# GP_EVSEL# * T -GFRME (m) _GP -SERR (,,,,) -SERR M -GFRME () P N T -PIREQ PI_SERR# GP_FRME# -GIRY _GP -PIREQ (,) -PIREQ R N -GIRY () L N T PI_TIVE_REQ# GP_IRY# GPR _GP R GPR () K N -PHOL GP_PR -GPIPE _GP () -PHOL T E H N T -PHOL -PHL PI_SREQ# GP_PIPE# -GRF _GP () -PHL R -GRF () N T -PHL PI_SGNT# GP_RF# -GSERR P P () -REQ -REQ GP_SERR# -GSTOP V P R -GSTOP () () ISEL_ P -REQ -REQ PI_REQ# GP_STOP# T -GTRY () -REQ U P R -GTRY () () ISEL_US T P -REQ -REQ PI_REQ# GP_TRY# T -GWF R () ISEL_LN -REQ () -REQ U F -GWF () U P T -REQ PI_REQ# GP_WF# () -REQ T R () ISEL_MP U P -REQ PI_REQ#/PI_LK T -GREQ -GREQ () U P -GNT GP_REQ# -GGNT () -GNT V -GGNT () Y P T -GNT () -GNT -GNT PI_GNT# GP_GNT# V P T -GNT () -GNT -GNT PI_GNT# S U Y R T -GNT -GNT PI_GNT# GP_S S R _ () -GNT T E S[..] () V. Y R T -GNT PI_GNT#/PI_LK GP_S S R *_ V GP_S V Y R S GP_S E Y R S GP_S F Y T S T _V GP_S F T -GP_ET GP VGP S GP_S G T T S GP_S G lose to N.U Inter. V F VPI X.V Y ST VPI GP_ST ST () RSMP T E GP_ST R ST (m) VPI GP_ST ST () U GP_ST R ST external VPI GP_ST ST () X.V V VPI W -GP_ET VPI GP_VOLTGE_ETETE VGP GP_VREFX R PUT ON THE SOLER SIE OF RSM V R RSMP K_% VGP V R *K R *K R *K S S XOUT -GP_ET PI/GP I/F VGP R *K R K V. G[..] ().U R K_% V U/V.U U/.V.U.U GP U/.V ORE PWR PWR/.U.U.U.U LVS_SPE L: ISLE H: ENLE GP_ST GP_ST R *K R * R *K R * R * U R *K LVS_SPE SS XIN/LK SOUT *SM V *.U.U U/.V U/.V U/.V U/.V.U U/.V U/.V.U.U.U.U + U/.V.U.U.U.U.U.U.U.U THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. RSM / QUNT OMPUTER Size ocument Number Rev ustom JE. Main oard ate: 星期六, 十一月, Sheet of

8 PL PULK+ PULK- HLKIN HLKIN# GP_FLKIN_R PLK_S PLK_MP PLK_ PLK_LN PLK_NE OSM LK_GP U/.V L _ L MN-- U/V/YV.P.P *P *P *P *P *P *P *P *P *P *P V. RSM_X RSM_X U/.V R M V. L MN-- R R U/V/YV P P _%.MHz/PF/PPM Y R,R close to Pin,E R,R close to Pin, PL U/.V R R R R R.U R R.U U/V/YV R _% _%.U.U _% _% _%.U.U RT_R_R RT_G_R RT R VSY_R HSY_R N_RSET RSM_X RSM_X HLKIN HLKIN# +.VN U G +.V W W E E F.U N Q N Q Q L V MN-- PRT OF THERMLIOE_N THERMLIOE_P PLL PLL PLL PLL RE GREEN LUE VSY HSY RSET XTLIN XTLOUT HLKIN E HLKIN# RT _% SYS_FLKOUT#_R _% SYS_FLKOUT_R SYS_FLKOUT# SYS_FLKOUT LVS SVI TXOUT_UN TXOUT_UP TXOUT_UN TXOUT_UP TXOUT_UN TXOUT_UP TXLK_UN TXLK_UP TXOUT_LN TXOUT_LP TXOUT_LN TXOUT_LP TXOUT_LN TXOUT_LP TXLK_LN TXLK_LP LP LP F LR LR E LR LR _R Y_G OMP_ RSET E F E ROUT-_R ROUT+_R ROUT-_R ROUT+_R ROUT-_R ROUT+_R RLK-_R RLK+_R ROUT-_R ROUT+_R ROUT-_R ROUT+_R ROUT-_R ROUT+_R RLK-_R RLK+_R RSET LP LP LR LR TV_OMP_R R R R R For internal graphics close to M ROUT-_R R * ROUT+_R R * ROUT-_R R * ROUT+_R R * ROUT-_R R * ROUT+_R R * RLK-_R R * RLK+_R R * ROUT-_R R * ROUT+_R R * ROUT-_R R * ROUT+_R R * ROUT-_R R * ROUT+_R R * RLK-_R R * RLK+_R R * close to N TV_OMP_R R * RT_R_R R * RT_G_R R * RT R R * HSY_R R * VSY_R R * _R R * _R R * U/V/YV U/V/YV _% _% _% _% L MN--.U ROUT- ROUT+ ROUT- ROUT+ ROUT- ROUT+ RLK- RLK+ ROUT- ROUT+ ROUT- ROUT+ ROUT- ROUT+ RLK- RLK+ TV_OMP (,) RT_R (,) RT_G (,) RT_ (,) HSY (,) VSY (,) (,) (,) L MN-- U/V/YV V. U/.V V. U/.V efault :External Gfx Internal Gfx : Remove : R,R,R,R,R~R Install : R~R V.U.U PILK_INT U LK LK LK LK REF LKOUT IS R ohm for external GP. el R ohm for internal GP. PLKNE R PLKMP R PLK R PLKLN R PLK_NE () PLK_MP () PLK_ () PLK_LN () () OSM () M_OE () PLK_S PILK_INT LK_GP () LK_GP M_LK OSM R R R R R R R S_PILK_INT_R PILK_INT_R LK_GP_R GP_FLKIN_R GP_FLKOUT_R M_LK_R S_OS_INT_R U E GPLKIN/GP_FLKIN EXT_MEM_LK/GP_FLKOUT U F PI_LKF PILK_N GPLK USLK REF/PILK OS RSMP LK. GEN. SL S PILK_STOP# PUSTOP# SYSLK SYSLK# F F U F _R _R R R PULK_INT_R PULK#_INT_R R.K R.K K K R R V V -PISTOP () -PUSTOP (,,) V _% _% PULK+ () PULK- ().U.U M_LK () ROUT- () ROUT+ () ROUT- () ROUT+ () ROUT- () ROUT+ () RLK- () RLK+ () ROUT- () ROUT+ () ROUT- () ROUT+ () ROUT- () ROUT+ () RLK- () RLK+ *RFMFMT V U *RFMFMT *RFMFMT *RFMFMT REF LKOUT IS LK LK LK LK LP LP LP LP US_LK R MSLK_M_R R *P *P USLK () MSLK_M () RFMFMT RFMFMT RFMFMT RFMFMT Rout : First channel *P LV LP LP LP LP OROUT- OROUT+ OROUT- OROUT+ OROUT- OROUT+ ORLK- ORLK+ OROUT- OROUT+ OROUT- OROUT+ OROUT- OROUT+ ORLK- ORLK+ P P L ON Hold Hold PNL_T (,) V PNL_LK (,) V R K VIN ISPON (.V~.V) R K.U (,) -TI_ENL V RIGHT () L-FOXONN(HT) THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. R K U R HNFU K R.K R K U HNFU R K QIPN:LSZ SZPX U (,) PWROK WZKX U V () ISP_ON R RSM /.U WZKX U *U/V/YV ISPON QIPN:LWZ QUNT OMPUTER Size ocument Number Rev ustom JE. Main oard ate: 星期一, 十一月, Sheet of

9 S () R *.K R *.K R.K S () R.K R.K R *.K V V [..] : LK SPEE EFULT: : MHZ : MHZ : MHZ : MHZ R.K R *.K [..] V [..] (,,,,,) : GTL+ Q :.V MOILE PRT :.V ESKTOP PRT R.K [] : FLT PNEL I MS R *.K R.K V : RSM FULL ONFIGURTION EFULT: : FULL ONFIGURTION : USES EFULT VLUES V R.K R *.K V : SPRE SPETRUM ENLE EFULT: : ISLE : ENLE [..] : FLT PNEL I RP KX R *.K R.K V : MERR OSERVTION EFULT: : ENLE : ISLE R.K R.K R.K R.K LI LI LI LI LI LI LI LI SW ON R *.K R.K V : US PRKING EFULT : : ENLE : ISLE IPX R *.K R.K R.K R *.K V V : INIT# OSERVTION EFULT : : ENLE : ISLE : IOQ ENLE EFULT : : SET IOQ TO :SET IOQ TO R.K R *.K R.K V : _LINK ENLE EFULT: :PI- MHz,MULTI POINT ONNETION : _LINK,POINT TO POINT INTERONNET : UTO LITION ENLE EFULT: : UTO LIRTION ENLE : UTO LIRTION ISLE R *.K R.K V : FrcShortReset EFULT: : NORML OPERTION : TEST MOE R *.K R.K V :REF ENLE EFULT : : PILK OUTPUT : MHzREFEREE LOK INPUT R.K R *.K V : PI/GP ONFIG. EFULT : : EXTERTL GP MHz : INTERNL GP MHz R *.K R.K V : LK_YPSS(TEST ONLY) EFULT : : NORML : TEST MOE The signal strapping pull high for external GP. The signal strapping pull low for internal GP. PI_PREQT#: INTERNL LOK GEN. EFULT : : ISLE : ENLE R.K : PILK EXPNSION EFULT : : PI_REQ#, PI_GNT# USE S PILK : PI_REQ#, PI_GNT# USE S REQ/GNT (,) -PIREQ R.K V -E -E -E[..] R.K V R *.K R *.K V R.K -E[..] (,,,,,) E#: PRO TEST EFULT : : SHORT TIMERS : NORML OPERTION E#:RESERVE SYSTEM ONFIG Size ocument Number Rev JE. Main oard THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. ate: 星期一, 十一月, Sheet of QUNT OMPUTER

10 M[..] (,) M[..] R TERMINTOR M[..] (,) M[..] (,) MQS (,) MQM (,) MQS (,) MQS (,) MQM M M M M M M M M M M M M M M M M M M M M RP X RP X RP X RP X RP X RP X RP X VTT_MEM (,) MQM (,) MQS (,) MQM (,) MQM (,) MQM (,) MQS M (,) MQS M RP X (,) -MSRS M M M M M M RP RP X X M M M M M M RP X M M (,) MQM M RP X M M (,) RP X (,) MQS M (,) MQM M M (,) M M RP X (,) (,) MQS M M M M M M M M M M M M M M M M M M M M RP X RP X RP X RP X RP X RP VTT_MEM X (,) MQM[..] (,) MQS[..] (,) -MSS (,) -MWE (,) -MS (,) -MS -MSS M -MWE M M M M M M M M -MS M -MS -MSRS M M M M M -MS MKE -MS MQM[..] MQS[..] RP X RP X RP X RP X RP X -MS -MS R R R VTT_MEM VTT_MEM VTT_MEM.VSUS.U.U.U.U.U.U.U.U.U.U.U.U.U.U.U.U.U.U.U.VSUS.VSUS VTT_MEM.U.U.U.U.U.U.U.U.U.U.U.U.U.U.U.U U/.V U/.V U/.V.U.U.U.U.U.U.U.VSUS VTT_MEM.U.U.U.U.U.U.U.U.U.U P P P P P P.U.U.U.U.U U/.V U/.V U/.V U/.V.U.U.U.U.U.U.U.U.U.U.U.U M Terminator M[..] (,) M[..] M M M M M M M M -MSRS -MSS -MWE MKE -MS -MS -MS -MS.U.U.U.U.U.U.U.U.U.U.U.U.U.U.U.U P P P P P P P P.U.U.U.U E M M M M M M M P ETWEEN N & ST IMM P ETWEEN N & ST IMM P P P P P P P P P P P P P Memory -/- Terminator Size ocument Number Rev JE. Main oard THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. ate: 星期一, 十一月, Sheet of.u.u QUNT OMPUTER.U.U E

11 E E R - Modules THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. Memory -/- SOIMM JE. Main oard 星期一, 十一月, Size ocument Number Rev ate: Sheet of QUNT OMPUTER M M M M M M M M M M M M MQM MQS M M M M -MWE M M M MQM MQS M M M M -MSS M M M M MQM M M M M M M M MQM M M M M M M M M MQM MQM MQS -MSRS M M M M M M M MQM MQS M M M M M MQM MQS M M M MQS MQS M M M M M M MQS M M M M M M MQM M M M M M MQM M[..] M M M M M M M M M M MQS M M M M M M M M M M M M MQS M M M MQS -MSS M M M M M MQM M M M M M M MQM MQM M M M M M M M MQS M M M M M M M M M M M MQS M M M -MWE MVREF_IM M M M M M MVREF_IM MQS -MSRS M MQM MQM MQS M M M M M MQM MQS MVREF_IM MVREF_IM M M M M M M M M M M M M M M M M M[..] (,) MQM[..] (,) -MSRS (,) -MSS (,) -MWE (,) -MS (,) -MS (,) MKE (,) MKE (,) SMT () SMLK () -MS (,) -MS (,) MKE (,) MKE (,) SMT () SMLK () M[..] (,) MVREF_IMM () MQS (,) MQS (,) MQS (,) MQS (,) MQS (,) MQS (,) MVREF_IM () MQS (,) MQS (,) MLK+ () MLK- () MLK+ () MLK- () MLK+ () MLK- () MLK+ () MLK- () MLK- () MLK+ () MLK+ () MLK- ().VSUS V V.VSUS.VSUS V.VSUS.VSUS.U P U/.V R K R K R K R * R * U/.V R U/.V U/.V U/.V ON R_SOIMM-ST /P Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q U U U U U/RESET# U/ U/ S S S VREF VREF SP I M M M M M M M M M QS QS QS QS QS QS QS QS QS RS# WE# S# S# S# KE KE K K K K# K# K# S SL P P ON R_SOIMM-RVS /P Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q U U U U U/RESET# U/ U/ S S S VREF VREF SP I M M M M M M M M M QS QS QS QS QS QS QS QS QS RS# WE# S# S# S# KE KE K K K K# K# K# S SL P P

12 V R.K V R.K R.K R.K R V *U *U V (,) RT-SK (,) L RT-S V (,) RT_R L ML-- RT-R (,) RT_G (,) RT_ R _% *P R _% *P R _% L L *P ML-- ML-- P P P RT-G RT- RT-R RT-G RT- ON RT_ONN Z-H-P RT-S RT-HS RT-VS RT-SK V (,) HSY V R K U G TWFU I O R L V RT-HS L Q NE Q NE P UZS. P UZS. *U *U *U UZS. UZS. UZS. *U *U (,) VSY U G TWFU I O L RT-VS P UZS. P UZS. ON TVOUT HSJ_JL-LY-TR *RS.S TVOUT V OUT P P L L L ML-- ML-- ML-- VOUT_R () VOUT_L () L.UH P P R _% TV_OMP (,) RT PORT/TV Size ocument Number Rev JE. Main oard THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. ate: 星期一, 十一月, Sheet of QUNT OMPUTER

13 PI onfigration up EVIE ISEL -GNT -REQ RTLL MINI PI TI THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. + / JE. Main oard 星期一, 十一月, Size ocument Number Rev ate: Sheet of QUNT OMPUTER -MEMR -MEMW S S S S ITLK SIN SIN IOHRY -PIRST -PM_REQ -PM_GNT GME GME GME GME -E osckx -E S S GME GME S S -IOR SIN S[..] -S_PIRST S S S S ITLK osckx S GME GME SIN -M S GME S S S _SY#_R S S S -VOLUP_S S GME S -VOLN_S S S S -IOW GME -MUTE_S -PM_REQ -E S S -SI -PM_GNT S IOHRY S S GME -E S _T_OUT#_R -S_PIRST -US_SMI S S S -MUTE_S -VOLUP_S -VOLN_S S S S S S S S S GME GME S S S S S S S S -SI -US_SMI -MEMR -MEMW -IOR -IOW S S S S GME GME -FERR () -IGNNE () INTR () -FRME (,,,,) -IRY (,,,,) -TRY (,,,,) -STOP (,,,,) -EVSEL (,,,,) -SERR (,,,,) PR (,,,,) -PHOL () -PHL () -E[..] (,,,,,) [..] (,,,,,) -INT (,,) -INT (,,) -INT (,,) S[..] (,) S[..] (,) -IOR () -IOW () -MEMR () -MEMW () LKKO () PWROK (,) IOHRY () EN (,) -ROMS (,) RT_S () RT_RW () RT_S () ITLK (,) SIN () SIN () SY (,) SOUT (,) -SI () IRQ () IRQ () -IRQ () -PIRST (,,,,,,,) -S_PS () -S_PS () S_SPLE () S_GPO () PLK_S () -PUINIT () -M () NMI () -INT (,,) -INTE (,) -INTF (,) OSM () SERIRQ (,,) -US_SMI () -RST (,) V V V V V RV RV V V V RV RV V V V VSUS V RV R K R.K R *K R R R R M Y.K/PPM R K T R R U TSHFU R K R K T T T PRT OF PI US INTERFE PU INTERFE U M+ U U W Y V N M N E E T E E E E E E F F F G F F G G G H U U U Y W V Y W V Y W V Y W V U T R Y W V U T W V U T T U T U Y V W Y R R R Y T N N P Y P R V V V W W W Y Y Y P P W Y U U R U R T T R R R R R P F F F P G K F E G N N R H H H H H H J J J J J J K K K K K K L L L L L L M M M M M M N N N N N N PWG SPIFIN PIRST# OSM OSKI OSKII LKKO IGNNE# INTR NMI M# PIS#_PS# PIREQ# PIGNT# LRLK_PMGNT# SLK_PMREQ# PMT PILK FRME# IRY# TRY# STOP# EVSEL# SERR# PR PHOL# PHL# E# E# E# E# INT#_MI INT#_S INT#_S INT#_S INTE# INTF#_MOTORON# X X X X X X X X S_L S_L S_L S_L S S S S S_S S_S S_S S_S S_S S_S S_S S_S IOS IOS IOS IOR# IOW# MEMR# MEMW# RUNENT RUNENT RUNENT RUNENT RTS RTRW RTS SPLE ROMKS# IRQSER SIRQI SIRQII IRQ# PS# PS# GME GME GME GME GME GME GME GME RESET# SY ITLK STIN STIN STOUT GPUP GPOWN GPMUTE MIITX_IRQO MIIRX_IRQO UPSPWR VRE VRE VRE VR VR V V V V V VF VF VG V V V V V INIT PURST FERR# RP Kx RP Kx RP Kx RP Kx RP Kx RP Kx RP Kx RP Kx RP Kx RP *Kx RP Kx.U U/.V.U.U U/V/YV.U U/V/YV.U.U.U.U U/.V.U U/.V.U.U P.U.U.U.U.U.U.U.U U/.V P R K R K RP Kx

14 TO R () SMLK () SMT () IRQ () IRQ RP Kx R V (,) -GP_USY (,) -GP_STP V V V R.K R R () -KSMI () USLK PUSPON PUSPOP () PREQ () -PK () PIORY () -PIOR () -PIOW () -PS () -PS R.K K K PUSPN PUSPN RP PUSPP Kx PUSPIN PUSPP V R *K R K R *K MI R K R K R *K R K K R V R.K PUSPOP PUSPON PUSPIN PUSPP PUSPN PUSPP PUSPN MI MI MI POVR V T T T K R K T T U T T V U U V H W V U Y W V U T T T U U L L M E E G H H H G J J U SMLERT# SMLK SMT PRT OF MSLK MST KEYOR INTERFE KINH_IRQI KLK KT USPWREN# USLK USPP USPN USPP USPN USPP USPN USPP USPN OVR#/SEL_MOE/H_OVR# OVR#/SEL_MOE/H_OVR# OVR#/I_FT/USN IE INTERFE US INTERFE OVR#/E_FT/USN IRRXH IRRX IRTX Ir LK GPUSY_LIP GPSTP#_LIS PIERQ PIEK# PIERY PIEIOR# PIEIOW# PIES# PIES# + FLOPPY ISK INTERFE SERIL PORT INTERFE PRINTER PORT INTERFE FNIN/USPP FNOUT/USP FNOUT/USP /SPIF_OU LFRME# LRQ# L# LL#_PUPWG T T -S_LRQ -S_L -TLOW S_GPO S_GPO -NSWON -THRM -PME -RI -RSMRST R R K R PRSLPVR () -TLOW () PSPK () -NSWON () -SMI () -STPLK () -SLP () V -PUSTOP (,,) -PISTOP () -PIREQ (,) -PU_GHI -SUS () -SUS () RV -SUS (,,) -LKRUN (,,) R VSUS K T -LI () T SS T T RV# K P RV# K () P H P PIE MOT# K () P H P PIE MOT# K () P J L T PIE FIR# L T P STEP# G M T P PIE HSEL# F L T P PIE WT# F T P PIE ENSEL J F L T P PIE WGTE# E M T P PIE RT# L T P PIE TRK# J T P PIE INEX# M T P PIE WPROT# M T P PIE SKHG# P PIE E -RTS P PIE RTS# H E J T P PIE TS# F J T P PIE TR# F H T P PIE SR# G G T P[..] P PIE # () P[..] G J T PIE RI# H T SIN J T SOUT () SREQ SIERQ () -SK K R K SIEK# RTS# MSEL () SIORY SIERY TS# K T_LERT () -SIOR E SIEIOR# TR# L T_LERT () () -SIOW K T SIEIOW# SR# () -SS SIES# # J ISP_ON () -O T () -SS SIES# RI# L K -OMP S SIN PRT_ON () S K R K S SIE SOUT () S S SIE () S SIE PRINIT# R -INIT () R -SLIN () S SLTIN# P -ST () S SIE STRO# R -F () S SIE UTOF# L SLT () S SIE SLT E M USY () S SIE USY M -K () S SIE PRNK# T -ERR () S SIE ERROR# M PE () S SIE PE E S SIE P P S SIE P E P P S SIE P N P S SIE P N P S SIE P N P S SIE P N P S SIE P E N P S SIE P M P SIE I M LI S + SUPER IO P S[..] () S[..] P[..] () GPO GPO SPKR PWRTN# PWR THRM# PME# RI# RSMRST# SMI# STPLK# SLEEP# ZZ_RTIO# PUSTP# PISTP# PIREQ# OFFPWR OFFPWR OFFPWR Y W V N P W Y P P T Y Y T W V W E V W Y T T S_SQWO SQWO V V R K SLPTN# W -SUS SUSPEN# LKRUN#_IRQO OFFPWR_RSMENT T R (,) PMRSTEN K RV V V V V V V V V V VORE R K Q MMT -RSMRST R.K R.K R R R R R R R R R R R R K K K K K K R *K K K K K K K SS -GHI () R T_LERT -RTS LKKO S_SPLE S_SQWO -S_PS -S_PS S_GPO -S_L S_GPO EN -ROMS S_GPO -S_LRQ -THRM -PME -TLOW -NSWON R -RI R -SUS -O -OMP (,,,) -PME SS K RV RV.U/V R LKKO () S_SPLE () -S_PS () -S_PS () S_GPO () EN (,) -ROMS (,) THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. ate: 星期一, 十一月, Sheet of R R R R R VSUS K K K K K K K K R *K R K MSEL V V RV RV RV RV RV Q V V VSUS V High Internal KEY PS MOE Enable internal KEY SIO ase R xf K LK Test Mode Enable T power Mode Pentium II mode isable Mb Flash ROM mode GPI,GPO functions isable hip test mode ctive high topower H, H Normal operation Flash ROM modeselection + / NE R *K R *K -PME QUNT OMPUTER H : Ext Gfx L : Int. Gfx Low Internal KEY T MOE isable internal KEY SIO ase R x K LK Test Mode isable TX power Mode Pentium/K mode Enable Mb Flash ROM mode IOHRY,EN functions Enable hip test mode ctive low topower L,L Reserve L,H Enable Mb Flash ROMsize H,L isableall FU in this ONFIG L,L Enable LP Flash ROM Size ocument Number Rev JE. Main oard

15 (,,,,,) [..] (,,,,,) -E (,,,,) -E (,,,,) -E (,,,,,) -E (,,,,) PR (,,,,) -FRME (,,,,) -IRY (,,,,) -TRY (,,,,) -STOP () ISEL_US (,,,,) -EVSEL () -REQ () -GNT (,,,) -PERR (,,,,) -SERR (,,) -INT (,) -INTE (,) -INTF () PLK_NE (,) -SUSRST (,,,) -PME VSUS (.) R R E E F J J K K L K L L M N M N P N P M F J M VSUS VSUS_NE U # # # # J PR F FRME# F IRY# G TRY# G STOP# ISEL G EVSEL# REQ# GNT# H PERR# H SERR# INT# INT# INT# PLK VRST# PME# H M _PI _PI _PI P P P E N L J H F G H US. ONTROLLER upf-e FG NE_ N N For nalog PLL power XT/SLK XT L P RSM M M M P L RSP K RSM K M K P J RSP J RSM H M G P G RSP G RSM F M F P E RSP E RSM E M P RSP RREF (R) OI OI OI OI OI PPON PPON PPON PPON PPON P N OI OI OI OI OI R R % R % R % R % R % R % T T T T PPON PPON PPON R R R R *.U NE_ RREF *.U R.K % NEUS_X NEUS_X USP- USP+ USP- USP+ USP- USP+ K K K K NEUS_X P USV USP- USP+ USV USP- USP+ USV USP- USP+ R K R K R K Y M/PF/+-PPM NEUS_X P L R K L R K L R K U/.V HMJ MN--P LP *RFMFMT MN--P LP *RFMFMT MN--P LP *RFMFMT U/.V USV USV USV U/.V.U.U U/V/YV U/V/YV US_V USP- USP+ US_V USP- USP+ US_V USP- USP+ U/V/YV U OUT OUT LM-H IN EN EN FLG FLG Foxconn U- P Foxconn U- P Foxconn U- P PPON PPON OI OI ON ON ON VSUS VSUS U/V/YV () -US_SMI VSUS.U U OUT IN U/V/YV R.K L L SMI# LEG NTEST SM M TE TEST NNTEST M M P N L M T T T T T T OUT EN EN FLG FLG PPON OI VSUS (,,,,,,,) -PIRST R.K R.K R P M N. N. VRST# SRLK SRT SRMO M N P T T LM-H The chip is power swith for US power. (,,) -LKRUN N RUN# VSUS N P N H N N M L H G J F P M upf-e OI OI OI OI OI R K R K R K R K R K VSUS U/.V.U.U/XR.U/XR P.U/XR.U/XR P VSUS L MN--P NE_ U/V/YV.U/XR P US ontroller NE-uP Size ocument Number Rev ustom JE. Main oard THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. ate: 星期一, 十一月, Sheet of QUNT OMPUTER

16 XTLIN XTLOUT () G[..] () -GE[..] () LK_GP (,,,,,,,) -PIRST () -GREQ () -GGNT () GPR () -GSTOP () -GEVSEL () -GTRY () -GIRY () -GFRME (,,) -INT () M_OUT () XTLIN () XTLOUT () -GWF () -GRF () _ST () _ST () S_ST () S[..] () () () ST ST ST () -S_ST () -_ST () -_ST (,) TV_OMP V (,) PNL_LK (,) PNL_T (,) -GP_STP (,) -GP_USY V R V R V. R _% R.K R.K R R R K G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G -GE -GE -GE -GE S S S S S S S S GPVREF R _% M_OUT R R K XOUT K R RSET-M R R T T SSOUT -SUS_M K H H J J K K L L N P P R R T T U N R P R R T T U V W W Y Y N U P U G G F M N V V W W E E M V Y Y F E M V M M K J J K J K G G K J H J H E E U /E# /E# /E# /E# PILK RST# REQ# GNT# PR STOP# EVSEL# TRY# IRY# FRME# INT# WF# RF# _STF STF_ S_STF S S S S S S S S ST ST ST S_STS STS_ STS_ GPREF GPTEST I_LO I_HI GPX_ET# RSET _R Y_G OMP_ HSY VSY LK T SSIN SSOUT XTLIN XTLOUT TESTEN G SUS_STT# H STP_GP# H GP_USY# G M+X Part of PI / GP GPX X GP X LK SS MN PWR VO / EXT TMS / GPIO LVS TMS THERM GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO VOMOE ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LT ZV_LNTL ZV_LNTL ZV_LNTL ZV_LNTL TXOUT_LN TXOUT_LP TXOUT_LN TXOUT_LP TXOUT_LN TXOUT_LP TXOUT_LN TXOUT_LP TXLK_LN TXLK_LP TXOUT_UN TXOUT_UP TXOUT_UN TXOUT_UP TXOUT_UN TXOUT_UP TXOUT_UN TXOUT_UP TXLK_UN TXLK_UP IGON LON TXM TXP TXM TXP TXM TXP TXM TXP LK T HP R G HSY VSY RSET T LK UXWIN PLUS MINUS J H J K H F J K H J H H G G G F F E H J K H K J H J H J K H E G F E F E G F E F G F J K J H G K H H J H J K H K J G F G F F E H G F G E G J H J H J K H K E E F K J J G H H F F F F E VG_GPIO VG_GPIO VG_GPIO VG_GPIO ZV_LT TI_EN TXM TXP TXM TXP TXM TXP TXM TXP VI_SLK VI_ST VI_ETET M_RSET VG_UXWIN T T T T T T T T T T T T MLK_SS () R R *K R *K R T T T T T T T T T T T T T T T T T T T T T T T T T ROUT- () ROUT+ () ROUT- () ROUT+ () ROUT- () ROUT+ () T T RLK- () RLK+ () ROUT- () ROUT+ () ROUT- () ROUT+ () ROUT- () ROUT+ () T T RLK- () RLK+ () -TI_ENL (,) RT_R (,) RT_G (,) RT_ (,) HSY (,) VSY (,) (,) (,) R T T T T T T T T T T R PLUS () MINUS () _% K K V R select VRM : H : M L : M R select Vendor : L : SMSUNG H : Hynix VRM GPVREF (,,) -SUS V *.U V. R K_%.U R K_% Q NE () TI_EN VG_GPIO VG_GPIO VG_GPIO VG_GPIO V ZV_LT R K -SUS_M.U V R K RP KX R U NLOGE Y MHZ(TX) P pf/ppm close to M LV (.) TI M+X Size ocument Number Rev ustom JE. Main oard THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. ate: 星期一, 十一月, Sheet of K XTLIN IN OUT IN ON/OFF TIGU--T V R.U efault : External Gfx Internal Gfx : Remove all components Except for U,,R,,,, R,R M.U.U/V/YV XTLOUT P.U QUNT OMPUTER

17 THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. MEMORY IO VOLTGE =.V Remove all components. efault : External Gfx Internal Gfx : TI M+X ustom JE. Main oard 星期一, 十一月, Size ocument Number Rev ate: Sheet of QUNT OMPUTER VM VM VM VM VM VM VQM VM VM VQS VM VM VM VM VM VM VM VM VM VM VM VM VM VM VQS VM VQM VM VM VM VM VM VM VQS VQS VQS VM VM VM VM VM VM VQS VQS R_VREF VM VM VM VQS VM VM VM VQM VM VQM VQM VM VM VQS VM VQM VM VM VM VM VM VM VM VM VM VM VM VM VM VQS VM VM VM VM MEMTEST VM VM VM VM VM VM VM VQS VM VM VM VM VM VM VM VM VM VM VQS VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VQM VM VM VM VM VQS VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VQM VM VM VM VM VM VM VM VM VQM VQM VM VQM VM VM VM VQM VM VM VM VM VM VM VQS VM VM VM VM VQM VM VM VM VQS VM VQM VM VQS VQM VM VM VM VM VM VM VM VM VM VM VQM VM VM VM VM VG_MEM VG_MEM R_VREF VWE# () VRMLK () VS# () VRMLK# () VS# () VRMLK# () VRMLK# () VS# () VS# () VRMLK# () VWE# () VKE () VRMLK () VRMLK () VKE () VRMLK () VRS# () VRS# () VQS[..] () VM[..] () VQM[..] () VM[..] () VM[..] () VM[..] () VQM[..] () VQS[..] () V. V. R._% MEMORY INTERFE Part of U M+X L L K K J H H G G E E G G F G F E F E F E F E F E F E F E E E F F E F F E F F E J F E F E J F F E F E E E F Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q M M M M M M M M M M M M M M QM# QM# QM# QM# QM# QM# QM# QM# QS QS QS QS QS QS QS QS RS# S# WE# S# S# KE LK LK# LK LK# MVREF IM_ IM_ MEMORY INTERFE Part of U M+X F E G G F E G H H J K K L L G F H E F J F H U U U V W W Y Y U V V V W Y Y E E E E E N M M L L M M P N K K J P P E J G W W F K G V W R T T R R R N N T T F P E Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q M M M M M M M M M M M M M M QM# QM# QM# QM# QM# QM# QM# QM# QS QS QS QS QS QS QS QS RS# S# WE# S# S# KE LK LK# LK LK# ROMS# MEMVMOE_ MEMVMOE_ MEMTEST IM_ IM_ R.K R.K.U R K_% R K_% *.U

18 THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. For M+X pin (m) (m) (m) (m) (.) (m) (TMS) (I/O) (m) (m) (m) (m) Remove all components. efault : External Gfx Internal Gfx : TI M+X ustom JE. Main oard 星期一, 十一月, Size ocument Number Rev ate: Sheet of QUNT OMPUTER _MLK.._VG _MEMPLL. _PLL. V. V _MEMPLL. _PLL. V.._VG V. V. V. V. V. V. _MLK. V. V. U/V U/V U/V U/V U/V U/V.U U/V U/V.U U/V L MN-- *U/V Part of I/O POWER U M+X E F G G G G G G G H H H H H H J J J E F E E J E F F E K J F F G H G G H F H H E F L J J J L M N N R R T J F N F M K J N P P T T T U V V W Y E F M M E E H T V V V G J J E T N P Y Y L H H R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R LP LR_ LR_ LR_ LR_ LP LR LR LR LR TP TP TXR TXR TXR TXR TXR Q N I Q R R R R R R R R R LKF R R RH RH RH RH MP MP P P R R R R P P P P P P P P P P P P P P P P P P P P I Q I N R R R R R R R R R N P I R R R LKF R R R R R R R R R ORE Part of UE M+X F G G G G G G H H H H H H H H H H K K K K L M M M N N N P R R R R R T T U U U V W W W W W Y K K K E G G G G G G G J J K K E Part of POWER/ UF M+X P P P U U U U U U V V V V V V N N N W W W W W N N M M M N M M P P P M M N N P P R R R R R R R T T T W V V U U T T T T W W M R T.U.U.U.U.U.U.U P.U P.U.U.U P P.U.U.U P P P.U.U.U.U.U.U.U.U P P.U.U.U.U P P.U P U/V/YV P.U U/V P.U P.U U/V/YV.U.U P L MN-- L MN--.U.U P U/V U/V.U U/V/YV U/V R

19 THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS-- Hynix -HYUF(P) Hynix -HYUF(P) Samsung KE-V Samsung KE-V Remove all components. efault : External Gfx Internal Gfx : VG R VRMx / ustom JE. Main oard 星期一, 十一月, Size ocument Number Rev ate: Sheet of QUNT OMPUTER VM VRS# VS# VWE# VS# VKE VRMREF VKE VRMREF VRMREF VRMREF VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VRS# VS# VWE# VS# VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VQM VQS VQM VQS VQM VQS VQM VQS VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VQM VQS VQM VQS VQS VQM VQM VQS VM[..] () VM[..] () VQM[..] () VQS[..] () VRMLK# () VRMLK () VRS# () VWE# () VRMLK# () VS# () VRMLK () VS# () VKE () V. V. V. V. V. V. R R R K_% R K_%.U.U.U.U.U.U.U.U.U P P R K_% R K_%.U.U.U.U.U.U P.U.U P.U U RMX-G M M L M M L M M M L K J J H H F F E E E E F F H H J J K K K K E E J J J J M L G G M L K K L L M M L G G F F H H J J E E F F G K K G H H J J L G G K K K L L L M E E E E F F F F G G G G H H H H (P) Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q QM QM QM QM S# RS# S# WE# LK LK# KE VREF QS QS QS QS Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q ML U RMX-G M M L M M L M M M L K J J H H F F E E E E F F H H J J K K K K E E J J J J M L G G M L K K L L M M L G G F F H H J J E E F F G K K G H H J J L G G K K K L L L M E E E E F F F F G G G G H H H H (P) Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q QM QM QM QM S# RS# S# WE# LK LK# KE VREF QS QS QS QS Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q ML

20 THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS-- Hynix -HYUF(P) Hynix -HYUF(P) Samsung KE-V Samsung KE-V Remove all components. efault : External Gfx Internal Gfx : If M VRM of M+X only install U,U VG R VRMx / ustom JE. Main oard 星期一, 十一月, Size ocument Number Rev ate: Sheet of QUNT OMPUTER VM VRS# VS# VWE# VS# VKE VRMREF VKE VRMREF VRMREF VRMREF VRS# VS# VWE# VS# VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VQS VQM VQM VQS VQM VQS VQM VQS VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VM VQM VQS VQM VQS VQS VQM VQS VQM VM[..] () VM[..] () VQM[..] () VQS[..] () VRMLK# () VRMLK () VRS# () VWE# () VRMLK# () VS# () VRMLK () VS# () VKE () V. V. V. V. V. V. R U RMX-G M M L M M L M M M L K J J H H F F E E E E F F H H J J K K K K E E J J J J M L G G M L K K L L M M L G G F F H H J J E E F F G K K G H H J J L G G K K K L L L M E E E E F F F F G G G G H H H H (P) Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q QM QM QM QM S# RS# S# WE# LK LK# KE VREF QS QS QS QS Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q ML R.U.U.U.U.U.U.U.U P P R K_% R K_%.U R K_% R K_%.U.U.U.U.U.U.U.U.U P P U RMX-G M M L M M L M M M L K J J H H F F E E E E F F H H J J K K K K E E J J J J M L G G M L K K L L M M L G G F F H H J J E E F F G K K G H H J J L G G K K K L L L M E E E E F F F F G G G G H H H H (P) Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q QM QM QM QM S# RS# S# WE# LK LK# KE VREF QS QS QS QS Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q ML

21 FN UNIT MLK (MHZ) SPRE SPETRUM LOGI LK SS ~MHZ L *MN--S *.U V *.U () VFN R K V + - V U LM_M R Q FNN FNV_ U/V/YV P ON FN () XTLIN () XTLOUT V XTLIN XTLOUT R *K R * *.U U XIN/LKIN *P LKOUT P# LF *P-SR REF MOOUT R * MLK_SS () R * M_OUT ().U R K + - U LM_M R K V R K.U/V/YV R U V LERT SMLK SMT T_RIT_ + - LM- V M_SMLK M_SMT.U P PLUS () MINUS () efault : External Gfx. Internal Gfx : Remove LM circuit. V V V V R K R K (,,) MT Q NE M_SMT (,,) MLK Q NE M_SMLK THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. QUNT OMPUTER GP SS / FN Size ocument Number Rev ustom JE. Main oard ate: 星期一, 十一月, Sheet of

22 THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS-- TI ~ms~ TI- (RUS++MS) JE. Main oard 星期六, 十一月, Size ocument Number Rev ate: Sheet of QUNT OMPUTER TP# TP TP# TP _XI TPIS _XO VPLL TPIS TP S OTP TP R SL TP# TP# R -GRST VR_PORT M_PWR MS_S MS_T MS_SIO MS_T M_# MS_T MS_LK_R PS _XI _XO _FIL _FIL MS_LE OTP# OTP OTP# -GRST MS_T MS_T MS_T MS_SIO MS_S MS_LK M_PWR MS_LE M_# MS_LK MS_LK_R [..] (,,,,,) -SERR (,,,,) ISEL_ () -E (,,,,,) -REQ () -E (,,,,) -PISPK () -INT (,,) _LOK () -STOP (,,,,) -FRME (,,,,) -TRY (,,,,) -E (,,,,) -IRY (,,,,) -PME (,,,) -INT (,,) _LTH () -PERR (,,,) -SUSPEN () PR (,,,,) -EVSEL (,,,,) -INT (,,) -E (,,,,,) -GNT () PLK_ () _T () SERIRQ (,,) -INT (,,) -PIRST (,,,,,,,) -SUSRST (,) -WLSW (,) -WLLE () MSLK_M () VSUS VSUS VSUS _V VSUS VSUS VSUS _V VSUS VSUS VSUS _V VSUS VSUS VSUS VSUS VSUS V V P P R._% R._% R.K_% U/V/YV P P Y.M/pF/ppm(TX) R._% R._%.U ON -MOLEX(-) LP *RFMFMT R.K_%.U R K R.K LP *RFMFMT T R K T R.K R.K L MN--P R K.U R.K.U T.U R K.U R K.U PI//MS PORTION U G G T P U U T P V U W U R V W U N V W U V N R V W V W R W V U N R W N W R P U V T R W U V R W U V N P R U M M M L L L J J J K K K L L R U V U W V W V V W V W V P N U U T T P R L R W V K L R U T U M L M M L N N N M P L L G H H J K K M M G G J V W M N H H H V J K F F G G G E H G M N P P R U H J J K K K E F J J J H H H J R U R W V V PR /E# /E# /E# /E# ISEL REQ# GNT# FRME# IRY# TRY# EVSEL# STOP# PERR# SERR# GRST# PRST# PILK V V V TPIS TPN TPP TPN TPP TPIS TPN TPP TPN TPP PS TEST(P) TEST(P) FIL XO XI SUSPEN# RI_OUT#/PME# SPKROUT# N R R SL S PHY_TEST_M VPLL VSPLL FIL T LOK LTH MFU MFU MFU MFU MFU MFU MFU LK VR_EN# V V V V V V V V V V VP VP V V TEST(P) VR_PORT VR_PORT M_PWR_TRL_ MS_S MS_T MS_SIO(T) MS_T M # MS_T MS_LK RSV RSV RSV RSV RSV RSV M # M_PWR_TRL_ S_T S_T S_T S_T S_M S_LK S_WP# TEST GN GN GN U NMUFLEMT V SL S R R R R K R K R.U/V/YV.U P L MN--P.U P.U P.U.U.U.U.U R K RS.S U *TPSK REST# *.U R * R ON - R *P R

23 THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS-- TI- (RUS++MS) ustom JE. Main oard 星期一, 十一月, Size ocument Number Rev ate: Sheet of QUNT OMPUTER E# E# E# E# [..] () E#[..] () GNT# () LK () SERR# () INT# () UIO () STSHG () REQ# () VS () RSV/ () IRY# () EVSEL# () PR () RSV/ () TRY# () VS () RSV/ () PERR# () LKRUN# () # () STOP# () LOK# () RST# () FRME# () # () V.U.U R RUS PORTION U PI P P P M M N N L M M L L L L K K K H F H F G E F F E E M K G H E J G G H J H E H J N F K F E E F G E E E E F G F E E F E K N J _/E# _/E# _/E# _/E# _LK _LKRUN# _RST# _PR _FRME# _IRY# _TRY# _STOP# _EVSEL# _REQ# _GNT# _PERR# _SERR# _INT# _STSHG _UIO _# _# _VS _VS V V V V _/E# _/E# _/E# _/E# _LK _LKRUN# _RST# _PR _FRME# _IRY# _TRY# _STOP# _EVSEL# _REQ# _GNT# _PERR# _SERR# _INT# _STSHG _UIO _# _# _VS _VS _RSV/ _RSV/ _RSV/ _RSV/ _RSV/ _RSV/ _LOK# _LOK# R K RS.S R K R K

24 () [..] () E#[..] ardus power switch chip U L ML--P-N () () () () () () E# () () () () () E# () PR () PERR# () GNT# () INT# V VPP () LK () IRY# () E# () () () () () () () () () () () RSV/ () LKRUN# L ML--P-N ON _# #_ () () () RSV/ () () () VS () () () () RSV/ () LOK# () STOP# () EVSEL# () V VPP TRY# () FRME# () () () VS () RST# () SERR# () REQ# () E# () UIO () STSHG () () () () V _# #_ () _T () _LOK () _LTH -SUSRST VSUS R K VPP L ML--P-N RS.S R R P P T LOK LTH RESET# O# SHN# VPP V V # () # () TPS V V.V V V.U.U U VSUS U/V/YV VPP.U R K V V U/V VSUS U/V/YV U/V R-MP(-) VSUS R Q K (,,,,,,,) -PIRST TEU -SUSRST -SUSRST (,) (,) PMRSTEN THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS-- QUNT OMPUTER RUS SLOT Size ocument Number Rev JE. Main oard ate: 星期一, 十一月, Sheet of

25 THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. RTLL PI LN JE. Main oard 星期一, 十一月, Size ocument Number Rev ate: Sheet of QUNT OMPUTER LK_LN_X LN_RTSET ISOLTE VTRL LK_LN_X R+ R- VTRL R+ T+ T- R- T- T+ -E (,,,,,) -E (,,,,) -E (,,,,) -E (,,,,,) PLK_LN () PR (,,,,) -SERR (,,,,) -PERR (,,,) -STOP (,,,,) -IRY (,,,,) -TRY (,,,,) -FRME (,,,,) -REQ () -GNT () -INT (,,) -EVSEL (,,,,) ISEL_LN () -PIRST (,,,,,,,) -PME (,,,) [..] (,,,,,) VSUS VSUS V VSUS VSUS VSUS VSUS VSUS.U R.K_% U T I S SK O ORG V P.U.U.U U/V.U.U/V/YV *.U/V.U.U U RTL E FRME IRY TRY EVSEL STOP PERR SERR PR E UX EES EESK EEI EEO E LE LE LE ISOLTE TX+ TX- RXIN+ RXIN- RTSET LWKE RTT X X PME VTRL INT RST LK GNT REQ E ISEL.U.U.U R K.U.U R *K Y MHz/pF/ppm R.K_% P R K.U.U R._% R._% R * *.U.U ON HRS-TMR T T+ T- R+ R- R SHIEL SHIEL R._%.U R._% Q SK

26 () M_OE.U V R K R K V R *K R K R * R * R R * U/V/YV +V.U.U/V/YV.U/V/YV R K R K R R () VOL_MUTE VOUT_R () VOUT_L () U RN Y *.MHz(TX) *P (,) SOUT (,) ITLK () SIN (,) SY (,) -RST *P P UIO-XI UIO-XO R R.U/XR.U.U.U XTL_IN XTL_OUT ST_OUT IT_LK ST_IN SY RESET# /PEEP SPIF EP I I HP_OUT_R HP_OUT_L MONO_OUT U OE PHONE UX_L UX_R JS JS _L R MI MI LINE_IN_L LINE_IN_R LINE_OUT_R LINE_OUT_L FILT FILT FILT FILT VREFOUT VREF UIOVREF.U/V/YV.U/V/YV +V +V R * *.U R * *P *P P P VREFOUT () U/V/YV +.U.U + U/V/YV LINEOUT_R () LINEOUT_L () () -PISPK () PSPK.U +V U SETFU R * R () PHONE K.U.U *.U *.U.U.U.U.U.U.U U/.V *P R R *K EXTMI () SPRY THE RIGE ON THE GP OF / UNIFORMLY. ) U,U,Q,L N U PLE ON THE GP OF /. ) NLOG INPUT PITORS N E ELETE WHEN NO USE FTER EVT. ) => MOUNT,,R,R; REMOVE ;,,,=PF..U +V R.U/V/YV.K_% R K_% U OUT SET MX.U.U IN SHN V Vout=Vset{+R(,)/R(,gnd)} Vset=.V.U.U/V/YV P P P *P P P P R ) L => MOUNT ; REMOVE,,R,R;,=PF. Vout=.(+K/K)=.V Vout=.(+.K/K)=.V Vout=.(+.K/K)=.V udio L Size ocument Number Rev JE. Main oard THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. ate: 星期一, 十一月, Sheet of QUNT OMPUTER

27 udio amplifier _V _V VPU Q TEU * _V R K SPKPLG R K VOLMUTE R K () LINEOUT_L () LINEOUT_R GIN GIN V(inv) d d.d.d _V GIN _V _V GIN _V R K U TSHFU R R * VOLMUTE.U R *K R K.U.U.U GIN GIN U/V/YV.U -SHN SE/-TL HP/-LINE L_IN+ LINE_INL L_HP_IN EEP R_IN+ LINE_INR R_HP_IN GIN GIN YPSS.U.U U TI-TP P P LOUT+ LOUT_ U/.V INSPKL+ INSPKL+ () INSPKL- INSPKL- () ROUT- ROUT+ U/V/YV () VOLMUTE + INSPKR- INSPKR+ + U/.V R K R INSPK_L+ INSPKR- () INSPKR+ () R INSPK_R+ R K TEU Q U RN Toshiba VOL_MUTE R R L L VOL_MUTE () MN--L MN--L *UZ. P P EXTERNL SPEKER INSPK+L INSPK+R SPKPLG ON PHONEJK R K R *K (,) REFV +V +V () VREFOUT R K *U/V/YV R *K R.K R.K R K P + - R *K () VREFOUT EXTMI ().U R R K_% V P K_% V _V + - U LM..U P U R K P U/V/YV P P R K *P U LM. R *K R R *K + - U LM Q SI L *MN--R U/V.U.U L MN--L P +V *UZ. LP R R.K.K U/V/YV EX PHONEJK ON EXTERNL MI + - U LM UIO MP Size ocument Number Rev JE. Main oard THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. ate: 星期一, 十一月, Sheet of QUNT OMPUTER

28 (,) -WLSW R () PLK_MP () -REQ (,,,,,) (,,,,,) (,,,,,) (,,,,,) (,,,,,) -E (,,,,) (,,,,,) (,,,,) (,,,,) (,,,,) -E (,,,,) -IRY (,,) -LKRUN (,,,,) -SERR (,,,) -PERR (,,,,) -E (,,,,,) (,,,,,) (,,,,) (,,,,) (,,,,,) (,,,,,) (,,,,,) (,,,,,) V -WLSW_R.U V V MINIPI-MP(-) ON TIP RING LN LN LN LN LN LN LN LN LE_GP LE_YP LE_GN LE_YN -INT +V +V -INT R(IRQ) R(IRQ) +VUX PILK -RST +V -REQ -GNT +V -PME (V) +V (V) -E ISEL PR -E -IRY +V -FRME -LKRUN -TRY -SERR -STOP +V -PERR -EVSEL -E -E +V +V (V) +V (V) SERIRQ SY MEN SIN SOUT ITLK SIN -_PRIMRY -RESET EEP -MPIK +MI +SPK -MI -SPK -RI +V +VUX V V VSUS VSUS -WLSW -INT (,,) -PIRST (,,,,,,,) -GNT () -PME (,,,) (,,,,,) (,,,,,) (,,,,,) (,,,,,) ISEL_MP () (,,,,,) (,,,,,) PR (,,,,) (,,,,) (,,,,) -FRME (,,,,) -TRY (,,,,) -STOP (,,,,) -EVSEL (,,,,) (,,,,) (,,,,) (,,,,) (,,,,) -E (,,,,,) (,,,,,) (,,,,,) (,,,,,) (,,,,,) SERIRQ (,,) Q TEU (,) SOUT (,) -RST -WLLE () VSUS R MOEMSPKR *.U R *K ON MONO_OUT/P_EEP UX_RIGHT UX_LEFT RIGHT _LEFT.V_UX.V ST OUT RESET# MSTRLK M-MP(-) *SS M U *RN +V (Hight.mm) UIO_PWRN MONO_PHONE RESERVE V RESERVE RESERVE RESERVE RESERVE RESERVE _SY _ST_IN _ST_IN _ITLK U *RN R *K R *K *P *U/V/YV *.U MOEMSPKR R R *.K PHONE () V V VSUS SY (,) SIN () ITLK (,) *.U *U/.V VSUS *.U ON RING -WLSW -WLSW_R V TIP RJ(-) V VSUS V ON R * *.U U V Y *SNLVG *.U FI-S-P-HF-T.U.U.U.U.U.U.U U/.V MiniPI & M Size ocument Number Rev JE. Main oard THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. ate: 星期一, 十一月, Sheet of QUNT OMPUTER

29 RT V RV P Y P V..K/pF/PPM V (,) S[..] VPU R R R.K M.K K_X K_X S S S S S S S S VRT_ RV U MOT V X K X EXTRM RL# INT# RST# S R/-W S S# QLF mil V_RT Z R R K R K V S (,) -IRQ () RT_S () RT_RW () RT_S () PWROK (,) U/V VRT () NPWROK V N_PWRG () PWROK (,) V PWRG_PU () R R R R.K K K K VRT Q MMT R SM R SM J SHORT_P.U Q NE P H-IP P H-IP R R R K U/V/YV R K P H-IP U TSHFU P H-IP R.K Q NE P P H-EXPH-EXP Q NE P H-EXP R K T ML-SOKET P H-EXP P P H-IP H-RXP P H-SIP P H-SIP P H-IP P H-IP._VG P H-IP V V. V VSUS V. VSUS VORE.VSUS V VTT_MEM p p p p p P H-IP V V V. VSUS V. V. VTT_MEM V VSUS V p p p p p p p p p p P H-IP P P P P P P P H-EXP H-IP H-IP H-EXP H-IP H-IP H-IP P H-IP p VSUS p p VSUS p V.VSUS VSUS V V.VSUS V V. p p p p p p p p RT/POWER GOO LOGI Size ocument Number Rev JE. Main oard THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. ate: 星期一, 十一月, Sheet of QUNT OMPUTER

30 -ROM ONNETOR H ONNETOR PRINTER port THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. (Hight.mm) (Hight mm) IE/H/LPT onnector JE. Main oard 星期一, 十一月, Size ocument Number Rev ate: Sheet of QUNT OMPUTER RIRQ RS RS -RSS RS RS RS RS RS RS RS RS RSIORY -RSIOW -IERST RS RS RS RS RSREQ -RSS -RSK RS RS RS RS -RSIOR RS RSIORY RSREQ RS RSIORY RSREQ RP RP RP RP RP RP RP RPREQ -RPIOW -RPIOR RPIORY -RPK RP RP RP RP RP RP RP RP RP RP -RPS -RPS RP -IERST -IERST RS -RSS -RSS RS RPREQ RP RPIORY RP RP -RPIOR RPREQ RP RP RPIORY RS RS RS RS RS -ST P -K P P P_PE PE P_USY USY SLT P P_K P_SLT -ERR -F P P -SLIN P -INIT P PE USY -K P P P P -SLIN P -INIT -ST P SLT -IERST RIRQ RIRQ RP RIRQ RIRQ RIRQ RS RS P -ERR P -F -RPK P_SLT P_PE P_USY P_K S[..] P[..] P[..] RP RP RP -RPS RP RS -RSIOR RP RP RP RS RS RP -RPS RP -RPIOW RS RS -RSIOW RP -RSK RP RS RS RP RS RS RP RS RP RP HRSTEN () PREQ () SREQ () SIORY () -HLE () PIORY () -INIT () -SLIN () -ST () -F () USY () -K () -ERR () PE () P () P () P () P () P () P () P () P () SLT () IRQ () IRQ () P () P () S () S () S () S () S () S () S () -SS () S () S () -SS () -PIOR () -PK () P () P () S[..] () P[..] () P[..] () -PIRST (,,,,,,,) P () P () P () -PS () P () S () -SIOR () P () P () P () S () S () P () -PS () P () -PIOW () S () S () -SIOW () P () -SK () P () S () S () P () S () S () P () S () P () P () V V V V V V V V V V.U.U R *K R K R.K_% R K R *K U/V/YV R R R R R K R K R.K_% R ON OPTIL ONNETOR R U/V/YV.U U/V/YV P P P P P P P P P P R P P ON LPT-FOX P P P P P R.K U/V/YV.U R R R.K R.K ON JE(SP--) RP X RP X RP X RP X RP X RP X RP X RP X RP X RP X RP X RP X RP X RP X RP X RP X RP.KX RP.KX RP.KX RP.KX U SET *UZ. SS

31 (,) REFV L U/V/YV MN--P REF_V.U VPU VPU R.K VPU R.K VPU R.K [..] [..] [..] () [..] () -_ROMS -_ROMS () -ROMOE -ROMOE () -ROMWE -ROMWE () Model I VPU P (,) S[..] (,) S[..] VPU VPU X Y.K/PPM(TX) R K U U/V/YV WZ.U.U S[..] S[..] (,) EN () -IOR () -IOW () IOHRY (,) -ROMS () -MEMR () -MEMW () IRQ () -SI () IRQ.U R K P HMR.U S S S S S S S S S S S S S S S S S S S S S S S S S S S VRT VPU NPWROK PMUX PMUX R M HMR SS VRT H H H H H H H H H H H H H H H H H/P H/P H/PE.U H H H H H H H H HEN/FXST# HIOR# HIOW# HIOHRY HMEMS#/P HMEMR#/P HMEMWR#/P HMR IRQ IRQ# IRQ IRQ VT PFIL# HPWRON KX KX MX[..] MY[..] VREF () -NSWON V V V V (,,) -SUS () IN () -SUS MX[..] () MY[..] () V -NSWON KSIN KSIN KSIN KSIN MX MX SS SS SS KSIN KSIN KSIN KSIN MX MX MX MX MX MX VPU Q TEU -HOL U P Ver: KSOUT KSOUT KSOUT KSOUT KSOUT KSOUT KSOUT KSOUT MY MY MY MY MY MY MY MY MY MY MY MY MY MY R K KSOUT KSOUT /E /E /PG KSOUT KSOUT KSOUT KSOUT KSOUT KSOUT MY MY /P /P /PE PSLK PST SEL# R# WR# PSLK PST () -PROHOT V R K Q MMT KT KLK MST MSLK V P/RING P/SL P/S P/T P/T P/G P/HRSTO P/SWIN P/EXINT P/EXTINT -NSWON -NUMLE -HOL PU_I -WLSW For debug only -PPROHOT P P P P/EXINT P/PSLK P/PST P/ P/ P/ P/ P/ P/ P/MINON P/HWPG PF/ PF/ PF/ PF/ PF/ PF/ PF/ PF/ PG/SELIO# PG/LK PG/SEL# PG/WR# PH/ST PH/ST PH/ST PH/PFS# PH/PLI# PH/ISE# R K T T T T PMRSTEN (,) MLK (,,) MT (,,) FN-SIG () FN-SIG () KG () -R () -NSWON () -NUMLE () RV_ON (,) -SROLE () -PPROHOT NPWROK NPWROK () -SLEEPLE () -PSLE () R PU NS Size ocument Number Rev JE. Main oard THIS PRT SHOUL NOT ONTIN NY SUSTES WHIH RE SPEIFYE IN SS--. ate: 星期一, 十一月, Sheet of R K R K R K R K MT MLK TLK TT KLK KT MSLK MST PU_I -PWRLE () IN () TLK () TT ().U TV () -WLSW (,) -T_PRS () ISENS_IN () -SUS () -SUS () HWPG (,,,).U /- () -HGEN () HRSTEN () TLE () VOLMUTE () REFON () VFN () RIGHT () VFN () VFN () VRON () SUSON (,) MINON (,,) K SS SS SS SS -NSWON () -KSMI () -TLOW () -SUSPEN ().KX QUNT OMPUTER R VPU RP.KX V RP V

P/N : 31KT3MB0046 CPU VR CLOCKS (ICS94225) Page : 6. Page : 28 LVDS. LCD CONN Page : 12. CRT Page : 19. TV Page : 12 33MHZ, 3.

P/N : 31KT3MB0046 CPU VR CLOCKS (ICS94225) Page : 6. Page : 28 LVDS. LCD CONN Page : 12. CRT Page : 19. TV Page : 12 33MHZ, 3. KT(Full-Feature) P/N : KTM00 /TT ONNETOR PGE: TT HRGER M thlon/uron Socket PU VR Page : LOKS (IS) Page : FNs Page : PGE: Page :, Port Replicator / PGE:, R-SOIMM Page : 0 R-SOIMM Page : 0 MHZ R TI Mobliity

More information

VIA Apollo ProMedia Board Schematics

VIA Apollo ProMedia Board Schematics VI pollo ProMedia oard Schematics 0TF TITLE SHEET No. OVER SHEET SOKET 0 PROESSOR, NORTH RIGE VT0/, SOUTH RIGE VT/, LOK SYNTHESIZER GTL+ US N PULL UP RESISTORS SRM IMM SLOTS / 0 PI SLOT & PI SLOT PI SLOT

More information

+12V R16 100K +12V R17 100K R19 R18 100K 100K AVPP BVPP C21. C20 0.1uF. 0.1uF NOTES:

+12V R16 100K +12V R17 100K R19 R18 100K 100K AVPP BVPP C21. C20 0.1uF. 0.1uF NOTES: +V +V R 00K U S S G G SI.V +V V _VPPEN _VPPEN0 _VEN _VEN0 _VPPEN _VPPEN0 _VEN _VEN0 R0 00K R 00K + 0uF _VPPEN _VPPEN0 _VEN _VEN0 _VPPEN _VPPEN0 _VEN _VEN0 V 0.uF U VIN VPPIN VPP0 VPP V0 V VPP0 VPP V0 V

More information

+12V R17 100K +12V R18 100K R19 100K R20 100K AVPP BVPP. C21 0.1uF. C20 0.1uF NOTES:

+12V R17 100K +12V R18 100K R19 100K R20 100K AVPP BVPP. C21 0.1uF. C20 0.1uF NOTES: +V +V R 00K U S S G G SI.V +V V _VPPEN _VPPEN0 _VEN _VEN0 _VPPEN _VPPEN0 _VEN _VEN0 R 00K R 00K + 0uF _VPPEN _VPPEN0 _VEN _VEN0 _VPPEN _VPPEN0 _VEN _VEN0 V U VIN VPPIN VPP0 VPP V0 V VPP0 VPP V0 V SHN 0

More information

NV11,4Mx16 DDR, RGB, INTERNAL DVI-I, AGP.

NV11,4Mx16 DDR, RGB, INTERNAL DVI-I, AGP. . NV.V 00PF 00PF 00PF 0.UF 0.UF 0.UF 0.UF 0UF 0UF 0 0.UF 0.UF.V TO- -pin package Semtech Z, Unisem US0 00 NV O- RG-PWR-IN.V@ /- 0mV 0UF 00PF 00PF 0 00PF 0UF 00PF 0UF 0 0.UF 0 00PF 0.UF 0 O0 U POWR SNS

More information

RSC CHIP VDD P05 P03 P01 P04 VDD GND PWM0 AVDD VDD AVDD P0-2 P0-5 P0-1 P0-6 P0-4 P0.3 GND P00. Y1 3.58MHz P00 P01 AGND P01 P00 P02 P02 P07 P0-0 P0-7

RSC CHIP VDD P05 P03 P01 P04 VDD GND PWM0 AVDD VDD AVDD P0-2 P0-5 P0-1 P0-6 P0-4 P0.3 GND P00. Y1 3.58MHz P00 P01 AGND P01 P00 P02 P02 P07 P0-0 P0-7 Place as close to pins of U as possible. RS HIP 0-00 RS-x emo/evaluation oard: RS-000 Thursday, ecember, 00 Size ocument Number Rev ate: Sheet of P XI P0 P0 P0 P0 P00 PN P0 P0 P0 P0 P0 P0 P0 P0 P XO -XM

More information

Headers for all pins sorted by pin no. (unpopulated) TSX-1001 Cortex-M0. Oscillator 44MHz

Headers for all pins sorted by pin no. (unpopulated) TSX-1001 Cortex-M0. Oscillator 44MHz V V Way type onnector US Type onnector x.v.v Regulators Headers for all pins sorted by pin no. (unpopulated) Prototyping area with power and GNs (unpopulated) RS Transceiver US to Serial onverter Expansion

More information

CD-DET TP5_CS- LCDPWR RFPWR CHPD5 GP05 GP25 RST5 L13 D12 D11 D10 LCD_MISO LCD5_MOSI LCD5_SCK SD5_CS- LCD_MISO LCD5_MOSI LCD5_SCK SD5_CS-

CD-DET TP5_CS- LCDPWR RFPWR CHPD5 GP05 GP25 RST5 L13 D12 D11 D10 LCD_MISO LCD5_MOSI LCD5_SCK SD5_CS- LCD_MISO LCD5_MOSI LCD5_SCK SD5_CS- SPST SW L 0uH.uF TP HEER NO STUFF TP 0 HEER NO STUFF TP TP pf Y.uF.uF 0 HEER NO STUFF 0 HEER NO STUFF MHz, 0ppm pf.uf (OUT) (IN) R 0K /W % 0uF OUT OUT OUT OUT KLT L 0 L_MISO L_MOSI L_SK S_S- L_S- L_- L_

More information

HOSCO HOSCI AS M AS M C1 18P C2 18P C1 18P C2 18P GND VCC3 GPIOK7 R82 R82 10K A20 10K. #OffHook. FmHook #TRANSLED. VxBP 0.1U 0.

HOSCO HOSCI AS M AS M C1 18P C2 18P C1 18P C2 18P GND VCC3 GPIOK7 R82 R82 10K A20 10K. #OffHook. FmHook #TRANSLED. VxBP 0.1U 0. 0 #E0 GPIOK #MWR #MR #FWE HOSI KEYI0 GPIO0 HOSO V V VREFI KEYI GPIO GPIO_ V KEYO GPIO #E OUTR MIIN VMI GPIO_0 #LON V #HOL 0 0 #E KEYO GPIO 0 KEYO0 GPIO GPIO_ GPIO_0 #MR #MWR V V V V TSEL #E #E0 V HOSI

More information

J1B B1 B3 B5 B7 B9 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B35 B37 B39 B41 B43 B45 B47 B49 B51 B53 B55 B57 VCC VCC USB_DET

J1B B1 B3 B5 B7 B9 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B35 B37 B39 B41 B43 B45 B47 B49 B51 B53 B55 B57 VCC VCC USB_DET GP0 GP0 GP0 P0 GP0 GP GP GP GP GP GP GP P GP0 GP GP GP GP GP GP GP GP0 GP GP GP GP GP GP GP GP0 GP GP GP GP GP GP GP GP0 GP GP GP GP GP GP GP GP00 UINO ONE PIN EFINE GP0 GP GP GP GP GP GP GP GP0 GP GP

More information

VRAM VRAM VRAM VRAM EXT. VGA NV18M/34M/36M 1.25V 10A NVVDD 10A POWER CONN NVFBC 6A

VRAM VRAM VRAM VRAM EXT. VGA NV18M/34M/36M 1.25V 10A NVVDD 10A POWER CONN NVFBC 6A lock iagram 00// VRM VRM VRM VRM VRM US VRM US LVS ET. VG GP US L/INV NN NVM/M/M ( ption ) TL PGE 0..VHT :00m.V :00m.VUL:0m.VT :.0m.V :00m :00m VUL :0m V :m VUL :m G EI GP NN PGE 0.0. L V RT S-VIE INV

More information

A B C D TXD[15:0] TXD10 TXPAR 2.2K R38 RA12 1 RA13 AD10 +3V J98 PHY_INT HSERR R70 PRST TXPAR. ATM Physical Local Bus. Local Bus Interface.

A B C D TXD[15:0] TXD10 TXPAR 2.2K R38 RA12 1 RA13 AD10 +3V J98 PHY_INT HSERR R70 PRST TXPAR. ATM Physical Local Bus. Local Bus Interface. S J TXR0 TXR TXR TXR[:0] TXR TXR LK TX[:0] TX0 TX TX0 TX TX TX TX TX TX TX TX TX TX TX TX TX R 0K R 0K J J0 PIV R 0K TXPR R0. H/E0 H/E H/E TXLV TXSO J J HRST HLK HPERR HGNT HISEL HEVSEL HSTOP HTRY HIRY

More information

AD2_BUSY AD2_DIN AD2_DOUT AD2_/CS AD1_/CS AD1_DOUT AD1_DIN AD_SCLK AD_CCLK AD_OSC_EN AD1_BUSY AD_CONVERT GNDIO - P115

AD2_BUSY AD2_DIN AD2_DOUT AD2_/CS AD1_/CS AD1_DOUT AD1_DIN AD_SCLK AD_CCLK AD_OSC_EN AD1_BUSY AD_CONVERT GNDIO - P115 PL ENOER OUNTER / PWM MOTOR ONTROL / GLUE LOGI PL YPSS PITORS LE0 LE LE LE ESTOP_U ESTOP_IRQ _USY _IN _OUT _/S _/S _OUT _IN _SLK 0.uF +.V 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF P0.[0:] [0:] 0 P0. P0. P0. P0.

More information

COVER PAGE, TOP 04 ~ 05 VGA, LED, 7SEGMENT

COVER PAGE, TOP 04 ~ 05 VGA, LED, 7SEGMENT LTER YLONE III EP evelopment & Education OR SHEMTI ONTENT PGE TOP MEMORY OVER PGE, TOP SRM,FLSH 0 ~ 0 0 ~ 0 ISPLY VG, LE, SEGMENT 0 ~ 0 IN/OUT LOK, PS, RS, UTTON, SWITH, ONNETOR,S R 0 ~ FPG yclone II EP

More information

core Tiny6410.sch DM9000 DM9000-etc.sch AC97 AC97-etc.sch USB HUB USB-HUB.sch Tiny6410SDK 1103

core Tiny6410.sch DM9000 DM9000-etc.sch AC97 AC97-etc.sch USB HUB USB-HUB.sch Tiny6410SDK 1103 core Tiny0.sch M000 M000-etc.sch -etc.sch US HU US-HU.sch Tiny0SK 0 M_ VV V V V V V V V V V VN VSYN VLK VUS OTGI OTGM OTGP IN0 S_LK S_n S_T0 S_T OUT0 INT INT INT RST ( 红色 ) Tiny0 Tiny0 P Power Supply S

More information

Generated by Foxit PDF Creator Foxit Software For evaluation only.

Generated by Foxit PDF Creator Foxit Software   For evaluation only. I_ST I_SLK K_% R K_% R L_0 L_ L_ L_ KEY TON_STHL /F NN_ NN_ P M VS OUTL P OUTR VR MIIN VREF V HOSI LOSI R X pf LOSO.KHZ M_% pf HOSO X pf MHz HOSI 0 pf POWER Generated by Foxit PF reator Foxit Software

More information

QUANTA COMPUTER INC.

QUANTA COMPUTER INC. QUNT OMPUTER IN. PGE ontent PGE ontent 0 0 0 T PGE OVER T LOK IGRM NW/PS (HOST US) NW/PS (POWER/N) MH (Host bus) MH (GP bus & HU I/F) GMH (PWR & GN) GMH R- & R- IH-M(PU,PI,IE) IH-M (US,HU,LP) IH-M(POWER&GN)

More information

#1 10P/DIL NORTH #3 #3 #3 #3 #3 #3 #3 #3 R198 RES0603 RES0603 DNP DNP DNP RES0603 RES0603 RES SDI_N 3-SDO_N 3-ALERT_N 3-CS_N 3-SCLK_N 3-CONV_N

#1 10P/DIL NORTH #3 #3 #3 #3 #3 #3 #3 #3 R198 RES0603 RES0603 DNP DNP DNP RES0603 RES0603 RES SDI_N 3-SDO_N 3-ALERT_N 3-CS_N 3-SCLK_N 3-CONV_N P REVISION REOR J SP88 0 - RE N_JK P 90-00_-POS TP # - Remove these components to stack north # - Populate these components to stack north Use k Resistors or adjust as needed Header - Molex 90-0 PITORS,

More information

INDEX/ RESET& EEPROM JINPIN ELECTRICAL COMPANY LTD.ZHUHAI.S.E.Z SF_CE SF_SO SF_CLK SF_SI SF_CE SF_SO SF_CLK SF_SI PC_SCL PC_SDA SCL SDA RST

INDEX/ RESET& EEPROM JINPIN ELECTRICAL COMPANY LTD.ZHUHAI.S.E.Z SF_CE SF_SO SF_CLK SF_SI SF_CE SF_SO SF_CLK SF_SI PC_SCL PC_SDA SCL SDA RST N Updata /N P. R.K R 00 R 00 R.K P_SL P_S V R K SF_E U PMVF00 E SO WP VSS V HOL SK SI SF_LK V 0.UF/V SF_E SF_LK P_SL P_S SL S V SL' S' SF_E SF_LK P_SL P_S SL S V SL' S' U T 0 V WP SL S SL' S' 0.UF/V R

More information

PCB NO. DM205A SOM-128-EX VER:0.6

PCB NO. DM205A SOM-128-EX VER:0.6 V. M0 M M M M M M M MQM0 MQS0N MQS0P M M M0 M M M M M MQM MQSN MQSP U RM R0 Q00 M0 U Q0 M T Q0 M R Q0 M U Q0 M U Q0 M T Q0 M T Q0 M T M0 M U QS0N M U QS0P M0 M W0 Q0 M W Q0 M V0 Q0 M U0 Q M W Q W Q 0 V

More information

A L A BA M A L A W R E V IE W

A L A BA M A L A W R E V IE W A L A BA M A L A W R E V IE W Volume 52 Fall 2000 Number 1 B E F O R E D I S A B I L I T Y C I V I L R I G HT S : C I V I L W A R P E N S I O N S A N D TH E P O L I T I C S O F D I S A B I L I T Y I N

More information

Am186CC and Am186CH POTS Line Card

Am186CC and Am186CH POTS Line Card RVISION HISTORY RV. T INITILS.0 // JSK m and mh POTS Line ard Reference esign NOT: The purpose of this design is to illustrate how to connect some of the M digital blocks together. It is not intended to

More information

Sirius-Rx-232. Sirius-Tx-232. SIRIUS-Rx. STATUS Prog RC-5. SIRIUS-Rx. Prog RCA-5 DAB-SDA DAB-SCL STAYUS AM-SMETER POWER-ON POWER-ON CE-PLL

Sirius-Rx-232. Sirius-Tx-232. SIRIUS-Rx. STATUS Prog RC-5. SIRIUS-Rx. Prog RCA-5 DAB-SDA DAB-SCL STAYUS AM-SMETER POWER-ON POWER-ON CE-PLL UIO-OUT& U&.SH Sirius-Tx- +V-SY Sirius-Rx- -S -SL - S MU MU.SH M&M M&M.SH M ST M-SMETER E-PLL +V- +V- T-IN T-IN T-LK +V-STY +V-STY T-OUT ate: -Sep-00 Sheet of ile: :\aa\t. rawn y: RS-Tx RS-Rx R- STYUS

More information

Service Information. Service. Service. Service FW-V220. Product Service Group CE Audio A02-160

Service Information. Service. Service. Service FW-V220. Product Service Group CE Audio A02-160 Service Service Service W-V0 0-0 Product Service Group udio Service Information lready published Service Informations: ORRTION TO SRVI MNUL elow are corrections to the circuit diagram parts list: OMI OR

More information

Project: Date. Version. Items V1.01 C C. SIM Technology TITLE DRAWN BY PORJECT. SIM800C+SIM28M_VTS Reference CONTENT VER CHECKED BY SIZE V1.

Project: Date. Version. Items V1.01 C C. SIM Technology TITLE DRAWN BY PORJECT. SIM800C+SIM28M_VTS Reference CONTENT VER CHECKED BY SIZE V1. Project: ate Version Items V.0 RWN Y PORJET SIM800+SIM8M_VTS Reference ONTENT HEKE Y V.0 SHEET of 7 POWER POWER -0V F0 0 L0 VIN LO X0 SM0 SWRH07 uh T-PIN-X TVS0 Z0 + 0 VT U0 VZ=V,Pd=W SM7 00uF V GN VOUT

More information

ZCRMZN00100KITG. Crimzon Development Board Kit. Product User Guide. Introduction. Kit Contents. Applying Power to Development Board

ZCRMZN00100KITG. Crimzon Development Board Kit. Product User Guide. Introduction. Kit Contents. Applying Power to Development Board ZRMZN0000KITG rimzon evelopment oard Kit PUG000-0 Product User Guide Introduction Zilog s ZRMZN0000KITG rimzon evelopment oard Kit is designed for use as a target with the rimzon In-ircuit Emulator (ZRMZNIE0ZEMG).

More information

R2 44.2K_1% 5DVCC 5DVCC GND COMP SS24 DW1. EC2 470uF/16V. 470uF/16V 内内内内内内 DW2; 去去 U103,L9 33V. 33V C15 NC/10uF 33V C17 D2 NC/UDZ33B-33V

R2 44.2K_1% 5DVCC 5DVCC GND COMP SS24 DW1. EC2 470uF/16V. 470uF/16V 内内内内内内 DW2; 去去 U103,L9 33V. 33V C15 NC/10uF 33V C17 D2 NC/UDZ33B-33V JK_P JP V V L 0u/N F FUSE() FUSE E 0uF/V E. V L 0u/N V 00nF 00nF V, R 00K 00nF U MP IN EN SS OMP 0nF S SW F 0.nF R K SW L u R.K_% R 0K_% V E 0uF/V V,,, ST-V V 00nF.uF 00P SS W ST-V E 0uF/V E 00nF TO U

More information

ISA INTERFACE & POWER SELECTION Size Document Number Rev Custom. XR82C684 EVAL BOARD 1.2 Date: Monday, August 13, 2007 DO NOT INSTALL CON_AT62B

ISA INTERFACE & POWER SELECTION Size Document Number Rev Custom. XR82C684 EVAL BOARD 1.2 Date: Monday, August 13, 2007 DO NOT INSTALL CON_AT62B IS_IRQ V._0._0._0 O NOT IS_IRQ R K_0._0.0_0 J J.0_0 0 RV_RESET V RV_RESET V TP J IS TEST._0 TP V X [0..] [0..] GN GN -I/O H K RESRV V 0 IRQ V -V REQ -V U 0WS 0 0 V 0 -IO_HRY._0 GN -I/O H RY 0 -SMEMW EN

More information

VREF XREF=1/A1,1/B2,7/A2 C103 AVDD 0.1U VDDCORE DRVDD VDDIO ENC+ ENC- AIN+ OVR EC2 XREF=2/B2 XREF=2/B2 XREF=2/B2 XREF=2/A1 XREF=1/A1,7/B1 XREF=2/B2

VREF XREF=1/A1,1/B2,7/A2 C103 AVDD 0.1U VDDCORE DRVDD VDDIO ENC+ ENC- AIN+ OVR EC2 XREF=2/B2 XREF=2/B2 XREF=2/B2 XREF=2/A1 XREF=1/A1,7/B1 XREF=2/B2 --00_: RV;E,F,G,H,J,K,L,M,N,P,R V;H,H,J,J,K,K,L,L,M,M,N,N,P,P V;,,,,,,,E,E,F,F,G,G SMOE MOE S EXP EXP EXP0 HIPI HIIPI HIPI HIPI0 EXTFILTER GN_ GN_0 IN- IN+ EN- EN+ VREF V_ES N RY PLK PULK LK SYN SYN SYN

More information

A B C D REVISIONS +3V J39 PHY_INT TXD15 TXPAR PRST AC16 AC21 AD22 AF22 AE22 AF17 AC22 AE16 AE21 AD18 AE7 AD17 AE19 AE20 AF20 AC20 A16 B13 TXD14

A B C D REVISIONS +3V J39 PHY_INT TXD15 TXPAR PRST AC16 AC21 AD22 AF22 AE22 AF17 AC22 AE16 AE21 AD18 AE7 AD17 AE19 AE20 AF20 AC20 A16 B13 TXD14 A ISIONS ZONE LTR ESRIPTION ATE APPROVE A INITIAL RELEASE --_0:0 J 0 0 0,,,, AF JP PAR [:0] ON PIV 0 SO LAV EN LK PHYS M LK STAT_A M0 M R R R R R R R 0K J J AR AR[:0] AR AR AR AR0 AR AR[:0] AR AR AR AR0

More information

MSP430F16x Processor

MSP430F16x Processor MSP0x Processor V_. V_ V_. U Vcc Vcc R 0K SW, ETHER_T_00, ETHER_T_0, ETHER_T_0, ETHER_T_0, ETHER_T_0, ETHER_T_0, ETHER_T_0, ETHER_T_0 P.0/TLK P./T0 P./T P./T P./SMLK P./T0 P./T P./T /RST/NMI 0.u P UTTON_

More information

REVISION HISTORY DESCRIPTION INITIAL SCHEMATIC AIY REMOVED ANALOG SWITCHES CHANGED FEEDBACK

REVISION HISTORY DESCRIPTION INITIAL SCHEMATIC AIY REMOVED ANALOG SWITCHES CHANGED FEEDBACK REVISION HISTORY Notes - Unless otherwise noted. Resistances values in Ohms. apacitance values in micrarads (uf). ll 0.uF and 0.0uF capactors are decoupling and should be placed near the I they are shown

More information

KEIm Baseboard. PAGE DESCRIPTION 1 Block Diagram, History 2 SoM Connector. 3 LCD Connector. 4 Ethernet. 5 UART 6 Analog 7 Peripheral 8 Power

KEIm Baseboard. PAGE DESCRIPTION 1 Block Diagram, History 2 SoM Connector. 3 LCD Connector. 4 Ethernet. 5 UART 6 Analog 7 Peripheral 8 Power KEIm aseboard REV TE PGES ESRIPTION.0.0 Oct//0 ll INITIL REVISION RELESE..0 Feb//0 ll MP REVISION RELESE PGE ESRIPTION lock iagram, History SoM onnector L onnector Ethernet URT nalog Peripheral Power KONO

More information

Reference Schematic for LAN9252-SPI/SQI+GPIO16 Mode

Reference Schematic for LAN9252-SPI/SQI+GPIO16 Mode Reference Schematic for LN-SPI/SQI+GPIO Mode onfigurations SPI/SQI+GPIO Mode EEPROM - F (High) Port mode Port0 & Port = opper Page No. Schematic Page Title Power Supply LN(Part) LN(Part), Strap & EEPROM

More information

SVS 5V & 3V. isplsi_2032lv

SVS 5V & 3V. isplsi_2032lv PU 000pF 000pF 000pF 0 000pF 000pF 000pF 000pF 000pF 000pF 000pF 000pF 000pF 000pF 0 000pF 000pF 000pF 000pF 000pF 000pF 000pF FLSH.0uF.0uF.0uF 0.0uF ata uffer.0uf.0uf.0uf.0uf SVS V & V.0uF.0uF.0uF isplsi_0lv.0uf.0uf

More information

GIGABYTE GA-6OXT Reference Schematics

GIGABYTE GA-6OXT Reference Schematics E GIGYTE G-OXT Reference Schematics Revision :.0 TITLE OVER SHEET INTEL PIII SOKET-0 GMH (INTEL EP ) SRM SOKET (IMM,IMM,IMM) GP SLOT IH (INTEL 0) LOK SYNTHESIZER PI SLOTS ( PI,PI,PI,PI,PI ) FWH ( SST SL00

More information

DISPLAY 1 DISPLAY 2 a. a b. a f. a f. b g. c d. c d. 16 x 2 HD44780 BASED ALPHANUMERIC DISPLAY LCD 16 X 2

DISPLAY 1 DISPLAY 2 a. a b. a f. a f. b g. c d. c d. 16 x 2 HD44780 BASED ALPHANUMERIC DISPLAY LCD 16 X 2 SEGMENT LE ISPLY R MUX MUX MUX MUX R nf SEG_ SEG_ SEG_ SEG_ SEG_ SEG_ SEG_ SEG_ U R xt P P P P P P P P MX MX ss SL S P P P P P P P P nf S SEG_SL SEG_S SEG_ SEG_ SEG_ SEG_ SEG_ SEG_ SEG_ SEG_ SEG_I_SL_

More information

Quickfilter Development Board, QF4A512 - DK

Quickfilter Development Board, QF4A512 - DK Quickfilter evelopment oard, QF - K nalog Inputs - U +.V +.V J N hannel J N hannel J N hannel J N hannel U +.V +.V U +.V U +.V Prototyping rea J J Optional +V External Power x Header 0." US onnector U

More information

AS1117M3 or LM1117MPX-ADJ ADJ. C20 0.1uF + C56. + C57 10uF. 10 uf R K 1% R18 GND 10.0K 1%

AS1117M3 or LM1117MPX-ADJ ADJ. C20 0.1uF + C56. + C57 10uF. 10 uf R K 1% R18 GND 10.0K 1% K POWER SW JP EXTERNL POWER FUSE 0. uf VT 0 uf R SM or LMMPX-J VIN VOUT U 0.0K % J R.K % 0uF REG_V 0 0.uF REG_V J PV PV_US_TGT V_M0X POWER_SELET R0 0Ohm V to V ENTER POSITIVE.

More information

CLKOUT CLKOUT VCC CLKOUT RESOUT OSCOUT ALE TEST AD0 66 AD2 INT0 INT0 AD INT1 AD INT2/INTA0 AD5 AD7 AD7 INT AD8 AD8 AD10

CLKOUT CLKOUT VCC CLKOUT RESOUT OSCOUT ALE TEST AD0 66 AD2 INT0 INT0 AD INT1 AD INT2/INTA0 AD5 AD7 AD7 INT AD8 AD8 AD10 I U N R 00K RSIN* RST S N.0u Y LK TP RP K L TP USY INT0 INT RISMINT P.0 P. P. P. P. P. P. RY OL RX0 TX0 T P.0 P. P. P. S* S* S* S* RROR* SLK U LKIN LKOUT LKOUT LKIN LKOUT OSOUT 0 OSOUT L L RSIN* L 0 0

More information

POWER Size Document Number Rev Date: Friday, December 13, 2002

POWER Size Document Number Rev Date: Friday, December 13, 2002 R0 [ /W 0 0.00uF/00V - D0 KP0M L0 L D0 N 0 00uF/00V 0 0.uF R0 M [ /W R0 M [ /W R0 M [ /W R0 M [ /W 0 0.00uF/KV D0 PS0R 0 0uF R0 00K [ W D0 FR0 R0 0 [ /W O O T0 O,, POWER X'FMR 0, D0 DQ0 R [ /W 0.00uF/00V

More information

CONTENTS: REVISION HISTORY: NOTES:

CONTENTS: REVISION HISTORY: NOTES: ONTENTS: PGE - ONTENTS PGE - POWER, XOS PGE - SI, SI, JTG PGE - S/eMM, US, HMI, GPIO, OMPOSITE PGE - SOIMM REVISION HISTORY: V.0 - /0/0 NOTES: These reduced schematics omit core SMPS and LPR circuitry

More information

HF SuperPacker Pro 100W Amp Version 3

HF SuperPacker Pro 100W Amp Version 3 HF SuperPacker Pro 00W mp Version Revised 0 0 V Stamps KOOR This is the third generation HF SuperPacker Pro 00W Version home construction project offered by HF Projects. This is a group construction project

More information

1 INDEX & POWER, RESET 2 RF, SERVO & MPEG - MT1389E 3 MEMORY - SDRAM, FLASH/EEPROM 4 VIDEO OUT 5 AUDIO DAC WMA8766

1 INDEX & POWER, RESET 2 RF, SERVO & MPEG - MT1389E 3 MEMORY - SDRAM, FLASH/EEPROM 4 VIDEO OUT 5 AUDIO DAC WMA8766 OMMON_H_V MT (LQFP) V emo oard for Sanyo Slim H PUH INX & PO, ST F, SVO & MPG - MT MMOY - SM, FLSH/POM VIO OUT UIO WM NM TYP VI igital V SUPPLY V igital.v MT FV Servo.V MT LO_V Laser iode.v F V PIKUP H

More information

L13X DAUGHTER CARDS TABLE OF CONTENTS REV SL NO. TABLE OF CONTENTS VERSION VERSION HISTORY BLOCK DIAGRAM 4 UART-0 INTERFACE

L13X DAUGHTER CARDS TABLE OF CONTENTS REV SL NO. TABLE OF CONTENTS VERSION VERSION HISTORY BLOCK DIAGRAM 4 UART-0 INTERFACE LX UGHTER RS TLE OF ONTENTS SL NO. ONTENTS PGE NO REV TLE OF ONTENTS VERSION HISTORY VERSION.0.. LOK IGRM URT-0 INTERFE N US INTERFE URT INTERFE PROFI US & SOFT IR INTERFE SOFT URTS REV NO. NTURE OF HNGE

More information

Cover Sheet. Block Diagram DDR SLOT DDR TERMINATOR AGP SLOT PCI SLOTS LAN CONTROLLER

Cover Sheet. Block Diagram DDR SLOT DDR TERMINATOR AGP SLOT PCI SLOTS LAN CONTROLLER over Sheet lock iagram MIN LOK EN & R LOK UFFER MS- VERSION: SIS / HIPSET Willamette/Northwood pin mp- Processor Schematics mp- INTEL PU Sockets SIS / NORTH RIE R SLOT R TERMINTOR - - SIS SOUTH RIE - PU:

More information

8V Title SCHEMATIC, 8V89317EVB REV A. Date: Friday, June 14, Power Supply. XTAL Interface. 12.8MHz TCXO/OCXO LED Status IN1 OUT1

8V Title SCHEMATIC, 8V89317EVB REV A. Date: Friday, June 14, Power Supply. XTAL Interface. 12.8MHz TCXO/OCXO LED Status IN1 OUT1 isclaimer: IT is providing this schematic for reference purposes only. lthough the schematic was taken from a known working design, it is being provided "as is" without any express or implied warranty

More information

AS1117M3 or LM1117MPX-ADJ REG_VDD ADJ. C20 0.1uF U6. + C57 10uF R K 1% GND 3.92K 1%

AS1117M3 or LM1117MPX-ADJ REG_VDD ADJ. C20 0.1uF U6. + C57 10uF R K 1% GND 3.92K 1% K POWER SW JP EXTERNL POWER FUSE 0. uf VT + 0 uf SM or LMMPX-J REG_V VIN VOUT + 0uF 0 0.uF U R 0.0K % J R.K % REG_V J PV PV_US_TGT V_M0X POWER_SELET R0 0Ohm V to V ENTER POSITIVE.

More information

3JTech PP TTL/RS232. User s Manual & Programming Guide

3JTech PP TTL/RS232. User s Manual & Programming Guide JTech PP-00 TTL/RS User s Manual & Programming Guide Revision. J Tech o., Ltd. Fu-Hsing N. Rd., F Taipei, Taiwan Tel: +--00 9 info@jtech.com.tw JTech (J Eng.), Inc. E. Valley lvd., Suite ity of Industry,

More information

DAC PLAY0 PLAY0 CT7601 DAC REC ADC REC RCA * 2. Power LDO RCA. RCA * 2 SPDIF output x2 RCA RCA RCA. Ext. MCU POR. PWM LED x 2. SPDIF input x 1.

DAC PLAY0 PLAY0 CT7601 DAC REC ADC REC RCA * 2. Power LDO RCA. RCA * 2 SPDIF output x2 RCA RCA RCA. Ext. MCU POR. PWM LED x 2. SPDIF input x 1. R * SPIF output x Power LO R * R R SPIF input x POR Flash PWM LE x PM00 Lightning() P 0x0 0pin Type connector US 0pin For Lightning & P T0 RE PLY0 PLY H Sel Stereo T0 PLY0 T0 0x PLY 0x PM00 R Ext. MU H

More information

GIGABYTE GA-8I848P Schematics

GIGABYTE GA-8I848P Schematics GIGYTE G-IP Schematics Revision.0 SHEET TITLE SHEET TITLE 0 0 0 0 0 0 0 0 0 0 0 OVER SHEET OM & P MOIFY HISTORY LOK IGRM P_ P_ P_ SPRINGLE HOST SPRINGLE R SPRINGLE GP, HU, S, VG SPRINGLE PWR R, HNNEL R

More information

MS Version 0A 06/21/2001 Update. CPU: Willamette/Northwood mpga-478b Processor. System Brookdale Chipset:

MS Version 0A 06/21/2001 Update. CPU: Willamette/Northwood mpga-478b Processor. System Brookdale Chipset: over lock iagram GPIO Spec. lock Y & T IE ONNETORS MS- Version // Update INTEL (R) rookdale hipset Willamette/Northwood pin mpg- Processor Schematics mpg- INTEL PU Sockets - INTEL rookdale MH -- North

More information

For max 243 R2OUT is low when R2IN is disconnected enabling the MAX 489 (RS-485) This will not work if MAX232 is used!

For max 243 R2OUT is low when R2IN is disconnected enabling the MAX 489 (RS-485) This will not work if MAX232 is used! JP RS_SELET V For max ROUT is low when RIN is disconnected enabling the MX (RS-) This will not work if MX is used! V On Front Panel -F (To Pg.) RS- RE_ RE_ RV_Y RV_Z 0.uF V U MXUK STR U- H G U MX 0 Y Z

More information

Design Overview. Page 2 Power,Flash,SDcard User switch,reset switch. Page 3 Ethernet. Page 4 Audio. Page 5 USB. Page 6 JTAG,BOOTSW,LED,Header

Design Overview. Page 2 Power,Flash,SDcard User switch,reset switch. Page 3 Ethernet. Page 4 Audio. Page 5 USB. Page 6 JTAG,BOOTSW,LED,Header esign Overview Page Power,Flash,Scard User switch,reset switch. Page Ethernet Page udio Page US Page JTG,OOTSW,LE,Header isclaimer: Schematic's are for reference only. provides no warranty for the use

More information

1K21 LED GR N +33V 604R VR? 1K0 -33V -33V 0R0 MUTE SWTH? JA? T1 T2 RL? +33V 100R A17 CB? 1N N RB? 2K0 QBI? OU T JE182 4K75 RB? 1N914 D?

1K21 LED GR N +33V 604R VR? 1K0 -33V -33V 0R0 MUTE SWTH? JA? T1 T2 RL? +33V 100R A17 CB? 1N N RB? 2K0 QBI? OU T JE182 4K75 RB? 1N914 D? L P.O. O X 0, N L R. PROROUH, ONRIO N KJ Y PHO N (0) FX (0) 0 WWW.RYSON. ate : Size : 000 File : OVRLL SHMI.Schoc Sheet : 0 of 0 Rev : rawn : 0.0 0K K 0K K 0K0 0K0 0K0 0K0 0K0 00K R K0 R K 0R??? 00N M?

More information

Realtek Semiconductor Corp. Title RTL8213(M)_FHG_V1.0

Realtek Semiconductor Corp. Title RTL8213(M)_FHG_V1.0 Fiber LE RJ M RYSTL EEPROM SRM & FLSH POWER PWRJK Jumper for GPIOs URT Realtek Semiconductor orp. RTL(M)_FHG_V.0 Size ocument Number Rev lock diagram.0 ate: Tuesday, November, 00 Sheet of ,, /ISGPIOSTP

More information

Reference Schematic for LAN9252-HBI-Multiplexed Mode

Reference Schematic for LAN9252-HBI-Multiplexed Mode Reference Schematic for LN-HI-Multiplexed Mode onfigurations HI Multiplexed mode EEPROM - F (High) Port mode Port0 & Port = opper Page No. Schematic Page Title Power Supply LN(Part) LN(Part), Strap & EEPROM

More information

HIgh Voltage chip Analysis Circuit (HIVAC)

HIgh Voltage chip Analysis Circuit (HIVAC) ate: esigner: RWING NO: SLE: SHEET: OF TOP MK HIgh Voltage chip nalysis ircuit (HIV) March H_I_RSEL H_I_RSEL H_I_SEL H_I_ H_I_ H_I_ H_I_SEL H_I_SW H_I_S H_I_S H_I_S H_I_P H_I_P H_I_P H_I_P H_I_PSH H_I_PSL

More information

PS2_B_CLOCK PS2_B_DATA PS2_A_CLOCK PS2_A_DATA UART_C_RXD UART_B_RXD UART_A_RXD UART_C_TXD UART_B_TXD UART_A_CTS UART_A_TXD UART_A_RTS GPIO[0:31]

PS2_B_CLOCK PS2_B_DATA PS2_A_CLOCK PS2_A_DATA UART_C_RXD UART_B_RXD UART_A_RXD UART_C_TXD UART_B_TXD UART_A_CTS UART_A_TXD UART_A_RTS GPIO[0:31] V. V. V. V. PI_RX URT LK URT TX PI_RX _TS_EXPHR _RX_EXPHR _RX_EXPHR Uarts URT TS URT RTS URT TX URT RX PS LOK PS T PS LOK PS T URT TX URT RX URT TX URT RX V. V. Ethernet ETH RX[0:] ETH RXV ETH RXER ETH

More information

A[0..14] A[0..15] D[0..7] A[0..15] D[0..7] D[0..7] R/W I/O Phi0 MAP R/W R/W. I/O Phi0 MAP. Phi0 MAP. ROMDIS Phi2. ROMDIS Phi2. Id: 1/

A[0..14] A[0..15] D[0..7] A[0..15] D[0..7] D[0..7] R/W I/O Phi0 MAP R/W R/W. I/O Phi0 MAP. Phi0 MAP. ROMDIS Phi2. ROMDIS Phi2. Id: 1/ Power power.sch udio SOUN_OUT audio.sch Phi P[0..] P[0..] Phi P[0..] P[0..] PU Phi P[0..] P[0..] [0..] [0..] I/O MP ROMIS Phi [0..] [0..] I/O MP ROMIS Phi UL [0..] [0..] VI_S MP ula.sch LUE RE SYN M[0..]

More information

RETICLE 2 NORTH SW2 DPDT SOUTH. LM339A TxD1 Out 11 U2D DEC PULSE 1 FOCUSER-2 3.0V 17 CCD EAST U2A AUX -6 FOCUSER-2 FOCUSER SW1 DPDT

RETICLE 2 NORTH SW2 DPDT SOUTH. LM339A TxD1 Out 11 U2D DEC PULSE 1 FOCUSER-2 3.0V 17 CCD EAST U2A AUX -6 FOCUSER-2 FOCUSER SW1 DPDT J KYP PWR J TX0\ RTIL RX0\ U V V NORTH V- NORTH/SH LM J RS V MIS XMIT LX00 XMIT LX00 RV MIS RV U SH V LM RN V V 0K J U LN 0 RX0\ 0 V TTRY LM Tx Out TX0\ Rx In Tx Out RTIL 0 Rx In U 0 V LM 0 PULS FOUSR-

More information

All use SMD component if possible

All use SMD component if possible R0 0K MF SW0 NEXT R0 0R LE0 STNY & POWER ON GN R0 SW0 PREV R 0 MF R 0 MF R 0K MF R0 K MF SW0 FF GN SNP OFF OR GN Q0 S Q0 S LE R k R k 00n R 0K MF M0 R0 K MF SW0 FR +V() Q0 R 0K MF GN R0 0 R 0 GN VF_on_off

More information

2.5V 1.2V / 1.5V CORE 3.3V I/O MOUNTING HOLES GROUND TESTPOINTS +5.0V DC IN. SoC Solutions FB2 R K C12 15 PF FERRITE_BEAD C14 C C13 2.

2.5V 1.2V / 1.5V CORE 3.3V I/O MOUNTING HOLES GROUND TESTPOINTS +5.0V DC IN. SoC Solutions FB2 R K C12 15 PF FERRITE_BEAD C14 C C13 2. +.0V IN J PJ-0 _ONN VUS JP JUMPERT VUS_FP 00 F FERRITE_E..V U TPS0 GN F TGN PF R.K % VP. R K %.V /.V ORE.V I/O U TPS0 JP VP JP HR VP_GL U TPS0 R.K LM0EM -. JP HR VORE_GL VORE. GN F TGN 0 PF R.K % R K %.

More information

Block Diagram SGTL5000 PG. 3. Power PG. 8. Communication PG.6. I2S Signals PG.7. Analog Inputs PG.4. Analog Outputs PG.5.

Block Diagram SGTL5000 PG. 3. Power PG. 8. Communication PG.6. I2S Signals PG.7. Analog Inputs PG.4. Analog Outputs PG.5. lock iagram I R Select I/SPI Mode Select MLK Source ommunication PG. US to I/SPI IS Signals PG. nalog Inputs PG. IS Interface Line-In / Microphone nalog Outputs PG. Headphone SGTL PG. igital Header P PSI

More information

C uF T16 VDD T15 TMS TMS MCU_PORT_VDD T14 TDO TDO T13 JCOMP JCOMP PF3 T12 PF3 T11 VDDE3 5.0V PF4 T10 PF4 PJ5 PJ5 PF6 PF6 PF9 PF9 5.0V 5.

C uF T16 VDD T15 TMS TMS MCU_PORT_VDD T14 TDO TDO T13 JCOMP JCOMP PF3 T12 PF3 T11 VDDE3 5.0V PF4 T10 PF4 PJ5 PJ5 PF6 PF6 PF9 PF9 5.0V 5. Size FSM No. WG No. Rev of 9 Galen Street Floor M 0 US MP0EMO Schematic -- MU and Symbol V V P P P P P 9 P0 0 P P P P0 VE V REFYP V P PK P P P 9 P 0 P0 P P P V P P P P9 P P P0 P P 9 P 0 P P P9 P P P P

More information

CP2102 TESTAMATIC SYSTEMS POWER 5V TO 3.3V SECTION PINOUT CHECK DECOUPLING CAPACITORS. Btype USB connector TSPL_PPS_1 2.2

CP2102 TESTAMATIC SYSTEMS POWER 5V TO 3.3V SECTION PINOUT CHECK DECOUPLING CAPACITORS. Btype USB connector TSPL_PPS_1 2.2 VUS R V_IN V TO.V SETION.V SI_RX SI_TX 0E R PINOUT HEK MINISM00F- Resettable Fuse F 00m WHITE 00nF U GN EN IN IN TPS PG nc OUT OUT 0k R 0.V 00nF Power_Good MIRO US IS INITE S ON TX RX 0.uF VUS TR RI GN

More information

PLAY0 CT7601 QFN48 REC ADC REC. Power LDO RCA RCA RCA*2. Ext. MCU RCA*2. SPDIF output. PWM LED x 2 POR. SPDIF input x 1 Flash. connector.

PLAY0 CT7601 QFN48 REC ADC REC. Power LDO RCA RCA RCA*2. Ext. MCU RCA*2. SPDIF output. PWM LED x 2 POR. SPDIF input x 1 Flash. connector. R SPIF output Power LO R SPIF input x Flash POR PWM LE x R* Lightning() P x pin Type connector US pin For Lightning & P T QFN RE PLY H Sel T PLY x PM Ext. MU H Sel T RE x S NE OP R* Size ocument

More information

CD300.

CD300. 00 Service Information www.laney.co.uk 9 9 -V J R9 N N N R R K K U/0V I R K U/0V R R R K K K N N R0 V U/0V 0 U/0V R 0K R 0K U/0V W 00K R9 M I R 00 U/0V 9 W W0K R 0K R K 0 0 R K W W0K K R0 MP K U/0V R 0K

More information

Virtex 5 FF1136 DUT. Single Ended Socket Clocks 2X. Differential SMA MGT Clocks 2X D. Differential SMA Clocks 2X. Upstream Connector.

Virtex 5 FF1136 DUT. Single Ended Socket Clocks 2X. Differential SMA MGT Clocks 2X D. Differential SMA Clocks 2X. Upstream Connector. PGE System Monitor ux PGE System Monitor PGE System ce Upstream PGE Upstream onnector PGE Single Ended Socket locks X PGE ifferential SM locks X PGE ifferential SM MGT locks X PGE - Power us and Switches

More information

PTN3356 Evaluation and Applicaiton Board Rev. 0.10

PTN3356 Evaluation and Applicaiton Board Rev. 0.10 E PTN Evaluation and pplicaiton oard Rev. 0.0 REVISION STORY : ------------------------------------- 0. June 0, 0 - ase on PTN_ONLY_REV.SN 0. July, 0 - OM changes due to long lead time items, LEs 0. July,

More information

Virtex 5 FF1760 DUT. Differential SMA Clocks 2X D. Single Ended Socket Clocks 2X. Upstream Connector. Upstream. Power Bus and Switches 5V

Virtex 5 FF1760 DUT. Differential SMA Clocks 2X D. Single Ended Socket Clocks 2X. Upstream Connector. Upstream. Power Bus and Switches 5V PGE System Monitor ux PGE System Monitor PGE System ce Upstream PGE Upstream onnector PGE Single Ended Socket locks X PGE ifferential SM locks X PGE -0 Power us and Switches V OR V JK RIK VINT VINT JK

More information

MS-6524 SIS 645/650 CHIPSET Willamette/Northwood 478pin mpga-b Processor Schematics

MS-6524 SIS 645/650 CHIPSET Willamette/Northwood 478pin mpga-b Processor Schematics Last Schematic Update ate: // MS- SIS / HIPSET Willamette/Northwood pin mpg- Processor Schematics PU: Willamette/Northwood mpg- Processor System rookdale hipset: SIS / (North ridge) + (South ridge) On

More information

D28 D28 1N4001 1N4001 R301 R375 R k. 10k R82 R82. 47k. 47k USB_IN. 20k. 20k R87 R87 +3V. C uF. C uF GND +1V8. C uF.

D28 D28 1N4001 1N4001 R301 R375 R k. 10k R82 R82. 47k. 47k USB_IN. 20k. 20k R87 R87 +3V. C uF. C uF GND +1V8. C uF. POWER_KEY POWER_OFF US_IN WKEUP H_ET HG_STTUS PLYKEY +VRT VT VUS +VRT LI_.V LI_.V VUS VT VTT VTT VTT +V +V +V +V VTT V +V T uf uf R k R k uf uf R k R k VIN VOUT U XPM U XPM Vbat ON ON ON ON KW ON/OFF KW

More information

U1-1 R5F72115D160FPV

U1-1 R5F72115D160FPV pf R NF_ X MHz, pf ON_XTL ON_EXTL R R NF_,,,, R NF_ R NF_ R R,,,, M M M_LK M_LK SEMn TI TMS TK TRSTn K R K R K R K R EXTL XTL M M M_LK M_LK TESTM SEMn TI TMS_WTX TK_WSK TRSTn_WRX U- RFFPV VREF VREFVSS

More information

AML7266-H. Feature table. Block Thursday, February 12, 2009 AMLOGIC AML7266-H. Main Chip: Internal: Video: Audio: Interfaces: UART USB HOST RJ45

AML7266-H. Feature table. Block Thursday, February 12, 2009 AMLOGIC AML7266-H. Main Chip: Internal: Video: Audio: Interfaces: UART USB HOST RJ45 ON Y Pb Pr is(smk,sk,slrk,s) MP U V V pin con to Mainboard IR MI MI U WM SMK,SK,SLRK MII_(ST) URT JTG con U ML-H SPI FLSH U MXL-G U NN FLSH KFGU Gb SL +.V/. POR LO U +.V RJ RMII Eth PHY U LN US HOST RMII

More information

S08P-LITE. 1 Title Page 2 Block Diagram 3 MCU & Arduino Headers 4 OSBDM & Power Supply 5 On-board Peripherials S08P-LITE. 23-Jun-17. V3.

S08P-LITE. 1 Title Page 2 Block Diagram 3 MCU & Arduino Headers 4 OSBDM & Power Supply 5 On-board Peripherials S08P-LITE. 23-Jun-17. V3. Title Page lock iagram MU & rduino Headers OSM & Power Supply On-board Peripherials Revisions Rev escription ate -Jun- V.0 -Feb- pproved Microcontroller Product Group 0 William annon rive West ustin, T

More information

[1,2,3,4,6] VBAT. Headset Battery [1] BAT-M VBAT_M [1,6] BAT_ON 10K R2002 [1] BAT_DET CS_N(VBAT-) VBAT- [1,6] J2003 BAT-4PIN-BM22-4P [1] VBAT_M

[1,2,3,4,6] VBAT. Headset Battery [1] BAT-M VBAT_M [1,6] BAT_ON 10K R2002 [1] BAT_DET CS_N(VBAT-) VBAT- [1,6] J2003 BAT-4PIN-BM22-4P [1] VBAT_M R00 R000 J00 MI-OS-T J000 MI-OS-T V T V T 0.u.V 0 J00 000 0.u.V R-00 MIIS0 MIIS0 [,,] [,] [,,,] [,] V0 V00 V0 p 00 00p 00 p 00 V0 VUS VIO T_HG_STT GPIO_HG_N 00 p 0 p 00 p 0 p 00p 0 00p 0 R0 R0 00K 0 LM0SN

More information

B1 AC V+ J2 120V J5V AC_HI -V_RLY A_ON +V DGND A_ON2 J1 230V uF/25V AC_LO J3 120V AC V- 2KPB06M DW G-S-290 R1 499R TE ND J ON

B1 AC V+ J2 120V J5V AC_HI -V_RLY A_ON +V DGND A_ON2 J1 230V uF/25V AC_LO J3 120V AC V- 2KPB06M DW G-S-290 R1 499R TE ND J ON 0 _HI _LO F J 0V J 0V J 0V T T-00-N V V- KP0M 00uF/V _ON V N JV J ON -V_LY _ON V N W-0---S-0 _ON N PW000-SFH P.O. OX 0, NL. PTOOUH, ONTIO N KJ Y PHON (0) - FX (0) -0 WWW.YSTON. LT 00 igital Power Supply

More information

P a g e 5 1 of R e p o r t P B 4 / 0 9

P a g e 5 1 of R e p o r t P B 4 / 0 9 P a g e 5 1 of R e p o r t P B 4 / 0 9 J A R T a l s o c o n c l u d e d t h a t a l t h o u g h t h e i n t e n t o f N e l s o n s r e h a b i l i t a t i o n p l a n i s t o e n h a n c e c o n n e

More information

Intel Edison. 7V to 15V Brick Power Supply. 4.4V power supply and battery recharger UART 1 USB 0TG. EDISON BREAKOUT BOARD Title Title page

Intel Edison. 7V to 15V Brick Power Supply. 4.4V power supply and battery recharger UART 1 USB 0TG. EDISON BREAKOUT BOARD Title Title page Intel Edison reakout Sept/0 V to V rick Power Supply V power supply and battery recharger SPI GPIO Intel Edison PWM I S URT 0 0" header US 0TG URT Level Shifter URT US FTI P P lient US Micro Type- lient

More information

X-USBPD-C-SHIELD. 2 Block Diagram 3 Type-C Connector 4 USB3/USB2 5 PTN5110 PD TCPC 6 Shield Headers 7 PD Source and Sink LS 8 3V3, 5V0, 1V8 Supplies

X-USBPD-C-SHIELD. 2 Block Diagram 3 Type-C Connector 4 USB3/USB2 5 PTN5110 PD TCPC 6 Shield Headers 7 PD Source and Sink LS 8 3V3, 5V0, 1V8 Supplies Table of ontents lock iagram Type- onnector US/US PTN0 P TP Shield Headers P Source and Sink LS V, V0, V Supplies Rev escription ate pproved Prototype Release -Mar- K ring up to NL and make updates requested

More information

On Hamiltonian Tetrahedralizations Of Convex Polyhedra

On Hamiltonian Tetrahedralizations Of Convex Polyhedra O Ht Ttrrzts O Cvx Pyr Frs C 1 Q-Hu D 2 C A W 3 1 Dprtt Cputr S T Uvrsty H K, H K, C. E: @s.u. 2 R & TV Trsss Ctr, Hu, C. E: q@163.t 3 Dprtt Cputr S, Mr Uvrsty Nwu St. J s, Nwu, C A1B 35. E: w@r.s.u. Astrt

More information

OTG_FS_VBUS OTG_FS_N OTG_FS_P OTG_FS_ID OTG_FS_OC OTG_FS_PWR OTG_FS_VBUS OTG_FS_N OTG_FS_P OTG_FS_ID OTG_FS_OC OTG_FS_PWR OLLO_SLEEP OLLO_SLEEP

OTG_FS_VBUS OTG_FS_N OTG_FS_P OTG_FS_ID OTG_FS_OC OTG_FS_PWR OTG_FS_VBUS OTG_FS_N OTG_FS_P OTG_FS_ID OTG_FS_OC OTG_FS_PWR OLLO_SLEEP OLLO_SLEEP MU ROOTIS / ORO MU_NRESET R_[0..] R_[0..] R_ R_ R_ R_ R_ R_0 R_0 R_ R_ R_ R_ R_ R_ OTG_S_VUS OTG_S_N OTG_S_P OTG_S_I OTG_S_O OTG_S_PWR OTG_S_I OTG_S_N OTG_S_P OTG_S_O OTG_S_VUS UT_USER UT_USER SW_USER

More information

176 5 t h Fl oo r. 337 P o ly me r Ma te ri al s

176 5 t h Fl oo r. 337 P o ly me r Ma te ri al s A g la di ou s F. L. 462 E l ec tr on ic D ev el op me nt A i ng er A.W.S. 371 C. A. M. A l ex an de r 236 A d mi ni st ra ti on R. H. (M rs ) A n dr ew s P. V. 326 O p ti ca l Tr an sm is si on A p ps

More information

J400 C UF,50V,20% V-STBY 10.0K,1%,1/4W R63 R61 1M,5%,1/4W V-STBY R K,1%,1/4W AC-OK RY3A R11INT 1 NC NO COM 47K,5%,1/4W R11

J400 C UF,50V,20% V-STBY 10.0K,1%,1/4W R63 R61 1M,5%,1/4W V-STBY R K,1%,1/4W AC-OK RY3A R11INT 1 NC NO COM 47K,5%,1/4W R11 MNL-PIN J MNL-PIN J MNL-PIN J MNL-PIN J J00-00 MNL-PIN J MV J MNL-PIN PHS-REF (Sh. ) IN-RET (Sh.,) -OK (Sh. ) HOT-IN 0V(US) 00V(INT) MV LIN-XFER (Sh. ) +V OOST (Sh. ) TRIM (Sh. ) MNL-PIN MNL-PIN 0V(US)

More information

Renesas Starter Kit for RL78/G13 CPU Board Schematics

Renesas Starter Kit for RL78/G13 CPU Board Schematics Renesas Starter Kit for RL/G PU oard Schematics REV REF TE RWN Y 0.0 raft.0.0 TES.00 Release.0.0 YOI.0 Release 0.0.0 YOI PGE ESRIPTION INEX RL/G Microcontroller Switches, LEs, RESET, PSU E, Serial Port

More information

M13 M14 FQP FFP VC1 VC2 VC3 MIX ATNEXPOT ADSR1 BM-VCF FAH1 FAW1 H W ATNEXPOT LFO FAH2 FAW2 H W +10VR FFP BP FQP FAH1 FAW1 FAH2 FAW2 R2 100K M15

M13 M14 FQP FFP VC1 VC2 VC3 MIX ATNEXPOT ADSR1 BM-VCF FAH1 FAW1 H W ATNEXPOT LFO FAH2 FAW2 H W +10VR FFP BP FQP FAH1 FAW1 FAH2 FAW2 R2 100K M15 MP_ MP_ MIIV JP HEE JP V0 V V V S_0 S_ S_0 S_ MIILK STTSTOP ESET SMP_ SMP_ HEE JP 0V 0V 0V 0V 0V 0V 0V 0V HEE X 000 JP9 000 MII VP VP 9 0 POTSLE POTH POTL POTSLE POTSLE POTH POTL POTSLE 9 0 HEE X 000 HEE

More information

othan RJ lock iagram PIN (micro F-PG) P,,, w, w inch XG, SXG+ / MHz VI M/M LVS L P LVS lviso GM/PM RII / UNUFFERE RII SOIMM P Hyper memory P,, R/G/ RT PIE Lanes P R/G/ PIN (micro FG) P,,, RII / UNUFFERE

More information

Exhibit 2-9/30/15 Invoice Filing Page 1841 of Page 3660 Docket No

Exhibit 2-9/30/15 Invoice Filing Page 1841 of Page 3660 Docket No xhibit 2-9/3/15 Invie Filing Pge 1841 f Pge 366 Dket. 44498 F u v 7? u ' 1 L ffi s xs L. s 91 S'.e q ; t w W yn S. s t = p '1 F? 5! 4 ` p V -', {} f6 3 j v > ; gl. li -. " F LL tfi = g us J 3 y 4 @" V)

More information

SYMETRIX INC th Avenue West Lynnwood, WA USA REV: DATE:

SYMETRIX INC th Avenue West Lynnwood, WA USA REV: DATE: R 0K0 RST U S_ PF/0V PF/0V 0FS FS T T 0SLK N SOT N SOT Y mhz U LS0 debug port 0 do not stuff R WR S PS X/Y IN/IN IR 0IR MO J R M R 0K0 R0 K00 R 0K0 dsck dr dsi dso / G 0 U LS0 R 0K0 SI_RX SI_TX SI_LK TFS

More information

DOCUMENT NUMBER PAGE SECRET

DOCUMENT NUMBER PAGE SECRET OUMENT NUMER PGE SERET / SERET OUMENT NUMER PGE / Spartan onfiguration SPI Flash Q S V W/VPP HOL VSS U MPVME R 0 R.K 0.U 9 IO_LP 0 IO_LN VREF_ G IO_L9P_ G IO_L9N_ F IO_L0P_ F IO_L0N_ IO_L9P_ IO_L9N_ 0

More information

PCBA Rev 80.L9581G001 PCBA P/N: PCB P/N: PCB Rev 00.L9581G001. Title Content Size Document Number Rev C. A Date: Tuesday, December 15, 2009 FLD1.

PCBA Rev 80.L9581G001 PCBA P/N: PCB P/N: PCB Rev 00.L9581G001. Title Content Size Document Number Rev C. A Date: Tuesday, December 15, 2009 FLD1. ontent : P0_ontent P0_lock_iagram P0_FPG_I/O_ P0_FPG_I/O_ P0_FPG_Power&Memory P0_External_onnector P0_M_REG P0_I_Level_Shift P0_MU P0_Power pprover Jim esigner enson rawer enson P P/N: P Rev 0.LG00 P P/N:

More information

Desired Part Placement. Max current set to 3A (motor Drive is 2.5A) SCI-DRV8814-MVK Mike Claassen B1 Dawn Ritz 40V. VDC_In GND. Board Test Points TP1

Desired Part Placement. Max current set to 3A (motor Drive is 2.5A) SCI-DRV8814-MVK Mike Claassen B1 Dawn Ritz 40V. VDC_In GND. Board Test Points TP1 SI_x_NLG_H_[:] P P SI_x_SPI_MISO SI_x_SPI_MOSI SI_x_SPI_LK SI_x_SPI_S FE/SI_OM_ FE/SI_OM_ FE/SI_OM_ FE/SI_OM_ SI_x_NLG_H_ SI_x_NLG_H_ SI_x_NLG_H_ SI_x_NLG_H_ SI_x_NLG_H_ SI_x_NLG_H_ SI_x_NLG_H_ SI_x_NLG_H_

More information

SCHEMATIC AD9265 CMOS EVALUATION BOARD REV. DRAWING NO. AD9265CE01A REVISIONS DESCRIPTION JUMPER TABLE RELAY CONTROL CHART A A DE N V C L O

SCHEMATIC AD9265 CMOS EVALUATION BOARD REV. DRAWING NO. AD9265CE01A REVISIONS DESCRIPTION JUMPER TABLE RELAY CONTROL CHART A A DE N V C L O THIS RWING IS THE PROPERTY OF NLOG EVIES IN. IT IS NOT TO E REPROUE OR OPIE, IN WHOLE OR IN PRT, OR USE IN FURNISHING INFORMTION TO OTHERS, OR FOR NY OTHER PURPOSE ETRIMENTL TO THE INTERESTS OF NLOG EVIES.

More information

Intel 100MHz Pentium(R) II processor/440gx AGPset Dual-Processor Customer Reference Schematics

Intel 100MHz Pentium(R) II processor/440gx AGPset Dual-Processor Customer Reference Schematics Revision.0 Intel 00MHz Pentium(R) II processor/0gx GPset ual-processor ustomer Reference Schematics TITL PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 PG OVR SHT LOK IGRM SLOT ONNTOR,,, LK SYNTHSIZR

More information

PA1A BLOCK DIAGRAM NWD/PRESCOTT / SPRINGDALE

PA1A BLOCK DIAGRAM NWD/PRESCOTT / SPRINGDALE P LOK IGRM NW/PRSOTT / SPRINGL /TT ONNTOR TT HRGR PG PG NW/PRSOTT Pins (Micro-FPG) PU Thermal Sensor PG locking K PG PU OR ISL PG, / MX PG PG R-SOIMM R-SOIMM Primary Master I - H PG HNNL R SRM.V, MHz.

More information

H NT Z N RT L 0 4 n f lt r h v d lt n r n, h p l," "Fl d nd fl d " ( n l d n l tr l t nt r t t n t nt t nt n fr n nl, th t l n r tr t nt. r d n f d rd n t th nd r nt r d t n th t th n r lth h v b n f

More information

THE UNIVERSITY OF NEWCASTLE University Drive Callaghan NSW 2308 Australia

THE UNIVERSITY OF NEWCASTLE University Drive Callaghan NSW 2308 Australia MicroL MicroLon.Sch Timers_nalog Timers_nalog.Sch IO ufferingsch IO uffering.sch Power Supply Power Supply.Sch Mitsubishi ackplane oard ate: THE UNIVERSITY OF NEWSTLE University rive allaghan NSW 0 ustralia

More information

05 - Adaptacion Puerto Serie RXD_UC R35 0 DTR_UC R36 0 RI_UC Adaptacion Puerto Serie Señalizacion GSM R37 0 INFO_NETLIGHT R38 0

05 - Adaptacion Puerto Serie RXD_UC R35 0 DTR_UC R36 0 RI_UC Adaptacion Puerto Serie Señalizacion GSM R37 0 INFO_NETLIGHT R38 0 0 - limentacion 0 - onector Externo 0 - daptacion Puerto Serie 0 - Modem SIM00 TT_VOLTGE VN_ TX TX_U RX_GSM RX_GSM HRGE_STTUS P. RX RX_U TX_GSM TX_GSM ST_ ST_ P. P. P. P. R 0 R 0 TR_U RI_U TR_GSM TR_GSM

More information

Virtex 5 FF1738 DUT. Single Ended Socket Clocks 2X. Differential SMA Clocks 2X. Differential SMA MGT Clocks 2X D. Upstream Connector.

Virtex 5 FF1738 DUT. Single Ended Socket Clocks 2X. Differential SMA Clocks 2X. Differential SMA MGT Clocks 2X D. Upstream Connector. PGE System Monitor ux PGE System Monitor PGE System ce Upstream PGE Upstream onnector PGE Single Ended Socket locks X PGE ifferential SM locks X PGE ifferential SM MGT locks X PGE 0- Power us and Switches

More information