VRAM VRAM VRAM VRAM EXT. VGA NV18M/34M/36M 1.25V 10A NVVDD 10A POWER CONN NVFBC 6A

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1 lock iagram 00// VRM VRM VRM VRM VRM US VRM US LVS ET. VG GP US L/INV NN NVM/M/M ( ption ) TL PGE 0..VHT :00m.V :00m.VUL:0m.VT :.0m.V :00m :00m VUL :0m V :m VUL :m G EI GP NN PGE 0.0. L V RT S-VIE INV TL.V 0. NV 0 PR NN.V.V NVF.V lock iagram QUNT MTER Size : ocument Number : Rev : ZP VG --- nvidia ate : Monday, February, 00 Sheet of 0

2 nvidia GP I/F.V 0 0.V SUSN.V RT_SENSE# PRST#0 GREQ# GST0 GST GRF# GI_HI S0 S GSST S S G G G G GST G G G G GE# GIRY# GEVSEL# GI_L GE# G G G0 G GST0 G G G G R G *0u/V-0 0u/V-0.u/V.u/V.u/V *.u/v *.u/v *0u/V-.u/0V-.u/0V- TV_/R TV_Y/G TV_MP SUSN.V N GP_LK R 0- PRST#0 ET# R FNN_QTS00-0 N VG_PR R 0K- R 0K- R 0- GP ver.0 GPQ GP ver.0 0mV GP ver.0 0mV R0 GP GSY# GPSTP# GST0# GST# GPLK GRESET# M_ET# PIRQ# GP_LK GGNT# GST ET# GWF# S S GSST# S S G0 G G G GST# G G0 G G GE# GFRME# GTRY# GSTP# GP_PME# GPR G G G G GE0# GST0# G G G G0 GP HSYN VSYN T LK SUS_STT# MINN E_LN LI# VJ PWRK R R GP_PME# SUS_STT# MINN E_LN LI# VJ PWRK V R./F 0- *0K- *0K- 0p- 0p- R K-.V R *00/F R *00/F For M/M unstuff For M/M unstuff T G0 G G G G G G G G G G0 G G G G G G G G G G0 G G G G G G G G G G0 G GE0# GE# GE# GE# GPLK GRESET# GREQ# GGNT# GFRME# GIRY# GTRY# GEVSEL# GSTP# GPR PIRQ# PIINT# GRF# GWF# GI_HI GI_L GST0 GST GST GST0 GST0# GST GST# GSST GSST# S0 S S S S S S S M_ET# GSY# GPSTP#.V J K H K J H J H H J H J J K H0 J0 G E G G F G E F E G0 G F E F G E J H F G G F F E K G J J H K G E0 G G J J G E E K J G F K J J H J H J H J H K F F G UF nvidia VG PI[0] PI[] PI[] PI[] PI[] PI[] PI[] PI[] PI[] PI[] PI[0] PI[] PI[] PI[] PI[] PI[] PI[] PI[] PI[] PI[] PI[0] PI[] PI[] PI[] PI[] PI[] PI[] PI[] PI[] PI[] PI[0] PI[] PILK PIRST# PIREQ* PIGNT* GP GP x,x PIE*[0] PIE*[] PIE*[] PIE*[] PIFRME* PIIRY* PITRY* PIEVSEL* PISTP* PIPR PIINT* PIINT* GPRF* GPWF* GPIHI GPIL GPST0 GPST GPST GPSTF0 GPSTS0 GPSTF GPSTS GPSSTF GPSSTS GPS[0] GPS[] GPS[] GPS[] GPS[] GPS[] GPS[] GPS[] GPMET* GSY* GPSTP* R L_G TESTMEMLK TESTEN PI/GP I/F GP x #/E0 #/E #/E #/E LK RST# REQ GNT FRME IRY TRY EVSEL STP PR INT INT RF WF I_HI I_L ST0 ST ST STF0 STS0 STF STS N SSTF N SSTS N N S0# N S# S# GPLP_Q S# GPL_GN S# S# S# GP_PLL** S# GP MET# TESTMEMLK** G E USY# TESTME STP# [**] = NT USE N NV R 0K- R 0K-./F R0 N N LP_V GPQ_0 GPQ_0 GPQ_0 GPQ_0 GPQ_0 GPQ_0 GPQ_0 GPQ_0 GPQ_0 GPQ_0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 0 V0LMP0 V0LMP _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _./F R 0K- R 0K- E E E 0 E0 E L N P U V Y L Y L Y L Y L Y L0 N0 P0 U0 V0 Y0 N E H U H U G P K0 G R T E.V NV V.V-NV L N N N N N 0 LP_V L_G GP_PLL TESTMEMLK TESTEN For NVm/m unstuff For NVm/m unstuff For NVm unstuff.u/0v-.u/0v u/0V-.u/0V- *.u/0v- N0PS00 *.u/0v-.u/0v- 0 T T T T T UG nvidia VG _ I/F GP_PLL _RE _GREEN _LUE _HSYN _VSYN I_SL I_S _IUMP _RSET _RE/N _GREEN/N _LUE _RSET STERE** SWPRY_** [**] = NT USE FR NV 0p- E F E E F Y W Y GPI 0 *00p- TV_/R TV_Y/G TV_MP _HSYN _VSYN ILK IT R U nvidia VG _ I/F R _RE K0 J0 G _GREEN J _LUE _HSYN _VSYN I_S I_SL _RSET _IUMP SWPRY_** [**] = NT USE N NV R *00 * H J F G G H G G0 F HSYN VSYN T LK * R R R 0K- R 0/F EFULT STTE P P P P P P For NVm unstuff.u/0v-./f T T T T T.K-.K- L 0p- U *G Vdd L.0u- R R.0u- R 0K- - LERT# THERM# ST GN SLK For NVm unstuff HSYN VSYN.K-.K- 0p- L.u/0V- V V For NVm /F For NVm 0/F 0.u/0V- For NVm unstuff USGE Spread spectrum control Hot plug/unplug Panel backlight enable Panel power enable T Spread spectrum control HW suspend ynamic NV voltage control Thermal monitor Fan ontrol LN VG_TK VG_TMS VG_TI VG_T VG_TRST# VG_THERM *00p VG_THERM LERT_VG# VG_VT# EI EI EIK EIK N0PS00 N0PS00 N0PS00 T T T0 T T E H H R K- L T T T T T T T T0 * RT_SENSE# GPI SUSPEN# R R R0 0K- 0K- 0K- LERT_VG# R *0K- VG_VT# R *0K- EI EIK R R.K-.K- VG_TMS R *0K- VG_TI R *0K- VG_TK VG_TRST# GPI LN LN SUSN SUS_STT# UH nvidia VG THERM/GPI/JTG JTG[0] JTG[] JTG[] JTG[] JTG[] THERM THERM [**] = NT USE FR NV ate : Monday, February, 00 Sheet of N0PS00 R *0K- R *0K- R0 *0K- R *0K- R 0K- R *0- R *0- GPI[0] GPI[] GPI[] GPI[] GPI[] GPI[] GPI[] GPI[] GPI[] GPI[]** G F G H H J J J K K GPI0 RT_SENSE# L_N LN GPI GPI SUSPEN# GPI LERT_VG# GPI I/ I/ I/ I I I/ P P R T U T SUSPEN# 0=.V =.V QUNT MTER UE nvidia VG IFP I/F U IFPT V IFPT* [**] = Same as IFP for NV nvidia GP I/F ZP --- nvidia VG module L_N LN T SUSPEN# T Size : ocument Number : Rev : R P0 IFPT IFPT* IFPT0 IFPT0* IFPT IFPT* IFPRSET IFPPLL 0p-.u/0V- R 0 N0 IFPPLLGN L N0PS00 R IFPI R 0 0p-.u/0V- R IFPIGN IFPVPRE** T 0

3 nvidia MEMRY 0/ TERMINTIN FR NVM LSE T RRM For NVm unstuff kevin / ZP --- nvidia VG module 0 nvidia MEMRY Monday, February, 00 Size : ocument Number : Rev : ate : Sheet of QUNT MTER FS# FS#- FS#- FS#- FS#- F0 F F0 F F F F F F F F F F F F F F F F F F0 F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F0 F F F0 F F0 F F0 F F F F F F F F F F F0 F0 F F0 F F F F F F F F F F F0 F0 F FQS FQS0 FQS FQS FQS FQS FQS FQM FQM FQM0 FQM FQM FQM FQM FLK0 FLK0# FKE FS# FRS# F# FS0# FRS# FS0# FS# F# FLK FLK# FKE F F0 F F F F0 F F F F F F0 F F F F F F F F0 F F F F F F F F F F F F F F F F F F F F F F F0 F F0 F F F F F F F F F F F F F F F0 F F F F FQM FQM FQM0 FQM FQM FQM FQM FQM FQS FQS FQS FQS FQS FQS FQS FQS0 FS# FRS# F# FS0# FS# F F F F0 F F F F F F F0 F0 F FLK0 FLK# FLK FLK0# F F FQS FQS FQS FLK# FLK FQS FQS FQS0 FQS FQS FLK0# FLK0 FQS FQM FLK0# FLK0 FLK FLK# F F0 FKE GN T.0u- R -00 T T R -00 T 0.u/0V- T R -00.0u- T 0 T R -00 T T MEM_ I/F [**] = NT USE N NV U nvidia VG N P N V U N0 P U R P P R R U R0 R R T T T0 T T T U U V0 W Y E G F L M W G0 0 G K0 M Y 0 F E G K L V V V W V W W Y 0 E E F G E F H0 H J0 J E F G H E F F G J J K G0 H J J L M M N H J K K M N N E0 0 W0 M0 J0 F0 H V N K G G F Y U P L H K E F H F Y L E K H F0 0 H0 E0 K H F E H K F E H K F H E H0 0 K F Y L E H J K E F F K E G H N K G E W T M J F Y U P L H Y L H G F G0 F0 F F G F G F F[0] FLK* FLK FLK0* FLK0 FKE FS* FS0* F* FS* FRS* F[] F[0] F[]** F[] F[0] F[] F[] F[] F[] F[] F[] F[] F[] F[] F[0] FQS*[] FQS*[] FQS*[] FQS*[] FQS*[] FQS*[] FQS*[] FQS*[0] FQS[] FQS[] FQS[] FQS[] FQS[] FQS[] FQS[] FQS[0] FQM[] FQM[] FQM[] FQM[] FQM[] FQM[] FQM[] FQM[0] F[] F[] F[] F[0] F[] F[] F[] F[] F[] F[] F[] F[] F[] F[0] F[] F[] F[] F[] F[] F[] F[] F[] F[] F[0] F[] F[] F[] F[] F[] F[] F[] F[] F[] F[0] F[] F[] F[] F[] F[] F[] F[] F[] F[] F[0] F[] F[] F[] F[] F[] F[] F[] F[] F[] F[0] F[] F[] F[] F[] F[] F[] F[] F[] F[] GN_ GN_0 GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_0 GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_0 GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_0 GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_0 GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_0 GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_0 GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_0 GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_ GN_0 GN_0 GN_0 GN_0 GN_0 GN_0 GN_0 GN_0 GN_0 GN_0 F_LL** FQ_0 FQ_ FQ_ FQ_ FQ_ FQ_ FQ_ FQ_ FQ_ FQ_ FQ_0 FQ_0 FQ_0 FQ_0 FQ_0 FQ_0 FQ_0 FQ_0 FQ_0 FQ_0 0.0u- 0 T 0 R 0- R T R 00 T 0u/0V- U HY- M M0 M M L M M L M M L0 G G K K L M L K L 0 G G0 K K L L E L M L E0 L M L J J H H F F E E E E F F H H J J 0 M K G G F F0 H H0 J J0 K K K K0 J J J J K K E E E E F F F F G G G G H H H H 0 0 E E F F G G H H J J 0 (P) 0 K M M S RS S K 0 RFU/() N_ N_ N_ N_ N_ N_ N_ Q_ N_ N_ RFU() QS Q_0 ML Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q _ VSS_ VSS_ VSS_ VSS_ KE M M0 RFU() QS QS QS0 Q_ Q_ Q_ Q_ Q_ Q _ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_0 TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_0 TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_0 VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_0.0u- 0u/0V- 0p- 0u/0V-.0u- R 0K- L N0PS00 0u/0V- 0 R -00 u T 0 T T0 T 0 R *0- T R0 *0- T 0 R -00 0u/0V- 0.0u- U HY- M M0 M M L M M L M M L0 G G K K L M L K L 0 G G0 K K L L E L M L E0 L M L J J H H F F E E E E F F H H J J 0 M K G G F F0 H H0 J J0 K K K K0 J J J J K K E E E E F F F F G G G G H H H H 0 0 E E F F G G H H J J 0 (P) 0 K M M S RS S K 0 RFU/() N_ N_ N_ N_ N_ N_ N_ Q_ N_ N_ RFU() QS Q_0 ML Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q _ VSS_ VSS_ VSS_ VSS_ KE M M0 RFU() QS QS QS0 Q_ Q_ Q_ Q_ Q_ Q _ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_0 TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_0 TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_0 VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_0 00.u/0V- T 0 T 0u/0V- T 0 R -00 0u/0V- T0 0.u/0V- R -00 0u/0V- T0 T T R -00 T T R K- T T0 0 T R K- R0-00 R 0-0 T R R 00 FLK0 FLK FQS FQS FLK0# FQS0 FQS FQS FQS FQS FQS FLK#

4 nvidia MEMRY LSE T RRM 0/ TERMINTIN FR NVM For NVm unstuff For NVm unstuff NVm 0 NVm pull down ZP --- nvidia VG module 0 nvidia MEMRY Monday, February, 00 Size : ocument Number : Rev : ate : Sheet of QUNT MTER FS# FS#- FS#- F F0 F F F F F F F0 F F F F F0 F F F F F F F F F F F F F F F F FLK# FLK FQS FQS FQS FQS F F0 F F F F F F F F0 F F F F0 FRS# FS0# F# FS# FKE FQM FQM FQM FQM FS#- F F F F F F F F F F0 F F0 F F F F F0 F F F F F F F F0 F F F FS#- F F F0 F F F F F F F F0 F F0 F FS# F# FRS# FLK0# FLK0 FQS FQS0 FQS FQS FQM FQM0 FQM FQM FKE FS0# FQS FLK FQS FQS0 FQS FLK0 FQS FQS FLK# FQS FLK0# FQS F F F F F F F FQM FQS F0 FS# F F F F F F FQM FQS F0 F F0 F# F F F FQM F FRS# F F F F F F F F F F FQM FQS FQS F F FKE F F F0 F FLK0# F F0 F F FQM FS0# F F0 F FQM FQS F0 FLK# F F F F F F F F FS# FLK0 F F F FQM F F F F F F FQS F F F0 F F FQS0 FLK F F F F F0 F FQS F F F F F F F F F F0 FQM0 FLK FLK# FLK0# FLK0 F F FKE GN T R -00 T0 U HY- M M0 M M L M M L M M L0 G G K K L M L K L 0 G G0 K K L L E L M L E0 L M L J J H H F F E E E E F F H H J J 0 M K G G F F0 H H0 J J0 K K K K0 J J J J K K E E E E F F F F G G G G H H H H 0 0 E E F F G G H H J J 0 (P) 0 K M M S RS S K 0 RFU/() N_ N_ N_ N_ N_ N_ N_ Q_ N_ N_ RFU() QS Q_0 ML Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q _ VSS_ VSS_ VSS_ VSS_ KE M M0 RFU() QS QS QS0 Q_ Q_ Q_ Q_ Q_ Q _ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_0 TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_0 TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_0 VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_0 R -00 R./F R -00 U HY- M M0 M M L M M L M M L0 G G K K L M L K L 0 G G0 K K L L E L M L E0 L M L J J H H F F E E E E F F H H J J 0 M K G G F F0 H H0 J J0 K K K K0 J J J J K K E E E E F F F F G G G G H H H H 0 0 E E F F G G H H J J 0 (P) 0 K M M S RS S K 0 RFU/() N_ N_ N_ N_ N_ N_ N_ Q_ N_ N_ RFU() QS Q_0 ML Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q_ Q_ Q_ Q_ Q_ Q_ Q_ Q _ VSS_ VSS_ VSS_ VSS_ KE M M0 RFU() QS QS QS0 Q_ Q_ Q_ Q_ Q_ Q _ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_0 TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_0 TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ TH_GN_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_0 VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_ VSSQ_0 00 0u/0V- 0 R -00 0u/0V- 0 T R -00 [***] = USE FR R NLY [**] = NT USE N NV MEM_ I/F U nvidia VG F0 K K K E G F F E E 0 E E 0 0 F 0 F E F E 0 F E F E E E E F F E K 0 E0 F E F W V U T R P N M W V U T R P N M W V U T R P N M W V U T R P N M W V U T R P N M W V U T R P N M W V U T R P N M W V U T R P N M E E F W T R M J G G G G G G F[] FLK FLK0* FLK0 FKE FS* FS0* F* FS* FRS* F[] F[0] F[]** F[] F[0] F[] F[] F[] F[] F[] F[] F[] F[] F[] F[0] FQS*[] FQS*[] FQS*[] FQS*[] FQS*[] FQS*[] FQS*[0] FQS[] FQS[] FQS[] FQS[] FQS[] FQS[] FQS[] FQS[0] FQM[] FQM[] FQM[] FQM[] FQM[] FQM[] FQM[] FQM[0] F[] F[] F[] F[0] F[] F[] F[] F[] F[] F[] F[] F[] F[] F[0] F[] F[] F[] F[] F[] F[] F[] F[] F[] F[0] F[] F[] F[] F[] F[] F[] F[] F[] F[] F[0] F[] F[] F[] F[] F[] F[] F[] F[] F[] F[0] F[] F[] F[] FLK* F[] F[] F[] F[] F[] F[0] F[] F[] F[] F[] F[] F[] F[] F[] F[] F[0] T_GN_ T_GN_ T_GN_ T_GN_ T_GN_0 T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_0 T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_0 T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_0 T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_0 T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_ T_GN_0 T_GN_0 T_GN_0 T_GN_0 T_GN_0 T_GN_0 T_GN_0 T_GN_0 T_GN_0 T_GN_0 FL_LK_GN*** FL_TERM_GN*** FL GN*** FL_P_Q*** _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 FQS*[] F_.0u- 0u/0V- 0.0u- 0u/0V- 0 0u/0V- T 0 R -00.0u- 0 R -00 0u/0V- T R -00 T R./F R 00 T R0 0K- R 00 T R -00 R *0- R -00 T T R K- T T T.0u- T 0.0u- T T R -00 T T0 T 0 0 R K- T0 0 R K- T T T T T T 0 T R 0- R 0- T R./F 0 0u/0V- T R K- T.0u- R0 /F 0u/0V- R0-00 R0 *0- T 0 FQS FLK0# FQS FQS FLK# FLK0 FQS0 FQS FLK FQS FQS FQS

5 nvidia GP I/F U nvidia VG VIP I/F VIPH[0] VIPH[] VIPPLK VIPHTL VIPHLK VIPQ_0 VIPQ_0 VIPQ_0 RM[] RM[] RMS* [**] = NT USE FR NV P P L M M VIP[0] J VIP[] J VIP[] K VIP[] K VIP[] L VIP[] L VIP[] N VIP[] N LI VIPH VIPPLK VIPHTL VIPHLK LI0 LI VIP VIP VIP VIP VIP VIP L VIPQ L L M 0 R RM R RM F RMS# FPLKUT FPLKUT** M M FPLKUT# FPLKUT#** VIPL_P_Q** P R0./F VIPL GN** P R0./F LI R 0K- R *0K- T LI0 LI VIPQ T N0PS00.u/0V- T T For NVm For NVm dd R ~ R LI0 LI LI HSYN VSYN R 0K- R 0K- R 0K- HSYN VSYN R *0K- R *0K- R 0K- R *0K- R 0K- R 0K- R 0K- R 0K- R 0K- R 0K- R *0K- R *0K- R00 *0K- R0 0K- R *0K- R 0K- R *0K- R *0K- R *0K- R 0K- STRP0 STRP VIP VIP V VIP V VIP R *0K- VIP R0 *0K- VIP R *0K- VHSYN R 0K- VIPHTL RM RM STRP STRP HSYN VSYN V V R 0K- R 0K- R0 *0K- R 0K- R R R *0K- *0K- *0K- R 0K- R0 0K- R0 *0K- R 0K- R *0K- R0 0K- R 0K- R 0K- R *0K- For mode For NVm device I "" For NVm device I "" For NVm unstuff For NVm unstuff L p R p M SSFUT TLUT R 0- VG_IN N0PS00 MHz 0p- J.u/0V- UI nvidia VG PLL I/F VG_UT H TLUT R 0- J J K TLIN TLSSIN TLUTUFF PLL For NVm For NVm L N0PS00 VQ.u/0V- R0 K- V R0 K- T0 NV.V-NV T0 VQ R./F R./F E F F0 N M L N UK nvidia VG V - MIS VQ_0 VQ_0 VQ_0 V_ FRWR_PME* FRWR_VU FRWR_VUP FRWRLNKN FRWRLPS V[] V[0] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[0] VHSYN VVSYN VE VLKUT VLKUT* VLKIN VL_P_Q** VL GN** I_SL I_S UFRST* H J K H K J K H J G H G E J K G G G V V0 V V V V V V V V V V0 VLK T0 VLK# T0 VLKI R.K- EIK EI UFRST T T T T T00 T0 T0 T0 VHSYN VVSYN T0 VE R *.K- EIK EI T0 For NVm/m unstuff P EMI P EMI P *EMI P EMI L0 TLUT N0PS00 0p- R0 0K-.u/0V- FUT IS0 I R W / R H/H (efault) U R0 IS0M-T 0K- IN/LKIN P# SUSPEN# SLK EIK GN ST EI LKUT REFUT REFUT R0 0- SSFUT 0p- SUSPEN# 0p- EIK EI R K- L R 0 L R 0 L R 0 N0PS00 * 0p- N0PS00 0p- N0PS00 0p- V U0 T Y STRP[0] STRP[] STRP[]*** STRP[]*** [**] = NT USE FR NV [***] = NT USE FR NV/ UJ nvidia VG IFP I/F IFPRSET IFPPLL.u/0V- V0 IFPPLLGN IFPI.u/0V- T IFPIGN IFPI.u/0V- W IFPIGN IFPVPRE** IFPT IFPT* IFPT0 IFPT0* IFPT IFPT* IFPT IFPT* IFPT IFPT* IFPT IFPT* [**] = Same as IFP for NV G G F F W V U T Y V W U V Y IFPT W IFPT* V IFPT IFPT* IFPT IFPT* IFPT IFPT* Y W STRP0 STRP STRP STRP TLUT TLUT- TLLKUT TLLKUT- TLUT TLUT- TLUT TLUT- TLUT0 TLUT0- TULKUT TULKUT- TUUT0 TUUT0- TUUT TUUT- TUUT TUUT- TUUT TUUT- V TLUT0 TLUT0- TLUT TLUT- TLLKUT TLLKUT- RM RM VIPHTL U TF0 SI SK HL S WP R0 0K- RMS# S GN GN N ES_PNEL V_LIGHT V EI Power R_J LN LN L_V EIK EIK EI EI TLUT TUUT TLUT- TUUT- LI0 TLUT TUUT TLUT- TUUT- TUUT TUUT- TUUT0 TUUT0- TULKUT TULKUT- LN LN L 0-0p- R 0K- L_N LI# E_LN LI# E_LN TRE 0MIL V_LIGHT L_N U0 T0- IN IN N/FF 0u/V-0 R 0K- UT GN GN R 0- SS SS LV Q *TEU LI_TRL R_J R L 0-.u/0V- VJ QUNT MTER LN L_V VJ nvidia GP I/F ZP --- nvidia VG module Size : ocument Number : Rev : ate : Monday, February, 00 Sheet of L 0- *0K- R 0K- U NSZ0P p-.u/0V- 0

6 nvidia GP I/F PL FJHS00 P P *.u/v- *.u/v- P0.u/V- P 0u/V-0 PR 0 V P 0u/V-0 P P.u/0V- MJ00L P MINN MINN PR 0- PR 0K- VG_PWRG VG_PWRG PR 0- P.u PR0 0K P 000p P.u VGF S0 EN/PSV ST VUT V FK PG GN H L ILIM P L PGN 0 P.u VGH VGL PR K/F VGL PQ F00L PQ F PL P E0QS0 RUH/ P0 0u/.V- P 0u/.V- P *0u/V- P.u P 0u/0V- PR K/F P 00p P=0 For NVm K For NVm K NV PR 0K/F S GN PR *0..V.V PL PL.V N0PS00 N0PS00 _ P_ Q P N GN VSENSE _R_SURE PL P 0u/.V- P u/0v P u/0v P 000p P 000p P0 P 0u/.V- *0u/.V-.V R 0-0.V R 0-0 HLE HLE-P HLE HLE-P HLE HLE-P HLE HLE-P HLE HLE-P nvidia GP I/F QUNT MTER Size : ocument Number : Rev : ZP --- nvidia VG module ate : Monday, February, 00 Sheet of 0

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