Intel 100MHz Pentium(R) II processor/440gx AGPset Dual-Processor Customer Reference Schematics

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1 Revision.0 Intel 00MHz Pentium(R) II processor/0gx GPset ual-processor ustomer Reference Schematics TITL PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 PG OVR SHT LOK IGRM SLOT ONNTOR,,, LK SYNTHSIZR GX,,0 FT SWITHS, IMM SOKTS,,, PIIX. IOPI ULTR I/O 0 GP ONNTOR PI ONNTORS, IS ONNTORS I ONNTORS US ONNTORS FLSH IOS PRLLL SRIL/FLOPPY KYOR/MOUS 0 VRM POWR ONNTOR PROSSOR US/OR FRQ. PI/GP PULL-UPS & PULL-OWNS IS PULL-UPS GX/RM OUPLING ULK OUPLING TRMINTION OUPLING LM RVISION HISTORY 0 ** Please note that these schematics are subject to change. THIS SHMTI IS PROVI "S IS" WITH NO WRRNTIS WHTSOVR, ILUING NY WRRNTY OF MRHNTILITY, FITNSS FOR NY PRTIULR PURPOS, OR NY WRRNTY OTHRWIS RISING OUT OF PROPOSL, SPIFITION OR SMPL. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. Intel disclaims all liability, including liability for infringement of any proprietary rights, relating to use of information in this specification. Intel does not warrant or represent that such use will not infringe such rights. I is a two-wire communications bus/protocol developed by Philips. SMus is a subset of the I bus/protocol and was developed by Intel. Implementations of the I bus/protocol or the SMus bus/protocol may require licenses from various entities, including Philips lectronics N.V. and North merican Philips orporation. *Third-party brands and names are the property of their respective owners. opyright * Intel orporation INTL ORPORTION Intel 00MHz Pentium(R) II Processor/0GX GPset ual processor over Sheet Size ocument Number Rev Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

2 VRM VTT GN. PG. MX M PG. PI US PNTIUM II PROSSOR R (SLOT ) PG., NTL T K00 & ITP ON. PG. R PNTIUM II PROSSOR (SLOT ) PG., NTL T VRM VTT GN. PG. MX M PG. THIS RWING ONTINS INFORMTION WHIH HS NOT N VRIFI FOR MNUFTURING N N USR PROUT. intl ISNOT RSPONSIL FOR TH MISUS OF THIS INFORMTION. VI TL VI RFR TYP SIGNTOR PG # FUSS F,F,F,F,0 SMus Interface SYSTM US R NTL T SYSTM US SMus Interface Slot onnectors J, J,,,, ITP onnector J IOPI 0 PG. GP ONN. PG. R/T NTL GX GX G NTL R KF PG. MMORY SRM IMM MOULS PG. - IMM Sockets J,J,J,J,,, GP onnector J PI onnector J,J0,J,J, IS onnector J, J I onnector J, J US onnector J,J VRM. J,J GP SIN PG. -0 T LM00S L-L,0 PI US /T NTL K00 U GX U -,,,,0 KF U FT SWITHS U,,,,,, (T) US ONN. PG. US ONTROL US /T NTL PIIX G PG. - NTL R/T PRIMRY I PI I ONNTORS PG. SONRY I NTL R/T PI ONN PG. - PI ONN PI ONN PI ONN (PIIX) U0,, LV VS U,,,,,F,, 0 (IOPI) U LV VS U,,,, FFR U 0 (Ultra I/O) S0 U,,,,,F, HT U,,,,,F,, F00-T(FLSH) U INTRRUPTS ONTROL R NTL T IS US LS0 U0,,,, LS0 U,,,,,F,, H0 VS U,,, F0 U,,,,,F, FT U LM U R FLSH IOS PG. T X-US KYOR PG. 0 T NTL R ULTR I/O PG. R NTL PG IS ONN IS ONN MX M U,U, HT VS U0, H U F0 VS U,,,,,F,, LT LT VR VR LM PG. MOUS PG. 0 T rystal (. MHz) Y FLOPPY ONN. PG. PR. ONN. PG. SR. ONN. PG. SR. ONN. RST, POWR ONNTORS PI, GP, & IS RSISTORS PG. PG. - INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 Intel 00MHz Pentium(R) II processor/0gx GPset lock iagram OUPLING PITORS PG. - Size ocument Number Rev ustom.0 Intel(R) 0GX GPset ate: Friday, October 0, Sheet of 0

3 VTT OR J VTT 0 MI _VTT 0 0 FLUSH# 0, FLUSH# 0 SMI# _VTT 0,, HSMI# 0 INIT# IRR# 0,, HINIT# 0 _VTT 0M# 0 0M#,, R 0 STPLK# 0.K,, STPLK# 0. uf 0 TK FRR# 0 TK_ FRR#,, U 0 SLP# IGNN# 0,, SLP# IGNN#,, 0 _VTT TI 0 TMS_ TI_ 0 TMS 0, TRST# TRST# TO STY# TO_, RSRV PWRGOO PWRGOO,, _OR TSTHI SM SLV TSTHI, - 00pF RSRV RSS RSRV THRMTRIP# THRMTRIP#, = 00000b 0 LINT[] RSRV 0 MX M,, LINT _OR LINT[0] LINT0,, PILK PILK_P p QSOP P#[] PI[0] PI0,,,,,,,, SMT 0 RSRV PRQ# 0 SMT ITPRQ#0,, 00/# 00/# P#[] PI[],,,,,, SMLK SMLK,, PI PRY# PM#[0] SM_LRT# PRY#0 PM#[] INIT# _OR P#[0] P#[] RSV THRM#,, P#[] P#[] RSV P#[] P#[] RSV _OR P#[] RSV H# 0 #[] 0 RSV H# #[] P#[] H# #[] #[] H# _OR #[] H# MX_ H# #[] H#0 #[0] #[0] H#0 H# #[] #[] H# _OR #[] H# H# #[] H# #[] #[] H# H# 0 #[] #[] 0 H# MI #[] H# H# #[] H# #[] #[] H# H# #[] #[] H# _OR #[] H# H# #[] H#0 #[0] RSRV H# #[] #[] H# _OR #[] H# H# 0 #[] 0 H# #[] #[] H# H# #[] #[] H# _OR #[] H# H# #[] H# #[] #[0] H#0 H# #[] #[] H# _OR #[] H# H# #[] H# #[] #[] H# H# 0 #[] #[] 0 H# MI #[] H# H#0 #[0] H# #[] #[] H# H# #[] #[] H# _OR #[0] H#0 H# #[] H# #[] #[] H# H# #[] #[] H# _OR #[] H# H# 0 #[] 0 H# #[] #[] H# H#0 #[0] #[] H# _OR #[] H# V MI_P MI_P MI_P SLOT_0. SLOT a,0 H#[:0] R R R INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 * Please place as close to the connector as possible FIRST SLOT (PRT I) Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

4 OR J,, HRST# RST# RQ# LK RQ# PUHLK FRRR# RQ0# RQ0#, _OR RR# #[] #[] #[] H# 0 #[] #[] 0 MI #[0] H#0 H# #[] H# #[] #[] H# H# #[] #[] H# _OR #[] H# H#0 #[0] H# #[] #[] H# H# #[] RSRV _OR #[] H# H# 0 #[] 0 H# #[] #[] H# H# #[] #[] H# _OR #[] H# H# #[] H# #[] #[] H# H# #[] #[0] H#0 _OR #[] H# H# #[] H# #[] #[] H# 00 MI #[] 00 H# SLOTO# NR#, _SLOTO# 0 0 HRQ#0 0 RQ#[0] 0 NR#, HRQ# 0 RQ#[] PRI# 0 PRI#, HRQ# 0 RQ#[] TRY# 0 HTRY#, 0 _OR FR# 0 FR#, 0 LOK# 0, HLOK# 0 RY# RQ#[] 0, RY# HRQ# 0 RS#[0] RQ#[] 0, RS#0 HRQ# 0 _ HITM# 0 HITM#, 0 HIT# 0, HIT# RS#[] SY#, RS# SY#, RSRV RS#[] RS#, _ RSRV RP# RSP# S# P#[] RSRV S#, _ P#[0] RR# VI_ R 0 V VI[] VI[] V R 0 VI_ VI_0 R 0 V0 0 VI[0] VI[] 0 V R 0 VI VI[] V R 0 VI_ SLOT b SLOT_0., H#[:], HRQ#[ :0] VI_[:0] * Please place as close to the connector as possible MI_P R0 0 MI_P R 0 VI_0 VI_ VI_ JP SL_VI_0 JP SL_VI_ JP SL_VI_ VRM optional override jumpers & resistors Jumper position - is stuffed as the default. To override, R-R must be removed. JP SL_VI_ R VI_ INTL ORPORTION.K PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- JP SL_VI_ R FOLSOM, 0 VI_.K FIRST SLOT (PRT II) R.K R.K R.K Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

5 VTT OR J VTT 0 MI _VTT 0 0 FLUSH# 0, FLUSH# 0 SMI# _VTT 0,, HSMI# 0 INIT# IRR# 0,, HINIT# 0 _VTT 0M# 0 0M#,, 0 STPLK# 0 R,, STPLK# 0 TK FRR# 0.K TK_ FRR#,, 0. uf 0 SLP# IGNN# 0,, SLP# IGNN#,, U 0 _VTT TI 0 TMS_ TO_, 0 TMS 0, TRST# TRST# TO TO_ RSRV PWRGOO STY# PWRGOO,, _OR TSTHI TSTHI, 00pF RSRV RSRV THRMTRIP# SM SLV - THRMTRIP#, LINT[] RSRV RSS 0 0,, LINT _OR LINT[0] LINT0,, = 0000b PILK MX M PILK_P P#[] PI[0] PI0,, p QSOP 0 RSRV PRQ# 0 ITPRQ#,,,,,, SMT 00/# P#[] SMT,, 00/# PI[],, PI PRY# PM#[0],,,,,, SMLK SMLK PRY# PM#[] INIT# SM_LRT# _OR P#[0] P#[] P#[] RSV THRM#,, P#[] P#[] P#[] RSV _OR P#[] RSV H# 0 #[] 0 RSV H# #[] P#[] RSV H# #[] #[] H# _OR #[] H# H# #[] MX_ H#0 #[0] #[0] H#0 H# #[] #[] H# _OR #[] H# H# #[] H# #[] #[] H# H# 0 #[] #[] 0 H# MI #[] H# H# #[] H# #[] #[] H# H# #[] #[] H# _OR #[] H# H# #[] H#0 #[0] RSRV H# #[] #[] H# _OR #[] H# H# 0 #[] 0 H# #[] #[] H# H# #[] #[] H# _OR #[] H# H# #[] H# #[] #[0] H#0 H# #[] #[] H# _OR #[] H# H# #[] H# #[] #[] H# H# 0 #[] #[] 0 H# MI #[] H# H#0 #[0] H# #[] #[] H# H# #[] #[] H# _OR #[0] H#0 H# #[] H# #[] #[] H# H# #[] #[] H# _OR #[] H# H# 0 #[] 0 H# #[] #[] H# H#0 #[0] #[] H# _OR #[] H# V MI_P MI_P MI_P SLOT_0. SLOT a,0 H#[:0] R R R INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 * Please place as close to the connector as possible SON SLOT (PRT I) Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

6 OR J,, HRST# RST# RQ# LK, RQ0# PUHLK FRRR# RQ0# RQ# _OR RR# #[] #[] #[] H# 0 #[] #[] 0 MI #[0] H#0 H# #[] H# #[] #[] H# H# #[] #[] H# _OR #[] H# H#0 #[0] H# #[] #[] H# H# #[] RSRV _OR #[] H# H# 0 #[] 0 H# #[] #[] H# H# #[] #[] H# _OR #[] H# H# #[] H# #[] #[] H# H# #[] #[0] H#0 _OR #[] H# H# #[] H# #[] #[] H# 00 MI #[] 00 H# SLOTO# NR#, _SLOTO# 0 0 HRQ#0 0 RQ#[0] 0 NR#, HRQ# 0 RQ#[] PRI# 0 PRI#, HRQ# 0 RQ#[] TRY# 0 HTRY#, 0 _OR FR# 0 FR#, 0 LOK# 0, HLOK# 0 RY# RQ#[] 0, RY# HRQ# 0 RS#[0] RQ#[] 0, RS#0 HRQ# 0 _ HITM# 0 HITM#, 0 HIT# 0, HIT# RS#[] SY#, RS# SY#, RSRV RS#[] RS#, _ RSRV RP# RSP# S# P#[] RSRV S#, _ P#[0] RR# VI_ R 0 V VI[] VI[] V R0 0 VI_ VI_0 R 0 V0 0 VI[0] VI[] 0 V R 0 VI VI[] V R 0 VI_ SLOT b SLOT_0., H#[:], HRQ#[ :0] VI_[:0] * Please place as close to the connector as possible MI_P0 R 0 MI_P R 0 VI_0 VI_ VI_ JP SL_VI_0 JP SL_VI_ JP SL_VI_ VRM optional override jumpers & resistors Jumper position - is stuffed as the default. To override, R-R must be removed. JP SL_VI_ R VI_ INTL ORPORTION.K PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- JP0 SL_VI_ R0 FOLSOM, 0 VI_.K SON SLOT (PRT II) R.K R.K R.K Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

7 LOK SYNTHSIZR. L L FHS0L FHS0L uf 0.0 uf 0.0uF 00pF 00pF 00pF V V V V V V uf 00pF 00pF 0.0uF 0.0uF 0.0uF V V V V V uf U R 00 0 R PULK0 PUHLK *NOT* For power managed systems, the PIIX must be R PULK PUHLK R connected to PILK_F of the K00 which is a free PULK GXHLK R running PLK not affected by the assertion of PISTOP#. PULK ITPLK R XTLIN PILK_F PXPLK R STUFFING OPTION R R R0 R R R PILK_ PLK 0 R PILK_ PLK.K.K.K 0K 0K 0K R *NOT* 0- pf caps to ground may be K00 PILK_ PLK R XTLOUT PILK_ PLK R desirable to reduce the effects of MI. PILK_ GXPLK R RSV PILK_ PLKPI R RSV PILK_ PILK_P R 0 SL0 MHZ_0 Mhz_0 SL MHZ_,, 00/# SL_00/# R PILK_0 PILK HPILK R0 R PILK_ PI_STP# PI_STP# R PU_STP# RF0 OS R R PWRWN# RF OS PU_STP# R Y RF OS 0 PILK_P 0 R SUS# 0.MHz VPI0 VPI VOR0 VMHZ VOR VQRF VPI VPU0 VPU RF PI0 PI PI OR0 MHZ OR PU0 PU PI Stuffing option to enable the stopping of the PULKs, PILKs, and the powerdown of the K00. Please note that the resistors are not stuffed. O NOT STUFF R 0 Stuffing option to enable Spread# function for possible MI reduction. 0pF 0pF K00_0 0. VTT. VTT VTT R K TO_JMP JP R K R K % OPTIONL ITP TST ONNTOR,, HRST# R0 J 0 ITP_RST RST# TK_ R 0 TK_ TRST#, R ITPRQ#0 TMS_ R_PRY0 PRY#0 R 0 R 0 R_PRY ITPRQ# TMS_ R 0 PRY# R ITPLK 0 R0.. ITP_JMP ONFIG TI_JMP JP - - ITP ONN - - UL PU INTL ORPORTION - - SINGL PU PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 PU ONFIG SINGL PU R 0 R 0 0, TO_ TO_ R R 0 R R 0 JP TO_JMP JP TI_JMP R 0 TI_ LOK SYNTHSIZR Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

8 , H#[:] H# G F M0 H# M0 H# H M H# M H# G M H# M H# H M H# M H# G F M H# M H# F M H# M H# G F M H# M H#0 G M H0# M H# F M H# M H# F 0 M H# M H# F 0 M0 H# M0 H# F F M H# M H# M H# M H# F M H# M M#[:0], H# M H# M H# GX H# M0# M#0 H# H# M# M# H#0 H0# M# M# H# G H# M# M# H# H# M# M# H# H# M# M# H# H# M# M# H# L M# H# M# H# F0 M# H# M# H# 0 H# M# M# H# 0 H# M0 M0 FHS0L H# H# M# M# H#0 H0# M# M# 00pF H# F H# M M S_#[:0] M M.0uF S_#0,, HRST# PURST# S0# S_#[:], S# K F S_# S# S# 00pF S_#, NR# H NR# S# S_#[:], PRI# H S_# PRI# S#.0uF S_# S# S_#[:], SY# L S_# SY# S# 00pF S_#, FR# J FR# S#, RY# K RY# S# S_# S_#[:0].0uF, HIT# L HIT#, HITM# L S_#0 HITM# S0# S_#[:] 00pF S_#, HLOK# K HLOK# S#, HTRY# H S_# HTRY# S# S_#[:].0uF S_# 0, RQ0# RQ0# S# S_# S# S_#[:] 00pF RS#0 K S_# RS#0 S# RS# L S_# RS# S#.0uF RS# L F S_# RS# S# QM[ :0],,, uf HRQ#0 QM0, RS#[ :0] J HRQ#0 QM0 HRQ# J QM HRQ# QM HRQ# K QM HRQ# QM HRQ# K QM HRQ# QM HRQ# J QM HRQ# QM LK[ :0],,, QM R QM U QM QM.k, HRQ#[ :0] QM R QM **PLS NOT**.K QM R 0 LK0 QM QM, SRM0 QM R 0 LK These clock GXHLK N HLKIN QM QM, SRM R 0 FN, LK SRM assignments may M R 0 LK TSTIN# FN GK 0 not be optimum. RST# KF SRM M R0 0 RST# F LK0 RST# GK **On -IMM solutions that don't support O SRM R 0 LK self-refresh mode, GK should be N/. R SRM R 0,,, PIRST# LK PIRST# UF_IN SRM F R 0 LK SRS_# SRS_#, SRM R 0 LK SRS_# SRS_#, SLOK SRM F R 0 LK SS_# SS_#, ST SRM R 0 LK SS_# SS_#, SRM0 R 0 LK SRM 0 R 0 LK W_# W_#, RSV SRM R 0 LK W_# W_#, RSV SRM R0 0 LK R RSV SRM P R 0 LK RSV LKO RSV SRM R 0 LKRF LKWR SRM R 0 SRM SRLK 0 LKRF SMLK,,,,,, R close to GX. SMT,,,,,, INTL ORPORTION U- GX_0 SYSTM INTRF V Y F F F F0 G G J J 0 V V V V V V V V V V V V V V RM INTRF F F F F H H J J **Locate R close to KF and **Locate "T" and cap close to GX. ** Please make LKRF trace length equal to." more than the LK outputs to the IMMs. LK outputs to the IMMs should all be the same recommended length. xample: if LK[0-] =." then LKRF =.".". 0pF KF VII V V V V V V V V V V II M[:0], slave address = 000b PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 GX SYSTM N RM INTRFS *The unused SRM clocks can be disabled using the SMus interface. Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

9 0 K G0 0 G0 K G G K G G K G G K G G J G G J G G H G G H G G J G G 0 H G0 0 G0 H G G H G G G G G G Y G G G Y G G W G GX G V G G W G G G U G G 0 V G0 0 G0 U G G U G G U G G T G G T G G T G G T G G U G G R G G 0 R G0 0 G0,, /#[ :0] R G G G/#[:0] R 0K,, [:0],,, FRM#,,, VSL#,,, IRY#,,, TRY#,,, STOP#,, PR,,, SRR#,, PLOK#, PHL#, PHL# WS#,,, PRQ#[:0] /#0 /# /# /# J G F F F G F F U- /0# /# /# /# FRM# VSL# IRY# TRY# STOP# PR SRR# PLOK# PHOL# PHL# WS# PI INTRF L L L L M M N N P P R R T T T T N V V V V V V V V V V V V V V V V V PI R & PWR MGT P V Y ** Note** Make the GLKIN trace length." more than the GLKOUT recommended trace length. Stub to tee should be " PRQ#0 M PRQ0#/IORQ# PIP# PIP#, PRQ# K S0 PRQ# S0 PRQ# F0 M S PRQ# S PRQ# M S PRQ# S MX. PRQ# S R00 PRQ# 0 N PRQ# S SUSTT# P S SUSTT# S 0,, PGNT#[:0] P S S PGNT#0 P S PGNT0#/IOGNT# S PGNT# R S PGNT# S O NOT STUFF PGNT# 0 PGNT# S[ :0] PGNT# M PGNT# RF# RF#, Stuffing option to enable and test PGNT# PGNT# PGNT# L ST0 the POS state., PWROK F GX-PWROK ST0 L ST LKRUN# ST L ST VRFV RF ST GXPLK PLKIN ST[:0] R GST- ST-, T 0 GST- ST-, N % S-ST SST, R N GPRFV V V V V GP INTRF G/0# Y G/# V G/# U G/# GFRM# GVSL# GIRY# GTRY# GSTOP# GPR W W V W Y Y L GRQ# L GGNT# P GLKOUT N GLKIN G#0 G# G# G# R R G[ :0] GFRM#, GVSL#, GIRY#, GTRY#, GSTOP#, GPR, GRQ#, GGNT#, GLKOUT 00 GX_0 N M L L M M M M M N N N N P P P P P T T R R R R R R V V W W **NOT** Locate circuitry close to GX. 0.00uF R0 00 % INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 GX PI N GP INTRFS Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

10 , M[ :0] U- M0 F H#0 M0 H0# M H# M H# M F H# M H# M H# M H# M H# M H# M H# M H# M H# U M H# M H# R.K F 0 M H# N M H# M H# SRLK M 0 H# M H# N **NOT** The trace M0 0 H#0 M0 H0# M H# R.K lengths of M H# M 0 0 H# M H# K[:0] should M 0 H# M H# pf M F0 0 H# be.0" M H# Q M H# M H# M Y H# M H# GK Q _K M Y H# M H# M W H# **NOT** GK trace length M H# Q M W GX H# M H# M0 W H#0 from the GX to the shift M0 H0# Q _K M W H# M G H# register should be between M V H# M H# M H# " MIN and " MX. Q U M H# M U H# 0 M H# Q _K M T H# M H# M T H# M H# Q M T H# M H# M R H# M H# Q _K M R H# M H# M0 P H#0 M0 H0# Q M N H# M H# M H# **NOT** If GK is not used M H# Q _K M H# M H# then each K requires a K M H# M H# Q M H# M H# pullup to. M F H# M H# Q _K M H# M H# M H# 0 M H# Q M H# M H# M0 H#0 0 M0 H0# Q _K M F H# M H# M H# M H# Q M F H# M H# M 0 H# M H# Q _K0 M 0 H# M H# M H# M H# SNLVH M H# M H# M Y H# M H# M Y H# M H# M0 W H#0 M0 H0# M V H# M H# **NOT** The seven M V H# M H# M V 0 H# outputs that circle around M H# M U 0 H# M H# to become inputs on the M U H# M H# M U H# SNLVH should M H# M T H# M H# have trace lengths no M T H# M H# M U H# longer than ". M H# M0 R 0 H#0 M0 H0# M R H# M H# M P H# M H# M P H# M H# GTLRF M0 GTLRF M0 M 0 M M M M M M GTLRF M F M GTLRF M M M VTT VTT M F M VTT M Y M M[ :0] GX_0 MMORY T US N F F V V V V V N F F F HOST T US H#[:0], VTT VTT R0 % R0 % GTLRF GTLRF INTL ORPORTION R0 0 % 0.00uF R0 0 % 0.00uF PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 GX M/H US Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet 0 of 0

11 FT-SWITHS (MMORY T LINS & ) U FN S0 S M[ :0] M_[ :0] S R0 M M_.K M_ M M_ U R M_, FN 00 M 0 M_ S0 R M_ S 0, M[ :0] M M_ S M_[ :0],, 00 R 0 M_ M0 M_0 00 M M_ M_0 R M_ M M_ M M_ R 00 M_ R00 M_ 00 M 0 M_ M M_ R0 00 M_ R0 0 M_ 00 M M_ M M_ R M_ R0 0 M_ 00 M M_ M0 M_0 R0 00 M_ R0 M_0 00 M M_ M M_ R0 00 M_ R0 0 0 M_ M M_ M M_ R M_ R0 M_ 00 M M_ M M_ R M_ R M_ 00 M M_ R 00 M_ R 00 M M_ M_[:0] R M_ M0 M_0 R M_0 00 M 0 M_ R PI M_ R M_[:0],, FN M[ :0] R0.K U PI S0 S S M_[ :0] FT NL TRUTH TL FUTION S S TO, TO TO, TO M M_ M_ M M_ R M_ 00 M 0 M_ R0 M_ 00 M M_ R 0 M_ 00 M M_ R M_ 00 M M_ R M_ 00 M0 M_0 R 0 M_0 00 M M_ R 0 M_ 00 M M_ R M_ 00 M M_ R 0 0 M_ M M_ R M_ 00 M 0 M_ R M_ R M_[:0] INTL ORPORTION PI PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM,. 0 R0.K H H H H S0 [FN] H L = RM T LINS = = IMM 0, T LINS = IMM, T LINS FT SWITHS ( P/ IMM esign) Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

12 FT-SWITHS (RM T LINS & ) R0.K R0 U.K U, FN S0 FN S S0 0, M[ :0] S M_[ :0],, S M[ :0] M_[:0] S M M_ M_ M M_ M M_ M_ R M_ M M_ M M_ R M_ R 00 0 M_ M0 M_0 M M_ R M_0 R 0 M_ 00 M M_ 00 M0 M_0 R 0 M_ R M_0 00 M M_ 00 M M_ R M_ R M_ 00 M M_ 00 M M_ R0 M_ R 0 M_ 00 M M_ 00 M M_ R 0 M_ R 0 M_ 00 M M_ 00 M M_ R 0 M_ R M_ 00 M M_ 00 M M_ R M_ R 0 0 M_ 00 M M_ M M_ R 0 0 M_ R 0 0 M_ 00 M M_ 00 M 0 M_ R0 M_ R M_ 00 M 0 M_ R 00 M_ R R M_[:0],, 00 M_[:0] PI PI R.K FT NL TRUTH TL FUTION S S = RM T LINS U M_[:0] TO, TO H H L = FN S0 S = IMM 0, T LINS M[ :0] M_[ :0] S TO, TO H H H = IMM, T LINS M0 M_0 M_0 M M_ R M_ 00 M 0 M_ R M_ 00 M M_ R M_[:0],,, 0 M_ 00 M0 M_0 R M_0 00 M M_ R M_ M M_ R M_ 00 M M_ R 0 M_ M M_ R 00 M_ 00 M M_ R 0 0 M_ 0 0 M M_ R 00 M_ 00 M 0 M_ R M_ INTL ORPORTION R 00 PLTFORM OMPONNTS IVISION 00 M_[:0],,, 00 PRIRI ITY R. FM- FOLSOM,. 0 0 M[ :0] PI FT SWITHS ( P/ IMM esign) S0 [FN] Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

13 IMM SOKT 0,, M_[:0] J M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ M_ M_ M_ Q0 Q Q Q Q Q Q 0 Q Q Q Q0 Q Q Q Q 0 Q M_ M_ Q Q M_ 0 M_ Q Q M_ M_0 Q Q0 M_ M_ Q Q M_ M_ Q Q M_ M_ Q Q **NOT ON LL IMM SOKTS** M_ 0 M_ Q Q M_ M_ Pin should be pulled to a high state Q Q to accommodate registered IMMs. M_0 M_ Q0 Q, M[:0] M_ M_ Q Q M_ M_ Q Q M_ M_ Q Q M_ 00 M_0 Q Q0 M_ 0 M_ Q Q M_ 0 0 M_ Q Q M_ 0 M_ Q Q R M0 0 0 ohm M M M M M M RG **NOT** If GK is not used M 0 K0 _K0 0 M then each K requires a K _K 0 M K pullup to. M0 M_0 0 (P) 0 M M_ M M_,,, QM[:0] M_ 0 M_ QM0 0 M_ QM0 QM M_ QM QM M_ QM QM QM M_[:0],,, QM QM QM SLV RSS QM S0 QM 0 QM S = 00000b QM QM S SMT,,,,,,, SMLK,,,,,,, M 0 S M SL S_#[:0] SRM IMM 0 Q Q Q Q 0 Q0 Q Q Q Q 0 Q Q Q Q Q Q0 Q 0 /S0 /S /S /S /W0 /S /RS K0 K K K M_ M_ M_ M_ M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ S_#0 S_# S_#0 S_# LK LK LK LK S_#[:0] W_#, SS_#, SRS_#, LK[:0],,, INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 IMM SOKT 0 Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

14 IMM SOKT,, M_[:0] J M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ M_ M_ M_ Q0 Q Q Q Q Q Q 0 Q Q Q Q0 Q Q Q Q 0 Q SRM IMM M_ M_ Q Q M_ 0 M_ Q Q M_ M_0 Q Q0 M_ M_ Q Q M_ M_ Q Q M_ M_ Q Q M_ 0 M_ Q Q M_ M_ Q Q **NOT ON LL IMM SOKTS** M_0 M_ Pin should be pulled to a high state Q0 Q M_ M_ Q Q to accommodate registered IMMs. M_ M_ Q Q M_ M_ Q Q M_ 00 M_0 Q Q0 M_ 0 M_ Q Q M_ 0 0 M_ Q Q, M[:0] M_ 0 M_ Q Q R M0 0 0 ohm M M **NOT** If GK is not used M M then each K requires a K M pullup to. M RG M 0 K0 _K 0 M K _K 0 M M_[:0],,, M0 M_0 0 (P) 0 M M_ M M_ M_,,, QM[:0] 0 M_ QM0 0 M_ QM0 QM M_ QM QM M_ QM QM R QM QM.K QM QM R_S0 SLV RSS = 0000b QM S0 QM 0 QM S QM QM S SMT,,,,,,, SMLK,,,,,,, M 0 S M SL S_#[:] 0 Q Q Q Q 0 Q0 Q Q Q Q 0 Q Q Q Q Q Q0 Q 0 /S0 /S /S /S /W0 /S /RS K0 K K K M_ M_ M_ M_ M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ S_# S_# S_# S_# LK LK LK0 LK S_#[:] W_#, SS_#, SRS_#, LK[:0],,, INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 IMM SOKT Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

15 IMM SOKT,, M_[:0] J M_0 M_ Q0 Q M_ M_ M_ Q Q M_ Q Q M_ M_ M_ Q Q 0 M_0 Q Q0 M_ M_ M_ Q Q M_ Q Q M_ 0 M_ Q Q M_ M_ M_ Q Q 0 M_ Q Q M_0 M_ M_ Q0 Q M_ Q Q M_ M_ M_ Q Q M_ Q Q M_ M_0 M_ 0 Q Q0 M_ Q Q M_ M_ Q Q M_ 0 M_ M_ Q Q M_0 Q Q0 M_ M_ M_ Q Q M_ Q Q M_ M_ M_ Q Q 0 M_ Q Q M_ M_ Q Q M_0 M_ **NOT ON LL IMM SOKTS** M_ Q0 Q M_ Q Q M_ M_ Pin should be pulled to a M_ Q Q M_ Q Q high state to accommodate M_ 00 M_0 M_ 0 Q Q0 M_ registered IMMs. Q Q M_ 0 0 M_ M_ 0 Q Q, M#[:0] M_ R Q Q 0 ohm M#0 0 M# **NOT** If GK is not used M# M# then each K requires a K M# pullup to. M# M# RG _K 0 M# 0 K0 _K 0 M# K M_[:0],,, M# M0 M_0 M 0 (P) 0 M_ M M_,,, QM[:0] M_ 0 M_ QM0 0 M_ QM0, QM M_ QM QM M_ QM QM QM QM Slave address = 0000b QM QM S0 R QM 0 QM R_S QM S, QM QM S.K SMT,,,,,, SMLK,,,,,, M# 0 S M# SL S_#[:] 0 S_# /S0 S_#[:] /S S_# /S S_# /S S_# 0 /W0 W_#, /S SS_#, /RS SRS_#, 0 LK K0 LK K 0 LK 0 K LK K LK[:0],,, SRM IMM INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 IMM SOKT Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

16 IMM SOKT,, M_[:0] M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ M_ M_ M_ M_ M_ Q Q M_ 0 M_ M_ Q Q M_0 Q Q0 M_ M_ M_ Q Q M_ Q Q M_ M_ M_ Q Q 0 M_ Q Q M_ M_ Q Q,, 00/# R0 0K M#, M#[:0] M_0 M_ M_ M_ M_ M_ M_ M_ **NOT ON LL IMM SOKTS** Pin should be pulled to a high state to accommodate R0 0 ohmregistered IMMs. M#0 JP 0 M# M# IOQ PTH SL M# **NOT** If GK is not M# M# used then each K M# requires a K pullup to M# _K 0 RG _K 0 M# 0. M# K0 K M_[:0],,, M# R M0 M_0 0K M 0 (P) 0 M_ M M_,,, QM[:0] M_ 0 M_ QM0 0 M_ QM0 M_ R, QM QM Slave address = QM M_ QM.K 000b QM QM QM QM QM S0 QM 0 QM QM S, QM QM S SMT,,,,,, SMLK,,,,,, M# 0 S M#: = IOQ depth of (default), 0 = IOQ depth of M# SL S_#[:] J Q0 Q Q Q Q Q Q 0 Q Q Q Q0 Q Q Q 0 Q Q Q0 Q Q Q 00 0 Q Q 0 0 Q Q SRM IMM Q Q Q Q 0 Q0 Q Q Q Q 0 Q Q Q Q Q Q0 Q Q Q Q Q Q0 Q 0 Q Q 0 /S0 /S /S /S /W0 /S /RS K0 K K K M_ M_ M_ M_ M_0 M_ M_ M_ M_ M_ M_ M_ M_ M_ M_0 M_ M_ M_ M_ M_ M_0 M_ M_ M_ S_# S_# S_# S_# LK0 LK LK LK S_#[:] W_#, SS_#, SRS_#, LK[:0],,, INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 IMM SOKT Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

17 U0 0 0 S0 0 S0 0 S S S S S S S S S S S S S S S S S S 0 S0 0 S0 S S S S S S S S S S S[ :0] SS# SS# H PS# PS# SS# SS# 0 H 0 PS# PS# U S0 S0 T S S W S S Y S S T0 S S W0 S S U S S 0 V S 0 S Y S S T S S W S0,, [:0] S0 /#0 U S /#0 S /# V S /# S /# Y S /# S /# V S /# S S,, /#[ :0] Y S 0 T S LOKRUN# S W S,,, VSL# VSL# S U S,,, FRM# FRM# S R_ V S ISL S R,,, IRY# IRY# S[ :0],0,,,, 00,, PR PR,,, PIRST# V S0 PIRST# S0, PHL# W S PHOL# S, PHL# U S PHOL# S,,, SRR# T S SRR# S R W S,,, STOP# STOP# S S 00,,, TRY# Y TRY# S,,, PRQ#[:0] T S S PRQ#0 0 V S RQ0# S PRQ# W S RQ# S PRQ# T S RQ# S PRQ# Y S0 RQ# S0 S[:0] V S S S0 Y S S0 S S W S S S S Y S S S PK# G W S PK# S SK# SK# S[ :0] 0,, PRQ F PRQ SRQ Y L SRQ L T L PIOR# F PIOR# L PIOW# F W L PIOW# L PIORY G0 U L0 PIORY L0 SIOR# V L SIOR# L SIOW# Y L SIOW# L SIORY T L SIORY L P0 G P0 L[:], P G Y P MMS# MMS#, P G V P MMR# MMR#,,, U P[:0] MMW# MMW#,,, W SMMR# SMMR# P0 F0 P0 P U P SMMW# SMMW# P 0 T P SYSLK SYSLK, P U0 P L L P 0 Y P IOHK# IOHK#, P 0 P P 0 W P RFRSH# RFRSH#, P 0 V P IOS# IOS#, P Y P ZROWS# ZROWS#, P P P0 W P0 SH# SH# P W P RSTRV RSTRV 0, P Y P IOR# IOR# 0,,, P T P IOW# IOW# 0,,, P T P IOHRY IOHRY 0,, P F Y P N N 0, INTL ORPORTION P[ :0] _0 PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 PI US INTRF I SIGNLS I SIGNLS IS/IO SIGNLS PIIX (PRT I) Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

18 VS U0 0, K#[:0] K#0 U F VS K# W K0# USP USP H K# USP- USP- K# Y0 G K# USP0 USP0 JP ONFIG. K# V H K#[:] K# USP0- USP0- K# T J K# O0 O#0 SV STT ON K# V J VS VS R - POWR OWN. K# W K# O O# K# 0K PIIX POWRS ON 0,, RQ0 W V0 RQ0 XTSMI# XTSMI#, - UF SYS. T POWR-UP. W0 U 0,, RQ U RQ SUS# SUS# 0,, RQ V V RQ GPO/SUS# 0,, RQ U U SUS# RQ GPO/SUS#, RQ Y RQ, RQ U R RQ GPO/PU_STP# PU_STP#, RQ U R 0.0 uf RQ GPO/PI_STP# PI_STP# LV F0 K GPO/ZZ RQ# M N RQ#/GPI JP RQ# RQ#/GPI RQ# P H N RQ#/GPI GPI/THRM# THRM#,, U GNT#/GPO GPI/TLOW# TLOW# _SUS P M GNT#/GPO0 RSMRST# RSMRST# P U0 GNT#/GPO PWRT# PWRT# JMP_P P GPI0/LI LI, **xternal logic shown 0, T V0 T0 T SMT SMT,,,,,, is used to handle R SMLK SMLK,,,,,, J N power loss condition. PIK# H PIK#/GPO GPI/SMLRT# SMLRT# P, PIS# PIS#/GPO GPI/RI# GP_PM#,, PIRQ# K PIRQ#/GPI H0 P IRQ0 J0 IRQ0/GPO SUSLK T,0, IRQ IRQ GPO0/SUS_STT# SUSTT# SHOTTKY T T,0,, IRQ R W IRQ GPO/SUS_STT# J,0,, IRQ IRQ STPLK# STPLK#,, U K0 R,0,, IRQ IRQ SLP# SLP#,, V,0,, IRQ IRQ K,0,, IRQ Y IRQ Y0, IRQ# U IRQ/GPI J,0,, IRQ IRQ VRF VRFV U,0,, IRQ0 IRQ0 W,0,, IRQ IRQ T,0,, IRQ IRQ V.0 uf,0,,, IRQ IRQ Y P 0. uf,0,,, IRQ IRQ GPI PI_PM#,, L GPI VS GPI GPI J J SRIRQ/GPI GPI GPI,,,, PIRQ# PIRQ# R L PIRQ# GPI GPI PIRQ# R K GPI VS,,,, PIRQ# PIRQ# GPI PIRQ# P K GPI VS,,, PIRQ# SPS PIRQ# GPI PIRQ# U Q G H GPI,,, PIRQ# PIRQ# GPI H GPI R N00 GPI H GPI0 SUS# 0 0K GPI0 WOLLI M G K PURST GPI,, FRR# FRR# GPI[0:], PX_IGNN# L IGNN# H0,, HINIT# L INIT,, PX_INTR L INTR 0, 0GT P 0GT GPI L0, PX_NMI SPS NMI,, HSMI# P0 PX_SMI# VS N0 G 0, KRST# GPO0 RT_T RIN# GPO0 FN_L, PX_0M# M0 T 0M# GPO GPO Q M G GPO, PWROK PWROK GPO TP GPO N00 SPKR K F SPKR GPO TP 0K V F TST# TST# GPO IRQOUT.K POWR-ON F R GPO0 R SHOTTKY N MS# R VS 0 XO# M XO#/GPO PGS#0 0 XIR# M L XIR#/GPO PGS0# TP IOSS# M N IOSS# PGS# PGS# PGS#, U U L RTL/GPO R RT_T K J RTS#/GPO N/ PS_POK J Q J Q R K N K 0K V JP KS#/GPO N/ N R N/ LK LK K L M R.K VT N/ RTX R0 M RTX N/ K Q K Q RTX N R RTX N/ VS R H H 0. uf 0 L R U0 Q Mhz_0 Mhz ONFIG PX_FG OS V R JK_LR OS ONFIG N00 SHOTTKY PXPLK PILK R Y R0 HT R R.K 0.uF.K RSMRST# _0 K.KHz V LR MOS MOS_LR JP ONFIG T - NORML - LR MOS pf pf M SIGNLS IRQ SIGNLS PU INTRF F F R R X-US F F G R P T P P P P P P P P P 0 J J0 J J K K0 K K L L0 L L M M0 M M J R N K _US SUS SUS US POWR MNGMNT US GPO/GPI/GPIO/SN GPO# PR L RT_T 0 PR L INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 PIIX (PRT II) Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

19 IOPI U PLKPI PILK RST, PIS# PIK# 0 PIK- PIRQ- PIRQ#, WS# PIK-,,, MMR# R- SMIOUT-,,, MMW# WR- 0,0,,,, S0 0,0,,,, S,0,,, S /I- 0,, PX_INTR INTIN0,0,, IRQ[:] IRQ INTIN IRQ0 INTIN IRQ INTIN IRQ INTIN IRQ INTIN PI0 PI0,, IRQ INTIN PI PI,, IRQ INTIN P_I INTIN 0,0,, IRQ INTIN X[ :0] 0,,,0,, IRQ0 INTIN0,0,, IRQ INTIN,0,, IRQ INTIN 0 X0 INTIN X,0,,, IRQ INTIN X,0,,, IRQ INTIN X X X,,,, PIRQ# INTIN X,,,, PIRQ# 0 INTIN X RP,,, PIRQ# INTIN,,, PIRQ# 0 INTIN R IRQOUT INTIN0 R PU_I PINS : INTIN R PU_I INTIN PU R INTIN,, R R PU_I R PU_TSTIN TSTIN- R 0 R 0.K RST_STY VS 0 LK PILK RST S- PINS :,,, IRQ# U LV P_I INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 IOPI Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

20 U 0 0 R? K R 0K,,,,, S[:0] R.K, T,, RQ[ :0], K#[ :0],,, IRQ[:0],,, IRQ,,, IRQ0,,, IRQ,,, IRQ,,,, IRQ,,,, IRQ RP OS,,, IOR#,,, IOW#, N, RSTRV,, IOHRY,, S[ :0] TP0 TP TP Stuff for XFR TP TP R0 TP 0 TP TP S0 S S S S S S S RQ0 RQ RQ RQ K#0 K# K# K# IRQ IRQ IRQ IRQ IRQ IRQ _IRQ# IRQ IRQ0 IRQ IRQ IRQ IRQ S0 S S S S S S S S S S0 S S S S S SIO_PU TP00 TP0 TP0 TP0 TP0 TP0 TP0 TP VT XTL XTL LOKI IOR# IOW# N RSTRV IOHRY S0 S S S S S S S T RQ0 RQ RQ RQ K0 K K K IRQ IRQ IRQ IRQ IRQ IRQ IRQ# IRQ IRQ0 IRQ IRQ IRQ IRQ S0 S S S S S S S S S S0 S S/S S/HS# S/HS# S/I_IRQ I_IRQ I_O# HS0# HS# IOROP# IOWOP# I_0 I_ I_ FFR 0 PIN QFP LK0 LK0 LK0 LK LK INX# IR# STP# WT# WGT# TRK0# WPT# RT# SI# SKHG# MTR0# MTR# RVSL0# RVSL# RVN0 RVN MI0 MI P0 P P P P P P P SLIN# INIT# F# ST# USY K# P SLT RR# RX TX RTS# TS# TR# SR# # RI# RX TX RTS# TS# TR# SR# # RI# GP0/IRQIN GP/IRQIN GP/IRRX GP/IRTX GP/RS GP/WS GP/JOYRS PR0 PR PR PR PR PR PR PR TP0 TP0 TP0 TP00 IRR_MO TP0 TP0 IRRX IRTX TP0 TP0 TP0 TP TP TP TP0 TP TP TP TP INX# IR# STP# W T# WGT# TRK0# WPT# RT# SI# SKHG# MOT# MOT# RVS# RVS# RW# RT0 PR[ :0] SLIN#R INIT#R F#R ST#R USY K# P SLT RR# RX0 TX0 TS0# TR0# SR0# RLS0# RI0# RX TX RTS# TS# TR# SR# RLS# RI# Stuff for X only onfig Port ddress 0h I/O ecode R K F0h I/O ecode ( FULT) R0 R0 R0 0K K K TP 0pF 0 Stuff for XFR R0 0 RTS0# KY JP INFRR HR 0 KLK# 0 KT# 0 MSLK# 0 MST#,, X[ :0] XO# XIR#.K X0 X X X X X X X Stuff for XFR 0 R0 KLK KT MSLK MST R0 R R R R R R R ROMS# ROMIR# FFR_. GP/JSWS GP0/I_O GP/IN GP/OUT GP/LK GP/N GP/0_P TP0 R_GP TP0 TP00 TP0 R.K TP KRST#, TP TP TP 0GT, 0pF 0. uf INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 0pF 0. uf K ULTR I/O I/O ONTROLLR (ULTR I/O) Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet 0 of 0

21 GP ONNTOR J V,,,, PIRQ# U S0 GP_O#, S[:0] USGP, ST[:0], PIRQ# GLKOUT GRQ# RF# SST R.K S0 S ST0 ST 0 OVRNT# V V US INT# LK RQ#. ST0 ST RF# SPR S0. S S_ST S 0 0 S S S S S S S V SPR RSRV US- INT# RST# GNT#. ST RSRV PIP# SPR S. S RSRV 0 ST S S R.K PIRQ# USGP- U S0 PIRST#,,, GGNT#, PIP#, PIRQ#,,,, G 0 G0 G G.. G G G 0 0 G, ST- _ST RSRV G G/# G/# Vddq. Vddq. G G G 0 G0 G G G/# /# G 0 0 Vddq. Vddq., GIRY# IRY# FRM# GFRM#, SPR SPR SPR SPR.., GVSL# VSL# TRY# GTRY#, Vddq. STOP# GSTOP#, GPRR# PRR# PM# GP_PM#, 0 0 GSRR# SRR# PR GPR, G/# /# G Vddq. Vddq. G G G G G0 0 G G /0# G/#0 Vddq. Vddq., ST- _ST0 RSRV G 0 0 G G G G G Vddq. Vddq. G 0 G0 RSRV RSRV INTL ORPORTION GP_ONN_. PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 G[:0] LRT GRPHIS PORT (GP) ONNTOR G/#[:0] Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

22 PI ONNTORS N -V V -V V R R.K.K J J0 -V TRST# PTRST# -V TRST# PTRST# PTK PTK TK V TK V PTMS TMS PTMS TMS TO TI PTI PTI R TO TI V V V V PIRQ# V INT# PIRQ#,,,, V INT#,,,, PIRQ# INT# INT# PIRQ#,,,.K PIRQ# INT# INT# PIRQ#,,, PIRQ# PIRQ# INT# V INT# V PRSNT# PRSNT# PRSNT# RSV PRSNT# RSV RSV V RSV V PRSNT# PRSNT# PRSNT# RSV PRSNT# RSV RSV RSV RSV RSV RST# PIRST#,,, RST# PIRST# PLK LK V PLK LK V GNT# PGNT#0, GNT#,, PRQ#0 RQ#,, PRQ# RQ# PI_PM# V PM# V PM# 0 0 () (0) () (0) 0 ().V ().V () () () () () () () ().V ().V () /# /#) ISL R_ /# /#) ISL R_ ().V ().V () () () (0) 0 () (0) () ().V ().V () () () () () /# /# /#().V /#().V FRM# FRM#,,, FRM# FRM#,,, IRY# IRY# IRY# IRY# TRY#.V TRY# TRY#,,,.V TRY#,,, VSL# VSL# VSL# VSL# STOP# STOP#,,, STOP# STOP#,, PLOK# LOK#.V PLOK# LOK#.V, PRR# 0 0 SON_P PRR# 0 0 PRR# SON PRR# SON SO_P.V SO#.V SO#,,, SRR# SRR# SRR# SRR# PR.V PR PR,,.V PR /# /#() () /# /#() () ().V ().V () () () () () () 0 (0) 0 (0) (0) (0) KY /#0 () /#(0) () /#(0) /#0 ().V ().V.V (0).V (0) () (0) () (0) () () (0) (0) () (00) 0 () (00) 0 V V V V PU_RQ# 0 0 PU_K# PU_RQ# 0 0 PU_K# K# RQ# K# RQ# V V V V V V V V KY R0.K PGNT#, PI_PM#,, SON_P SO_P PI_ONN PI_ONN,, /#[:0],, [:0] PRSNT# 0. uf R R_ SON_P SON_P SO_P SO_P RP.K PRSNT# PRSNT# PRSNT# 0. uf 0. uf 0. uf PU_K# PU_RQ# PU_K# PU_RQ# R R.K.K R R.K.K 00 R 00 INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 R_ PI ONNTORS & Size ocument Number Rev ustom.0 Intel(R) 0GX GPset ate: Friday, October 0, Sheet of 0

23 -V V PI ONNTORS N -V V J J -V TRST# PTRST# -V TRST# PTRST# PTK PTK TK V TK V PTMS TMS PTMS TMS TO TI PTI TO TI PTI V V V V PIRQ# V INT# PIRQ#,,, V INT#,,, PIRQ# INT# INT# PIRQ#,,,, PIRQ# INT# INT# PIRQ#,,,, PIRQ# PIRQ# INT# V INT# V PRSNT# PRSNT# PRSNT# RSV PRSNT# RSV RSV V RSV V PRSNT# PRSNT# PRSNT# RSV PRSNT# RSV RSV RSV RSV RSV RST# PIRST#,,, RST# PIRST# PLK LK V PLK LK V GNT# PGNT#, GNT#,, PRQ# RQ#,, PRQ# RQ# PI_PM# V PM# V PM# 0 0 () (0) () (0) 0 ().V ().V () () () () () () () ().V ().V () /# /#) ISL R_ /# /#) ISL R_ ().V ().V () () () (0) 0 () (0) () ().V ().V () () () () () /# /# /#().V /#().V FRM# FRM#,,, FRM# FRM#,,, IRY# IRY# IRY# IRY# TRY#.V TRY# TRY#,,,.V TRY#,,, VSL# VSL# VSL# VSL# STOP# STOP#,,, STOP# STOP#,, PLOK# LOK#.V PLOK# LOK#.V, PRR# 0 0 SON_P PRR# 0 0 PRR# SON PRR# SON SO_P.V SO#.V SO#,,, SRR# SRR# SRR# SRR# PR.V PR PR,,.V PR /# /#() () /# /#() () ().V ().V () () () () () () 0 (0) 0 (0) (0) (0) KY /#0 () /#(0) () /#(0) /#0 ().V ().V.V (0).V (0) () (0) () (0) () () (0) (0) () (00) 0 () (00) 0 V V V V PU_RQ# 0 0 PU_K# PU_RQ# 0 0 PU_K# K# RQ# K# RQ# V V V V V V V V KY PGNT#, PI_PM#,, SON_P SO_P PI_ONN PI_ONN,, /#[:0],, [:0] SON_P SON_P SO_P SO_P RP.K PRSNT# PRSNT# PRSNT# PRSNT# 0. uf 0. uf 0. uf 0 0. uf PU_K# PU_RQ# PU_K# PU_RQ# R R.K.K R R.K.K R 00 R0 00 INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 R_ R_ PI ONNTORS & Size ocument Number Rev ustom.0 Intel(R) 0GX GPset ate: Friday, October 0, Sheet of 0

24 R K IS SLOTS 0 & R K RSTRV -V,,0, IRQ -V,0, RQ V, ZROWS# SMMW# SMMR#,0,, IOW#,0,, IOR#,0 K#,0, RQ,0 K#,0, RQ, RFRSH#, SYSLK,,0, IRQ,,0, IRQ,,0, IRQ,,0, IRQ,,0, IRQ,0 K#,0 T L OS J RSTRV IRQ -V RQ -V ZROWS# 0 V SMMW# SMMR# IOW# IOR# K# RQ# K# RQ 0 RFRSH# SYSLK IRQ IRQ IRQ IRQ IRQ K# T L 0 OS IOHK# S S S S S S S S0 IOHRY N S S S S S S S S S S0 S S S S S S S S S S IOHK#, S,0, S,0, S,0, S,0, S,0, S,0, S,0, S0,0, IOHRY,0, N,0 S,, S,, S,, S,, S,0,, S,0,, S,0,, S,0,, S,0,, S0,0,, S,0,, S,0,, S,0,, S,0,, S,0,, S,,0,, S,0,, S,0,,, S,,0,,, S0,,0,,, V NS T -V -V RSTRV IRQ RQ ZROWS# SMMW# SMMR# IOW# IOR# K# RQ K# RQ RFRSH# SYSLK IRQ IRQ IRQ IRQ IRQ K# T L OS J RSTRV IRQ -V RQ -V ZROWS# 0 V SMMW# SMMR# IOW# IOR# K# RQ# K# RQ 0 RFRSH# SYSLK IRQ IRQ IRQ IRQ IRQ K# T L 0 OS IOHK# S S S S S S S S0 IOHRY N S S S S S S S S S S0 S S S S S S S S S S IOHK# S S S S S S S S0 IOHRY N S S S S S S S S S S0 S S S S S S S S S S0, MMS#, IOS#,,0, IRQ0,,0, IRQ,,0, IRQ,,0,, IRQ,,0,, IRQ,0 K#0,0, RQ0 K#, RQ K#, RQ K#, RQ RMSTR# 0 MMS# IOS# IRQ0 IRQ IRQ IRQ IRQ K0# RQ0 K# RQ K# RQ K# RQ MSTR# SH# L L L L0 L L L MMR# MMW# S S S0 S S S S S 0 SH# L, L, L, L0, L, L, L, MMR#,,, MMW#,,, S, S, S0, S, S, S, S, S, **NOT** FULT NO STUFF. THIS P US TO FILTR NOIS ON T SIGNL MMS# IOS# IRQ0 IRQ IRQ IRQ IRQ K#0 RQ0 K# RQ K# RQ K# RQ RMSTR# 0 MMS# IOS# IRQ0 IRQ IRQ IRQ IRQ K0# RQ0 K# RQ K# RQ K# RQ MSTR# SH# L L L L0 L L L MMR# MMW# S S S0 S S S S S 0 SH# L L L L0 L L L MMR# MMW# S S S0 S S S S S pf ON_IS ON_IS IS 0 IS pf INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 IS SLOTS Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

25 I ONNTORS S[:0] P[:0] RSTRV# R J R R_RSTRV# RSTRV# R_RSTRV# # # # J #,,0,, RP # # RP RP # # RP P P S S P # 0# P S # 0# S P P0 S S0 P # 0 # P S # 0 # S P P S S P # # P S # # S P 0 0 P S 0 0 S P0 # # P S0 # # S # # R # # R0 R 0K R 0K 0# # K 0# # K 0 0 R R0 PRQ R_PRQ# SRQ R_SRQ# R R PIOW# R_PIOW# SIOW# R_SIOW# R R PIOR# R_PIOR# SIOR# R_SIOR# R R R R PIORY PRI_P SIORY S_P 0 0 RP 0 RP0 0 PK# RPK# SK# RSK# P R_P R S R_S R P0 R_P0 P S0 R_S0 S R_P R_S R R0 PS# R R PS# R_PS# R_PS# SS# R_SS# R_SS# SS# 0 ITP# ITS# 0 P[:0] S[:0] IRQ R.K R PRIMRY I ONN.,,0,, IRQ R.K R RIRQ SONRY I ONN. INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 PI I ONNTORS Size ocument Number Rev ustom.0 Intel(R) 0GX GPset ate: Friday, October 0, Sheet of 0

26 F.-.0 US_PWR0 R 0K (TNTLUM) US ONNTORS O#0 LM00S L R 0.00uF 0K LM00S US0 T F L US_PWR USG0.-.0 R L 0K US_ON_0.0 uf (TNTLUM) 0. uf R O# 0 pf L LM00S 0 LM00S R 0.00uF 0K J GP_O# USP0 R0 0K R0 0 O NOT STUFF R R uf 0. uf T- USP0- R R USP- 0 R R0 USP 0 USV0 USV US USG 0 0 pf L J T- US0- US- LM00S T US_ON_0.0 U0 U L LM00S **NOT: PL R- N - S LOS S POSSIL TO TH PIIX. pf 0 pf pf pf R K R K R K R K R_US R_US- O NOT STUFF R 0 R 0 USGP USGP- INTL ORPORTION NOT: US PIIX PPLITION NOT FOR LYOUT GUILINS PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 US HR Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

27 STUFFING OPTION,,0,,, S[:0],, PWRGOO,,, MMW#,,, MMR# U HT MO JP Prog oot lock - PROG V (incl. boot block) - PnP - Write Protect - R_RP# _S S JP JP0 V JP J_S FLMPU 0.0 uf SYSTM ROM S S S S S S S S0 S S S S S S S S S S0 MO NORML ROVRY JP0 - - FLSH SOKT U W# O# # 0 RP# F00-T U Q0 Q Q Q Q Q Q Q VPP TSOP SOKT X0 X X X X X X X 0.0 uf FL_VPP X[:0],0, JP V FLMPU S S S S S S S S S S S S0 X0 X X JP mulator Header X X X X X S S S S S S S MMW# S0 IOSS# * Header provided for IOS emulation IOSS# INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 SYSTM ROM Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

28 0pF 0pF 0pF IN 0pF 0pF PRVOLTS 0 PR[:0] 0 F#R 0 ST#R 0 INIT#R 0 SLIN#R PR0 PR PR PR RP RP RP K RP K 0pF 0pF 0pF 0pF 0 0pF 0pF PRLLL HR ST# P0 P P P P P P P K# USY P SLT J 0 0 F# RR# INIT# SLIN# PR PR PR PR RP RP K 0pF 0pF RP 0pF 0pF 0 RR# 0 SLT 0 P 0 USY 0 K# K RP K 0pF 0pF INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 PRLLL PORT Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

29 V J0 U SP_0 0 SP_SR0 SP_0 SP_RX0 SP_SR0 R RY RLS0# 0 SP_RTS0 OM 0 SP_RX0 R RY SR0# 0 R SP_TX0 SP_RTS0 RY RX0 0 SP_TS0 Y HR SP_TX0 RTS0# 0 Y SP_TR0 SP_TS0 TX0 0 R SP_RI0 SP_TR0 RY TS0# 0 Y SP_RI0 TR0# 0 RI0# 0 R RY RI0# V GSOP 0 00pF 00pF 00pF 00pF 00pF 00pF 00pF 00pF V SP_ SP_SR SP_RX SP_RTS SP_TX SP_TS SP_TR SP_RI -V 0 U R RY R RY R RY Y Y R RY Y R RY - GSOP 0 RI# RLS# 0 SR# 0 RX 0 RTS# 0 TX 0 TS# 0 TR# 0 RI# 0 SP_ SP_SR SP_RX SP_RTS SP_TX SP_TS SP_TR SP_RI 00pF 00pF 0 00pF 00pF J 0 OM HR 00pF 00pF 00pF 00pF RP K R.0K FLOPPY INTRF HR **NOT** onnected to GPI of the PIIX for IOS detection of a floppy drive. J 0 SKHG# 0 SI# 0 RT# 0 0 WPT# 0 TRK0# 0 W G T# 0 WT# 0 STP# 0 0 IR# 0 MOT# 0 RVS# 0 RVS# 0 MOT# 0 INTL ORPORTION 0 INX# 0 RT0 PLTFORM OMPONNTS IVISION TP TP0 00 PRIRI ITY R. FM- 0 RW# FOLSOM, 0 GPI SRIL N FLOPPY Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

30 STUFFING OPTION F. F. KV L LM00S 0 KT# 0 KLK# L LM00S L LM00S KT_F# KLK_F# TP TP TP0 TP0 KSI KV_F J KYOR ONNTOR 0 MST# 0 MSLK# L0 LM00S L LM00S MST_F# MSLK_F# TP0 TP TP0 TP0 J MOUS ONNTOR 0pf 0pF 0pF 0pF 0 0. uf KSH L LM00S L LM00S INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 KYOR/MOUS INTRF Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet 0 of 0

31 VI_[:0] VI_[:0] OR V V OR V V J J Vin Vin Vin Vin Vin Vin R0 0K R 0K Vin Vin Vin Vin Vin Vin R 0K R 0K Vin VIN Vin VIN Vin RS. Vin RS. ISHR OUTN RO ISHR OUTN RO VI_0 VI0 VI VI_ VRM_PG VI_0 VI0 VI VI_ VRM_PG VI_ VI_ VI VI VI PWRG VI_ OR VI_ VI_ VI VI VI PWRG VI_ OR 0 core 0 0 core 0 core core core core core core core core core core core core core core 0 core core VRM_.0 core 0 **NOT** VRM should not be installed if a processor is not installed unless VRMx_PG is asserted by the VRM with a VI =. If not asserted by the VRM, then circuitry must be provided to the block VRMx_PG for the unpopulated Slot. 0 core core VRM_.0 core 0 uf V 0% (Solid Tantalum) VTT RGULTOR VR VIN LT-. **NOT** VOUT. VOLTG RGULTOR SHOUL LOT NR TH GX. OF OUTPUT URRNT IS NSSRY FOR P SIGN. TH LT-. IS ONLY PL OF. MY N NOTHR RGULTOR. uf V.0 uf 0% (Solid Tantalum) VTT.0 uf RMI XR V.0 uf V_G V_R R.K % VR S/ VIN F LT_0. IPOS ING GT OMP R.0K % 00pF.V RGULTOR V_R V_R R 00 VR 0.0 uf R 0.0 uf VG.0 uf RMI XR Q MMFT0L uf V 0%. INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 - ONVRTR ONNTORS Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

32 V V R R RSTRV# U.K K,0 RSTRV U HT U HT SPK R00 R0 RSTRV TP UZZ TP KY FN_L SPKR J F0 UF F0 U R 0 R 0 00pF POWR L HR key J UL-OLOR L GRN 0 R Q P-FT N R0.K,, ITP# ITS# RST SWITH HR SPKR _SLOTO# _SLOTO# J MMZL SOT- R0 0K VRM_PG VRM_PG JP_RST S VS R0.K U R0 0K U R 00 R0.K LS0 R0.K LS0 0.0 uf SPK HR RIV L ONNTOR U0 LS0 0.0 uf 00 0uF VS Q MMT0L U H0 0uF R U0 LS0 I_L 0pF VS R0 0 ILPU 0pF (.V) U TX POWR ONNTOR R K J HR J 0. uf LS0 _SUS uf 0 0. uf 0. uf R0.K R.K V V (.0V) R_RSMRST# RST# V -V PU FN HRS J SNS V R0 0-.K -V PG J R.K SNS V VS R 0 U HT U LV Resume Reset circuitry using a msec delay and Schmitt trigger logic. 0- R0.K PG RSM F0 PUFN PUFN VS PG U H0 U HT VS VS 0 U 0 LV PG 00pF S SW PUSHUTTON OPTIONL TX ONNTOR PI required POWR UTTON to be located on the front of the chassis. JP PWR_ON_JMP U F0 J M FanM V Fan RS Sense Molex R0 0K PG WOLLI VS PS_POK, LI RSMRST# 0. uf R.K VS U U LV U R 0 LS0 F0 VS INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 FRONT PNL VS U LV. R K R.K R 0 VS U S0 R.K PWRGOO,, PWROK, Wake-On-LN Header J MP - (or Foxconn HF00) PSFN PWRT# POWR-ON **OPTIONL** WOL support requires 00m of Stand-y current. Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

33 o de} PROSSOR US/OR FRQUY RP0.K JP KL_FG 0_P U 0M#,, Processor ore Freq : System us Freq LINT[] JP L L LINT[0] JP L L IGNN# JP L H 0M# JP L L KL_FG KL_FG JP KL_FG JP JP F0 U IGN_P F0 IGNN#,, / / L H Reserved L L L L L H ll Other ombinations, HLLL-HHHL L H L H H H L L R 0K, PX_0M#, PX_IGNN#,, PX_INTR, PX_NMI U Y Y Y Y Y Y Y Y LINT0_P LINT_P U F0 U 0 LINT0,, LINT,, H H H H RST# G G F0 FT R U 0 LS0 0 RST VS U LV RST_STY INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 PROSSOR US/OR FRQUY Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

34 PI US PIIX, PRR#,,, SRR#,, PLOK#,,, STOP#,,, VSL#,,, TRY#,,, IRY#,,, FRM# PRQ#,,, PIRQ#,,, PIRQ#,,,, PIRQ#,,,, PIRQ#,, PRQ#,, PRQ#,, PRQ#,, PRQ#0 PGNT#, PGNT#, PGNT#, PGNT#, PGNT#0, PGS#, PHL#, PHL# RQ# RQ# RQ#, PIRQ#,, THRM#,0 0GT,0 KRST# TST# SMLRT# TLOW#,, PI_PM#, LI, XTSMI# PX_FG, PIS#,,,,,, SMT,,,,,, SMLK,, PX_INTR, PX_IGNN#, PX_0M#, PX_NMI GPI[0:] RP R R R R PU R R R R 0 R.K RP R R R R PU R R R R 0 R.K RP.K RP.K R0.K GPI GPI GPI GPI GPI GPI GPI GPI0 RP R R R R R R R R 0 R.K RP R R R R R R R R 0 R PU PU.K R.K R.K RP.K RP0.K RP VS SLOT GP, _SLOTO#, _SLOTO#,, FRR#, THRMTRIP#, TSTHI,, PI[:0], FLUSH#,, STPLK#,, HSMI#,, SLP#,, HINIT#,, 0M#,, IGNN#,, LINT0,, LINT GPRR# GSRR#, GSTOP#, GVSL#, GTRY#, GIRY#, GFRM#, ST-, ST-, SST, GGNT#, GRQ#, PIP#, RF#, GP_PM#, GPR R.K R.K R 0 R 0 R.K R PI0 0 R PI 0 R 0 R0 0 R 0 R 0 R 0 RP R R R R PU R R R R 0 R 0 R.K R R.K.K R R.K.K R R.K,K R R.K.K R.K R R0.K.K R R.K.K R.K R 00K.. VS **NOT** Resistor values on signals STPLK#, P_SMI#, PX_SMI#, SLP# & HINIT# enable an LI to be used for board debug. If an LI will not be used for debug the resistor values should be changed to K ohm. GPI.K RP.K INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 US RSISTORS Size ocument Number Rev ustom.0 Intel(R) 0GX GPset ate: Friday, October 0, Sheet of 0

35 UNUS GTS VS UF VS R U0 LS0, IRQ# R, IOHK# U.K 0 UF LV.K R LS0, ZROWS# RP K U0 HT,,0, IRQ R,,0,, IRQ,0, IOHRY,,0,, IRQ K LS0 U.K R LV RMSTR# U K RP R U,,0 IRQ R,,0, IRQ R, RFRSH#,,0, IRQ R F0,,0, IRQ K R PU,,0, IRQ R R U,,0, IRQ R S0 U,,0, IRQ R,0,, IOR# LV,,0, IRQ0 R 0.K U,,0, IRQ R.K R0 F0 0,,, MMR#,0, S[:0].K U RP S0 VS S0 R 0 R S UF U0 R, MMS# S R S K R PU F0 S R S R R S UF R, IOS# S0 HT S R S 0 K R U0.K F0,,0,,, S[:0] RP RP S S R S S0 R R HT S S R R S S R R PU S U0 S R PU R S S R R S S R R R S R,0,, IOW# R S 0 R,,, MMW# 0 R HT.K.K VS RP U0 S0 R S 0 R RP S U R,0, RQ0 S R R PU,0, RQ S R R HT,0, RQ S R R,0, RQ S R PU R S U0F, RQ R R F0, RQ S 0 R R, RQ R.K R 0 U R RP0 HT.K S R S0 R L R L R PU F0 L R L0 R L R L U R L 0 R 0, L[:].K IS US F0 0 UF F0 INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 IS US PULLUPS Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

36 IMM OUPLING GX OUPLING 0. uf 0. uf 0. uf 0 0. uf 0.0 uf V V V uf V V V 0. uf 0. uf 0. uf 0 0. uf 0.0 uf V V V uf V V 0 V 0. uf 0. uf 0. uf 0 0. uf 0.0 uf V V V uf V V 0. uf V 0.0 uf 0. uf 0. uf 0. uf 0 V V V V 0 V uf V 0. uf 0. uf 0. uf V V V uf V 0. uf 0. uf 0. uf V V V 0. uf 0. uf 0. uf V V V KF OUPLING K00 OUPLING. uf 0pF 0.0 uf V 0pF V uf 0.0uF V 0pF V 0 uf 0.0uF INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 RM, LOK N GX OUPLING PITORS Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

37 ULK POWR OUPLING 0 0 uf V 0. uf uf V 0. uf V V 0. uf V 0. uf V VOLT OUPLING v -v -v 0. uf 0. uf V V uf 0. uf uf V uf V uf V V V 0. uf 0. uf 0. uf 0. uf 0. uf V V V 0. uf V 0. uf V 0 V V 0. uf 0. uf V V 0. uf 0. uf V V 0. uf 0. uf V V 0. uf 0. uf OR VOLTG OUPLING 0 0. uf V 0. uf V OR OR OR OR 0. uf V 0. uf V 0uF 0uF 00uF 0.0uF V V 00 V 0 V 0 V 0 V 0uF 0uF 00uF 0 V 0 V 0 V 0uF 0uF 00uF 0 V 0 V 0 V 0uF 0uF 0 V V 0uF V INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0. VOLT N ULK POWR OUPLING Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

38 **THIS TRMINTION OUPLING IS OPTIONL. TRMINTION VOLTG OUPLING VTT 0. uf 0. uf V 0 V 0. uf 0. uf V V 0. uf 0. uf V V 0. uf 0. uf V 0. uf V 0. uf V V 0. uf 0. uf V 0 V 0. uf 0. uf V V 0. uf 0. uf V V INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 TRMINTION OUPLING Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

39 0.uF,0,, IOR# IOR#,0,, IOW# IOWR# R R, SYSLK SYSLK X0 R 0.K.K X 0 X 0K X X X X X,0, X[ :0] S#, PGS# 0 0 LM SMI# XTSMI#,,,0,,, S0,,0,,, S NMI/IRQ# ** NOT** This device is powered by,0,,, S V only and requires a VIH of.v on VI0 HRWR OR VTT V -V -V VI0 VI MONITOR it's SMUS interface. Here is a V-V VI VI VI PS_YPSS SMUS level translation circuit. VI VI VI R R R R R0 R R VI/NTST RST# VI[:0] SMI_IN# HSIS_INTRU Q 0K 0K 0K.K K K 00K TI# PUFN FN PSFN FN PUFN FN N0 R R R R R 0 U IN0 IN IN IN IN -IN F F -IN LM Slave address = 000b.K 00K 0.K.K.K 0K S 0 SL Q N0 SHOTTKY R R.K R SMT,,,,,, SMLK,,,,,, INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM,. 0 LM- MONITORS Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Friday, October 0, Sheet of 0

40 RVISION.0 - Initial public release: June,. INTL ORPORTION PLTFORM OMPONNTS IVISION 00 PRIRI ITY R. FM- FOLSOM, 0 R evision History Size ocument Number Rev ustom Intel(R) 0GX GPset.0 ate: Sheet 0 of 0