Control. Control. the ALU. ALU control signals 11/4/14. Next: control. We built the instrument. Now we read music and play it...

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1 // CS 2, Fall 2! CS 2, Fall 2! We built the instrument. Now we read music and play it... A simple implementa/on uc/on uct r r 2 Write r Src Src Extend 6 Mem Next: path 7-2 CS 2, Fall 2! signals CS 2, Fall 2! the Op Main Other lines A invert lines FuncGon AND OR add subtract set on less than NOR B negate Op (B invert and LSB CarryIn) path 7-3 uc/on [3- ] Note sub- ler for simplifies main unit. 2 [3-26] [25-2] [2-6] [5 - ] [5 - ] r r 2 Write r 6 Extend [5- ] overflow 8-

2 // CS 2, Fall 2! Using Op and Funct field to set bits ucgon opcode Op ucgon operagon Funct field Desired acgon input LW load word XXXXXX add SW store word XXXXXX add equal branch equal XXXXXX subtract R- type add add R- type subtract subtract R- type AND and R- type OR or R- type set on less than set on less than CS 2, Fall 2! From truth table to Op OP Op Funct field F5 F F3 F2 F F F (5 ) Op X X X X X X X X X X X X X X X X X X X X X X X X F3 F2 F F Op Op Op block Operation2 Operation Operation Op CS 2, Fall 2! Main unit input; 6- bit opcode output: 9 bits Opcode uct R- format lw sw beq Inputs Op5 Op Op3 Op2 Op Op R-format Iw sw beq Outputs Src Mem CS 2, Fall 2! The data path with signals [3-26] uc/on [3- ] Op [25-2] [2-6] [5 - ] r r 2 Write r Src Src Mem Op [5 - ] Extend 6 [5- ] OpO

3 // CS 2, Fall 2! We start with R- instrucgons* Tells us what to perform First operand Second operand Result goes here CS 2, Fall 2! R- instruc/ons data and signals [3-26] Op Src Src Mem Opcode! rs! rt! rd! shmamt! funct! 6! 5! 5! 5! 5! 6! Main To read inputs of register file To write address for register file *R- type (for register) or R- format include add, sub, and, or, and slt. uc/on [3- ] [25-2] [2-6] [5 - ] [5 - ] r r 2 Write r Extend 6 [5- ] CS 2, Fall 2! I- instrucgons come next Tells us what to perform Base register for lw & sw Value read or wriden for lw or sw Offset or address CS 2, Fall 2! I- instruc/ons data and signals [3-26] Op Src Src Mem Opcode! rs! rt! 6! 5! 5! 6! Decoder generates s To read inputs of register file Constant! extended, mul/plied by and added to *I- type include lw, sw, beq, and bnq. Recall lw $t, 2($t).! uc/on [3- ] [25-2] [2-6] [5 - ] [5 - ] r r 2 Write r Extend 6 [5- ]

4 // CS 2, Fall 2! CS 2, Fall 2! lw $t, 2($t)! [3-26] Op Src Src Mem instrucgons are also I- format Tells us what to perform Base register for lw & sw Value read or wriden for lw or sw Offset or address uc/on [3- ] [25-2] [2-6] [5 - ] [5 - ] r r 2 Write r Extend 6 [5- ] Opcode! rs! rt! 6! 5! 5! 6! Decoder generates s To read inputs of register file *I- type include lw, sw, beq, and bnq. Constant! ed extended, mul/pled by and added to CS 2, Fall 2! CS 2, Fall 2! beq $s, $s2,! beq $s, $s2,! [3-26] Op Src Src Mem [3-26] Op Src Src Mem uc/on [3- ] [25-2] [2-6] [5 - ] r r 2 Write r uc/on [3- ] [25-2] [2-6] [5 - ] r r 2 Write r [5 - ] Extend 6 [5- ] [5 - ] Extend 6 [5- ]

5 // CS 2, Fall 2! CS 2, Fall 2! lines in sum j! uction Src Memto- Reg Reg Write Mem Mem Write Op p R-format lw sw X X beq X X!!! 6 bits 26 bits sgll bits What about j? *Replace the lower 28 bits of the with the lower 26 bits of the instruc/on le@ shi@ed by 2 (mul/plied by ) CS 2, Fall 2! j! uc/on[25- ] ucgon 26 ShiX lex 2 28 Extend 6. uc/on[5- ] Jump Src CS 2, Fall 2! adding jump [3-26] uc/on [3- ] [25- ] Op [25-2] [2-6] [5 - ] [5 - ] Jump r r 2 Write r 28 +[3-28] Src 6 Extend [5- ] Src Mem *Replace the lower 28 bits of the with the lower 26 bits of the instruc/on offset by OpGmizaGons next: pipelining, caches 8-2 5

6 // CS 2, Fall 2! Single cycle pros and cons Con Inefficient: clock must be Gmed to accommodate the slowest instrucgon. Cycle Cycle 2 Clk lw sw Waste Con May be wasteful of area since some funcgonal units (e.g., adders) must be duplicated since they can not be shared during a clock cycle Big Pro Simple and easy to understand OpGmizaGons next: pipelining, caches 8-2 6

EC 413 Computer Organization

EC 413 Computer Organization rithmetic Logic Unit (LU) and Register File Prof. Michel. Kinsy Computing: Computer Organization The DN of Modern Computing Computer CPU Memory System LU Register File Disks