Logic design? Transistor as a switch. Layered design approach. CS/COE1541: Introduction to Computer Architecture. Logic Design Review.

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1 Logic design? CS/COE54: Introduction to Computer rchitecture Digital hardware is implemented by way of logic design Digital circuits process and produce two discrete values: and Example: -bit full adder (F) Logic Design Review Sangyeun Cho Computer Science Department Layered design approach Transistor as a switch Logic design is done using logic gates Often we design desired function using high-level languages and somewhat higher level than logic gates Two approaches in design Top down Bottom up G N -type TR X G= X G= X X X X Microarchitecture Function blocks Logic gates G G= G= Transistors P -type TR

2 n inverter When = P -type TR P -type TR OFF = = N -type TR N -type TR ON When = bstraction P -type TR ON P -type TR = = N -type TR OFF N -type TR

3 Logic gates Describing a function 2-input ND B = & B Output = F(Input, Input,, Input N ) Output B = F (Input, Input,, Input N ) Output C = F (Input, Input,, Input N ) 2-input OR B = B Methods 2-input NND B =~( & B) Truth table Sum of products Product of sums 2-input NOR B =~( B) Truth table Sum of products Input Output B C in S C out Input Output B C in S C out S = B C in + BC in + B C in + BC in C out = BC in + B C in + BC in + BC in

4 Combinational vs. sequential logic Combinational logic Combinational logic = function function whose outputs are dependent only on the current inputs s soon as inputs are known, outputs can be determined Sequential logic = combinational logic + memory Some memory elements (i.e., state ) Outputs are dependent on the current state and the current inputs Next state is dependent on the current state and the current inputs inputs outputs Sequential logic Combinational logic ny combinational logic can be implemented using sum of products or product of sums inputs outputs Input-output relationship can be defined in the truth table format From the truth table, each output function can be derived current state next state Boolean expressions can be further manipulated (e.g., to reduce cost) using various Boolean algebraic rules clock

5 Boolean algebra Boolean algebra Boole, George (85~864): mathematician and philosopher; inventor of Boolean lgebra, the basis of all computer arithmetic Binary values: {,} Two binary operations: ND ( / ), OR (+) One unary operation: NOT (~) Binary operations: ND ( / ), OR (+) Idempotent a a = a+a= a Commutative a b = b a a+b = b+a ssociative a (b c) = (a b) c a+(b+c) = (a+b)+c Distributive a (b+c) = a b + a c a+(b c) = (a+b) (a+c) Boolean algebra Expressive power De Morgan s laws ~(a+b) = ~a ~b ~(a b) = ~a+~b With ND/OR/NOT, we can express any function in Boolean algebra Sum (+) of products ( ) More a+(a b) = a a (a+b) = a ~~a = a a+~a = a (~a) = What if we have NND/NOR/NOT? What if we have NND only? What if we have NOR only?

6 Multiplexor (aka MUX) 32-bit MUX B S = (S)? B:; Simplifying expressions Karnaugh map Input Output B C in S C out BC in C in BC in C out = BC in + B C in + BC in + BC in C out = BC in + C in + B B C out = BC in +B+C in

7 Building a -bit LU Building a 32-bit LU LU = arithmetic logic unit = arithmetic unit + logic unit Implementing sub Implementing NND and NOR

8 Implementing SLT (set-less-than) Implementing SLT (set-less-than) -bit LU for bits ~3 -bit LU for bit 3 Supporting BEQ and BNE bstracting LU zero detector Note that LU is a combinational logic

9 RS latch RS latch Beware of the feedback! When R=, S= RS latch RS latch When R=, S= When R=, S=, and Q was

10 RS latch RS latch When R=, S=, and Q was What happens if R=S= D latch D latch R S Note that we have an RS latch in the back-end of this design Note that R, S inputs always get opposite values when C= When C=, S=R= RS latch remembers the previous value

11 D latch D latch D Q latched mode D Latch R C D Q(t) C Q Q(t-) Q(t-) S transparent mode D flip-flop (D-FF) D flip-flop D Q D-FF C Q Two cascaded D latches; C input of the second is inverted This is a negative edge triggered D-FF

12 Finite state machine (FSM) Traffic light control example Two states NSlite: green light on North-South road EWlite: green light on East-West road Current state goes for 3 seconds, then Switch to the other state if there is a car waiting Current state goes for another 3 seconds if not We use /3 Hz clock Traffic light control example Traffic light control example

13 Traffic light control example To wrap up Let s assign to NSlite and to EWlite initially NextState = CurrentState EWcar + CurrentState NScar NSlite = CurrentState EWlite = CurrentState In digital logic, transistors are used as simple switches Logic gates are an abstraction of a transistor network combinational logic block has inputs and outputs whose values are immediately determined as inputs become known sequential logic block is composed of a combinational logic block and memory elements To wrap up To wrap up Boolean algebra provides a theoretical foundation for digital logic Starting from two transistors (N-type and P-type), we ve built logic gates and more complex structures (bottom up) Flip-flops (FFs) were used as a memory element finite state machine (FSM) can be implemented using FFs and some combinational logic n LU for the MIPS architecture has been built!

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