Outcomes. Spiral 1 / Unit 3. The Problem SYNTHESIZING LOGIC FUNCTIONS

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1 Outcomes Spiral / Unit 3 Minterm and Materms Canonical Sums and Products 2 and 3 Variable oolean lgebra Theorems emorgan's Theorem unction Snthesis use Canonical Sums/Products Mark Redekopp I know the difference between combinational and sequential logic and can name eamples of each. I understand latenc, throughput, and at least technique to improve throughput I can identif when I need state vs. a purel combinational function I can convert a simple word problem to a logic function (TT or canonical form) or state diagram I can use Karnaugh maps to snthesie combinational functions with several outputs I understand how a register with an enable functions & is built I can design a working state machine given a state diagram I can implement small logic functions with comple CMOS gates The Problem Given a logic function, how do we arrive at a circuit to implement this combinational function? X Y Z P I3 I2 I C C SYNTHESIZING LOGIC UNCTIONS Primes between -7 s Count of Inputs

2 Combining unctions Combining unctions Given intermediate functions and 2, how could ou use N, OR, NOT to make G X Y Z 2 G Given intermediate functions and 2, how could ou use N, OR, NOT to make G X Y Z 2 G 2 G 2 G 2 2 *2 G = * Combining unctions Question Given intermediate functions and 2, how could ou use N, OR, NOT to make H X Y Z 2 H Is there a set of functions (, 2, etc.) that would allow ou to build NY 3 variable function X Y Z n?? 2 H Think simple, think man 2 n????????? X Y Z m m m2 m3 m4 m5 m6 m7????????? OR together an combination of m I s

3 efining Minterms -3.9 ppling Minterms to Snthesie a unction -3. Remember these minterms are intermediate functions that we'll use to build larger functions the epression for each minterm of (,,) Each numbered minterm checks whether the inputs are equal to the corresponding combination. When the inputs are equal, the minterm will evaluate to and thus the whole function will evaluate to. Minterms Row # Minterm Epression m m m 2 m 3 m 4 m 5 m 6 m 7 m m 2 m 2 3 m 3 4 m 4 5 m 5 6 m 6 7 m 7 P use m 2 m 3 m 5 m 7 P = m 2 + m 3 + m 5 + m 7 = when,, = {,,} = 2 then P = = = when,, = {,,} = 5 then P = = = when,, = {,,} = 5 then P = = = s / ecoders -3. Minterms -3.2 The m i functions on the previous slide are just N gate checkers That combination can be changed b adding inverters to the inputs We can think of the N gate as checking or decoding a specific combination and outputting a when it matches. N gate decoding (checking for) combination m5 N gate decoding (checking for) combination m minterm can be generated for ever combination of inputs Each minterm is the N ing of variables that will evaluate to for onl that combination minterm checks or decodes a specific input combination and outputs when found Minterm 3 = = m 3 Minterm 5 = = m 5 To make the minterm, complement the variables that equal and leave the variables in their true form that equal.

4 Using ecoders to Implement unctions Given an an logic function, it can be decoders/checkers Using ecoders to Implement unctions Given an an logic function, it can be decoders X Y Z Using ecoders to Implement unctions Given an an logic function, it can be decoders Using ecoders to Implement unctions Given an an logic function, it can be decoders X Y Z X Y Z C C

5 Using ecoders to Implement unctions Given an an logic function, it can be decoders Using ecoders to Implement unctions Given an an logic function, it can be decoders X Y Z C X Y Z C C C (,,) = Using ecoders to Implement unctions Given an an logic function, it can be decoders Using ecoders to Implement unctions Given an an logic function, it can be decoders X Y Z C X Y Z C C C (,,) = (,,) =

6 Minterm efinition -3.2 Minterms Minterm: product term where each input variable of a function appears as eactl one literal f(,,) => ++ Consider (,) One minterm per combination of the input variables Onl one minterm can evaluate to at an time m m m 2 m 3 inding Equations/Circuits Control Signal Generation Given a function and checkers (called decoders) for each combination, we just need to OR together the checkers where = 3-bit number {,,} for for for for for for for for ssume we use Ngate decoders that output a when the combination is found Other control signals are a function of the opcode We could write a full truth table or (because we are onl implementing a small subset of instructions) simpl decode the opcodes of the specific instructions we are implementing and use those intermediate signals to generate the actual control signals OpCode (Instruc.[3:26]) Control Unit ranch Mem Mem MemtoReg LUSrc Regst Reg LUOp[:] Could generate each control signal b writing a full truth table of the 6-bit opcode OpCode (Instruc.[3:26]) ecoder (Minterms) R-Tpe LW SW EQ Control Unit ranch Mem Mem MemtoReg LUSrc Regst Reg LUOp[:] Simpler for human to design if we decode the opcode and then use individual instruction signals to generate desired control signals

7 OpCode [5:] R Tpe Control Signal Truth Table LW SW EQ J ranch Reg st LU Src Memto Reg Reg Mem Mem LU Op[] X X LU Op[] OpCode [5:] R Tpe Control Signal Truth Table LW SW EQ J ranch Reg st LU Src Memto Reg Reg Mem Mem LU Op[] X X X X X X X X X LU Op[] Sh. Left ddress 32 Net Instruc. ddress Sh. Left ddress 32 Net Instruc. ddress 4 + [25:] [3:26] Mem & Mem LUOp[:] MemtoReg Control Regst LUSrc Reg Sh. Left 2 ranch + ranch ddress PCSrc 4 + [25:] [3:26] Mem & Mem LUOp[:] MemtoReg Control Regst LUSrc Reg Sh. Left 2 ranch + ranch ddress PCSrc PC [25:2] Reg. # 5 [2:6] Reg. 2 # 5 ddr. data [5:] Reg. # Instruc. 5 I-Cache data 2 ata Regst Register ile [5:] 6 Sign 32 Etend INST[5:] LUOp[:] LUSrc LU Zero Res. LU control Mem ddr. ata ata -Cache Mem MemtoReg PC [25:2] Reg. # 5 [2:6] Reg. 2 # 5 ddr. data [5:] Reg. # Instruc. 5 I-Cache data 2 ata Regst Register ile [5:] 6 Sign 32 Etend INST[5:] LUOp[:] LUSrc LU Zero Res. LU control Mem ddr. ata ata -Cache Mem MemtoReg Control Signal Logic Op[5] Op[4] Op[3] Op[2] Op[] Op[] ecoder R-Tpe LW SW EQ J ranch Regst LUSrc MemtoReg Reg Mem Mem LUOp LUOp Using products of materms to implement a function MXTERMS

8 Question Question Is there a set of functions (, 2, etc.) that would allow ou to build NY 3 variable function X Y Z n?? OR this set of functions would also work. X Y Z n?? Think simple, think man X Y Z M M M2 M3 M4 M5 M6 M7? G 2 n????????? X Y Z m m m2 m3 m4 m5 m6 m7????????? OR together an combination of m I s???????? N together an combination of M I s G = M M3 M efining Materms ppling Materms to Snthesie a unction Remember these materms are intermediate functions that we'll use to build larger functions the epression for each Materm of (,,) Materms Each numbered materm checks whether the inputs are equal to the corresponding combination. When the inputs are equal, the materm will evaluate to and thus the whole function will evaluate to. Row # Materm M M M 2 M 3 M 4 M 5 M 6 M 7 M M 2 M 2 3 M 3 4 M 4 5 M 5 6 M 6 7 M 7 P use M M M 4 M 6 P = M M M 4 M 6 = (++) (++ ) ( ++) ( + +) when,, = {,,} = then P = (++) (++ ) ( ++) ( + +) = = when,, = {,,} = 6 then P = (++) (++ ) ( ++) ( + +) = = when,, = {,,} = 7 then P = (++) (++ ) ( ++) ( + +) = =

9 Materm efinition s / ecoders Materm: sum term where each input variable of a function appears eactl once in that term (either in its true or complemented form) f(,,) => n OR gate onl outputs for combination That combination can be changed b adding inverters to the inputs We can think of the OR gate as checking or decoding a specific combination and outputting a when it matches. OR gate decoding (checking for) combination OR gate decoding (checking for) combination inding Equations/Circuits Given a function and checkers (called decoders) for each combination, we just need to N together the checkers where = 3-bit number {,,} for for for for for for for for ssume we use ORgate decoders that output a when the combination is found LOGIC UNCTION NOTTION

10 Canonical Sums Canonical Products We OR together all the minterms where = ( = SUM or OR of all the minterms) We N together all the materms where = = m 2 +m 3 +m 5 +m 7 m m Canonical Sum: = (2,3,5,7) List the minterms where is. m 2 m 3 m 4 m 5 m 6 m 7 = M M M 4 M 6 M M Canonical Product: = (,,4,6) List the materms where is. M 2 M 3 M 4 M 5 M 6 M Canonical orm Practice Logic unctions P. 6 and 6 in the Lecture Notes X Y Z G logic function maps input combinations to an output value ( or ) 3 possible representations of a function Equation Schematic Truth Table Can convert between representations Truth table is onl unique representation* * Canonical Sums/Products (minterm/materm) representation provides a standard equation/schematic form that is unique per function

11 Unique Representations Canonical => Same functions will have same representations Truth Tables along with Canonical Sums and Products specif a function uniquel Equations/circuit schematics are NOT inherentl canonical Truth Table P Canonical Sum P (2,3,5,7,, ) ON-Set of P (minterms) Yields SOP equation, N-OR circuit Canonical Product P (,,4,6,, ) O-Set of P (materms) Yields POS equation, OR-N circuit Eample: utomobile uer Consider an automobile warning uer that sounds if ou leave the Ke in the ignition and the oor is open OR the Headlights are on and the oor is open. We can easil derive an equation and implementation: = K + H Ke in Ignition Headlights on K H Warning uer = K + H Eample: utomobile uer ut we see that we can alter this equation rom = K + H To = (K+H) uer sounds if the oor is open and either the Ke is in the Ignition or the Headlights are on Which is better? What is the canonical minterm/materm representation? Eample orm Given a function, (,K,H) we can define the minterm functions (which serve as intermediate functions) and then generate the overall function from the minterms = Σ = Π Row K H Minterm esignation Materm esignation K H m +K+H M K H m +K+H M 2 K H m 2 +K +H M 2 Ke in Ignition Headlights on K H Warning uer = (K+H) Ke in Ignition Headlights on K H Warning uer = K + H 3 K H m 3 +K +H M 3 4 K H m 4 +K+H M 4 5 K H m 5 +K+H M 5 6 K H m 6 +K +H M 6 7 K H m 7 +K +H M 7

12 & 3 Variable Theorems emorgan s Theorem T6 X+Y = Y+X T6' X Y = Y X Commutativit T7 (X+Y)+Z = X+(Y+Z) T7' (X Y) Z = X (Y Z) ssociativit T8 XY+XZ = X(Y+Z) T8 (X+Y)(X+Z) = X+YZ istribution & actoring T9 X + XY = X T9 X(X+Y) = X Covering T XY + XY = X T (X+Y)(X+Y ) = X Combining Inverting output of an N gate = inverting the inputs of an OR gate Inverting output of an OR gate = inverting the inputs of an N gate function s inverse is equivalent to inverting all the inputs and changing N to OR and vice versa Out + Out T XY + X Z + YZ = XY + X Z T (X+Y)(X +Z)(Y+Z) = (X+Y)(X +Z) Consensus M (X+Y)' = X' Y' M' (X Y)'=X'+Y' emorgan's Out + Out N OR / NN NN Canonical Sums ield N OR Implementation NN NN Implementation OR N / NOR NOR Canonical Products ield OR N Implementation NOR NOR Implementation =

13 Eample: utomobile uer Convert each implementation to use either just NOR or just NN gates + inverters Convert to NN NN Convert the 2 to mu below to use just NN or NOR gates? Ke in Ignition Headlights on K H Warning uer = (K+H) Ke in Ignition Headlights on K H Warning uer = K + H Logic Snthesis escribe the function Usuall with a truth table ind the sum of products or product of sums epression ewer 's in the output => use canonical sum ewer 's in the output => use canonical product Use oolean lgebra (T8 T) to find a simplified epression Eercise Snthesie this function in two was irst use the canonical sum Then use the canonical product T8 XY+XZ = X(Y+Z) T8 (X+Y)(X+Z) = X+YZ T9 X + XY = X T9 X(X+Y) = X T XY + XY = X T (X+Y)(X+Y ) = X T XY + X Z + YZ = XY + X Z T (X+Y)(X +Z)(Y+Z) = (X+Y)(X +Z) Primes between -7 X Y Z P

14 Eercise 2 Snthesie this function in two was irst use the canonical sum Then use the canonical product T8 XY+XZ = X(Y+Z) T8 (X+Y)(X+Z) = X+YZ T9 X + XY = X T9 X(X+Y) = X T XY + XY = X T (X+Y)(X+Y ) = X T XY + X Z + YZ = XY + X Z T (X+Y)(X +Z)(Y+Z) = (X+Y)(X +Z) Eercise 3 Snthesie this function in two was irst use the canonical sum Then use the canonical product T8 XY+XZ = X(Y+Z) T8 (X+Y)(X+Z) = X+YZ T9 X + XY = X T9 X(X+Y) = X T XY + XY = X T (X+Y)(X+Y ) = X T XY + X Z + YZ = XY + X Z T (X+Y)(X +Z)(Y+Z) = (X+Y)(X +Z) I3 I2 I M M Encode the highest input I (ie. 3, 2, or ) that is ON (=) s Count of Inputs I3 I2 I C C