ECEN474: (Analog) VLSI Circuit Design Fall 2012
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1 EEN474: (Aalo) VS ircuit Desi Fall 0 ecture 3: Three urret Mirror OTA Sa Palero Aalo & Mixed-Sial eter Texas A&M Uiersity
2 Aouceets & Aeda H4 due edesday 0/3 Exa Friday / Siple OTA Reiew Three urret Mirror OTA Paraeters Three urret Mirror OTA w/ ascode Output
3 Operatioal Trascoductace Aplifier R bias V DD M 5 M 6 V i+ M M V i- M 3 M 4 V SS tail Output Noise urret put Noise Voltae i i V o o kt kt Trascoductace Output oductace ( + ) + D Gai 6 6 A GB G R G G Doiat Pole Slew Rate ω o o + p No - Doiat Pole ω p SR + o6 KP o tail o6 + 6 KP M TA o6 TA KP TA ( λ + λ ) λ + λ s6 TA p 3 p
4 TAMU-Ele-474 Jose Sila-Martiez-08 Basic Operatioal Trascoductace Aplifier Toloies O SNGE-ENDED + M M - - M M + O TA TA (a) (b) + - O + M M O - O M M O - B TA B TA (c) FUY-DFFERENTA (d) - 4 -
5 3 urret Mirror OTA B : : B B TA V+ M M O TA Relatie to Siple OTA : Factor of B icrease i G, GB, ad SR Sae A Slihtly hiher oise ower frequecy o-doiat pole ad third pole (B+) ties the power 5
6 TAMU-Ele-474 Jose Sila-Martiez-08 B TA B : : B V+ M M TA : OTA based o 3 curret irrors Output oductace O Trascoductace D Gai A G R G Doiat Pole GB No - Doiat Pole ω Gai - Badwidth Slew Rate B o p o SR + B + ω p G o p Mp B B B tail + KP B TA KP TA ( + B) p KP ( λ + λ ) λ + λ p TA sp TA p - 6 -
7 TAMU-Ele-474 Jose Sila-Martiez-08 B TA B : : B V+ M M TA : OTA based o 3 curret irrors Output oductace O Trascoductace D Gai A G R G Doiat Pole GB No - Doiat Pole ω Gai - Badwidth Slew Rate B o p o SR + B + ω p G o p Mp B B B tail + KP B TA KP TA ( + B) p KP ( λ + λ ) λ + λ p TA sp TA p - 7 -
8 3 urret Mirror OTA Noise B : : B B TA V+ M M O TA : Output Noise urret put Noise Voltae i i o kt kt ( B + B + B + ) + p p + B p + B 8
9 3 urret Mirror OTA w/ ascode Output B : : B VBP B TA M M V+ VBN O TA : Relatie to 3 urret Mirror OTA Sae G, GB, ad SR A icreased by cascode c r oc factor Approxiately sae oise troduce two additioal cascode o-doiat poles Sae power 9
10 TAMU-EEN Jose Sila-Martiez Sall Sial Aalysis: oo-source ascode Aplifier VB i +V GS i d V y - Y V Y + i OUT M } Voltae V R OUT to curret coerter OUT - b Y OUT V / i A aalysis: POE AT V Y No-doiat pole: ω PND ( + b )/ PY Doiat pole at / R OUT OUT Trasfer fuctio + s + s PY + b i PY - Sall sial circuit / ω U / PY ω (rad/sec) - 0 -
11 TAMU-EEN Jose Sila-Martiez Sall Sial Aalysis: Noise eel i d V Y ( / ) V, ( 0 / ) V, OUT M M Z 0 >> 0 / 0 R OP V eeral Z 0 R 0 /s 0 Z 0 << i d V Y OUT M Z 0 put referred Noise: For Z 0 >> ω (rad/sec) R OP i d V eqi, eqi, + + ascode trasistor oise ca eerally be elected Z Z 0 0 Z 0,, - -
12 TAMU-Ele-474 Jose Sila-Martiez-08 OTA based o 3 curret irrors usi cascode trasistors B TA B : : B VBP V+ M M VBN TA : urret(+b) TA O Trascoductace Output oductace D Gai A G R G c o B o r B Doiat Pole No - Doiat Pole ω Gai - Badwidth Slew Rate oc cr + ω p p + G GB oc SR B cp o p c Mp B B tail r r ocp oc KP + TA KP B λ + λ p ( + B) p KP TA c TA ( λ + λ ) ( r ) sp r oc TA c oc p - -
13 3 urret Mirror OTA Noise B : : B VBP B TA M M V+ VBN O TA Output Noise urret put Noise Voltae : i 8 io kt 3 8 kt 3 ( B + B + B + ) + p p + B ascode trasistor cotributio ca be elected p + B Approxiately equal to 3 curret irror OTA oise 3
14 TAMU-Ele-474 Jose Sila-Martiez-08 OTA based o 3 curret irrors usi cascode trasistors B : : B OTA-AS B TA M M VBP V+ VBN O OTA TA w : P-type curret irror P-type cascode N-type cascode N-type curret irror A V B R + sr + s + s + + s ( + B) ( + ) ( + ) P GSP cp GSP c GSN + s GSN N Phase Mari is liited OTA-put - 4 -
15 TAMU-Ele-474 Jose Sila-Martiez-08 B TA OTA based o 3 curret irrors usi cascode trasistors B : : B M M TA V+ : VBP VBN O Phase Ma Excess Phase ωp ωp ωp3 ω u 0 db ω Excess Phase is defied as (phase at 0 - phase at ω u ) Phase Mari (80 excess phase) Gai ari Gai easured at 80 excess phase - 5 -
16 Next Tie Folded ascode OTA Two Stae Miller OTA 6
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