Integrated Circuit Operational Amplifiers
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1 Analog Integrated Circuit Design A video course under the NPTEL Department of Electrical Engineering Indian Institute of Technology, Madras Chennai, , India National Programme on Technology Enhanced Learning
2 Differential pair opamp V dd I ref M 3 M 4 out inp M 1 M 2 inn M 0 I 0
3 Cascode output resistance R out = g mc /g dsc G s + 1/G s + 1/g dsc R out = g mc /g dsc g ds1 + 1/g dsc + 1/g ds1 (negligible) R out = g mc /g dsc g m1 + 1/g dsc + 1/g m1 (negligible) R out = 1/g dsc (1+g mc /g m1 ) Vdd V biasc M c V biasc M c V biasc M c M 1 V bias1 G s V bias1 G s =g ds1 G s =g m1 M 1 differential pair: M c degenerated by M 1 s source impedance (g m1 ) Output resistance looking into one side of the differential pair is 2/g ds1 (g m 1 =g mc in the figure)
4 Opamp: dc small signal analysis Bias values in black Incremental values in red Impedances in blue Total quantity = Bias + increment
5 Differential pair: Quiescent condition V dd -V SG3 (by symmetry) M 3 M 4 V dd V dd M 3 M 4 I 0 /2 zero current I 0 /2 I 0 /2 I 0 /2 I 0 /2 + M 1 M 2 M 1 M 2 V dd -V SG3 V bias0 V bias0
6 Differential pair: Transconductance M 3 M 4 V dd g m v d /2 I 0 /2 I 0 /2 I 0 /2 g m v d /2 g m v d g m v d /2 + M 1 M 2 +v d /2 -v d /2 V dd -V SG3 v x ~ 0 V bias0
7 Differential pair: Output conductance M 3 M 4 V dd I 0 /2 v T g ds1 /2 + v T g ds3 v T g ds1 /2 I 0 /2 I 0 /2 v T g ds1 /2 + v T (g ds1 + g ds3 ) M 1 M 2 +v T V dd -V SG3 v T g ds1 /2 V bias0
8 Differential pair: Noise i n0 /2+i n1 /2-i n2 /2+i n3 i n0 /2+i n1 /2-i n2 /2+i n3 i n3 i n4 i n1 -i n2 +i n3 -i n4 i n0 /2+i n1 /2-i n2 /2 i n1 i n2 i n0 /2-i n1 /2+i n2 /2 + V dd -V GS3 i n0 /2+i n1 /2-i n2 /2 i i n0 /2-i n1 /2+i n2 /2 n0 i n0 Carry out small signal linear analysis with one noise source at a time Add up the results at the output (current in this case) Add up corresponding spectral densities Divide by gain squared to get input referred noise
9 Differential pair opamp G m G out g m1 g ds1 +g ds3 A o g m1 /(g ds1 +g ds3 ) A cm g ds0 /2g m3 C i C gs1 /2 ω u g m1 /C L p k,z k p 2 = g m3 /(C db1 +C db3 + 2C gs3 );z 1 = 2p 2 S vi 16kT/3g m1 (1 +g m3 /g m1 ) σvos 2 σvt1 2 + (g m3/g m1 ) 2 σvt3 2 V T 1 +V DSAT 1 +V DSAT 0 V dd V DSAT 3 V T 3 +V T 1 V out V T 1 V dd V DSAT 3 SR I supply ±I 0 /C L I 0 +I ref
10 Telescopic cascode: Quiescent condition M 3 M 4 V dd I 0 /2 V biasp2 M 7 M 8 zero current + V biasn2 M 5 M 6 V dd -V SG3 I 0 /2 I 0 /2 M 1 M 2 V bias0
11 Telescopic cascode: Transconductance M 3 M 4 V dd g m v d /2 V biasp2 M 7 M 8 g m v d /2 I 0 /2 g m v d g m v d /2 M 5 M 6 V biasn2 I 0 /2 I 0 /2 g m v d /2 g m v d /2 + V dd -V SG3 +v d /2 M 1 M 2 -v d /2 v x ~ 0 V bias0
12 Telescopic cascode: Output conductance M 3 M 4 V dd v T g ds5 g ds1 /2g m5 I 0 /2 V biasp2 M 7 M 8 v T g ds5 g ds1 /2g m5 + v T g ds7 g ds3 /g m7 V biasn2 M 5 M 6 v T g ds5 g ds1 /2g m5 I 0 /2 I 0 /2 v T g ds5 g ds1 /2g m5 + g ds5 g ds1 /2g m5 g ds1 /2 v T (g ds5 g ds1 /g m5 + g ds7 g ds3 /g m7 ) V dd -V SG3 +v T M 1 M 2 v T g ds5 g ds1 /2g m5 V bias0
13 Telescopic cascode opamp M 3 M 4 V dd V biasp2 M 7 M 8 out V biasn2 M 5 M 6 inp M 1 M 2 inn V bias0
14 Telescopic cascode opamp G m G out g m1 g ds1 g ds5 /g m5 +g ds3 g ds7 /g m7 A o g m1 /(g ds1 g ds5 /g m5 +g ds3 g ds7 /g m7 ) A cm g ds0 /2g m3 C i C gs1 /2 ω u g m1 /C L p k,z k p 2 = g m3 /(C db1 +C db3 + 2C gs3 ) p 3 = g m5 /C p5 p 4 = g m7 /C p7 p 2,4 appear for one half and cause mirrror zeros S vi 16kT/3g m1 (1 +g m3 /g m1 ) σ 2 Vos σ 2 VT1 + (g m3/g m1 ) 2 σ 2 VT3 V out V biasn1 V T 5 V biasp1 +V T 7 SR ±I 0 /C L I 0 +I ref I supply
15 Folded cascode: Quiescent condition M 9 M 10 V dd I 0 /2+I 1 I 0 /2+I 1 V biasp1 M 5 M 6 I 1 I 1 V biasp2 I 0 /2 I 0 /2 zero current M 1 M 2 M 7 M 8 + V biasn2 V GS3 V bias0 I 1 I 1 M 3 M 4
16 Folded cascode: Transconductance M 9 M 10 V dd I 0 /2+I 1 I 0 /2+I 1 V biasp1 g m v d /2 M 5 M 6 g m v d /2 V biasp2 g m v d /2 +v d /2 I 0 /2 I 0 /2 M 1 M 2 g m v d /2 -v d /2 I 1 I 1 g m v d M 7 M 8 g m v d /2 V biasn2 + V GS3 v x ~ 0 V bias0 g m v d /2 g I 1 I m v d /2 1 M 3 M 4
17 Folded cascode: Output conductance M 9 M 10 V dd I 0 /2+I 1 I 0 /2+I 1 V biasp1 v T g ds5 g ds1 /2g m5 v T g ds5 g ds1 /2g m5 I 0 /2 I 0 /2 M 1 M 2 g ds1 /2 M 5 M 6 V biasp2 I 1 I 1 v T g ds5 (g ds1 /2+gds 9 )/g m5 zero current M 7 M 8 V biasn2 V GS3 + v T (g ds5 (g ds1 +g ds9 )/g m5 + g ds7 g ds3 /g m7 ) +v T V bias0 v T g ds5 g ds1 /2g m5 I 1 I 1 v T g ds5 g ds1 /2g m5 + v T g ds7 g ds3 /g m7 M 3 M 4
18 Folded cascode opamp M 9 M 10 V dd V biasp1 M 5 M 6 V biasp2 out inp M 1 M 2 inn M 7 M 8 V biasn2 V bias0 M 3 M 4
19 Folded cascode opamp G m G out g m1 (g ds1 +g ds9 )g ds5 /g m5 +g ds3 g ds7 /g m7 A o g m1 /((g ds1 +g ds9 )g ds5 /g m5 +g ds3 g ds7 /g m7 ) A cm g ds0 /2g m3 C i C gs1 /2 ω u g m1 /C L p k,z k p 2 = g m3 /(C db1 +C db3 + 2C gs3 ) p 3 = g m5 /C p5 p 4 = g m7 /C p7 p 2,4 appear for one half and cause mirrror zeros S vi 16kT/3g m1 (1 +g m3 /g m1 +g m9 /g m1 ) σ 2 Vos σvt1 2 + (g m3/g m1 ) 2 σvt3 2 + (g m9/g m1 ) 2 σvt9 2 V out V biasn1 V T 5 V biasp1 +V T 7 SR ± min{i 0,I 1 }/C L I 0 +I 1 +I ref I supply
20 Body effect All nmos bulk terminals to ground All pmos bulk terminals tov dd A cm has an additional factorg m1 /(g m1 +g mb1 ) g m5 +g mb5 instead ofg m5 in cascode opamp results g m7 +g mb7 instead ofg m7 in cascode opamp results
21 Two stage opamp bias stage 1 stage 2 V dd M 3 M 4 I ref M 11 R c R L inn M 1 M 2 inp V outbias C c C L M 0 I 0 M 12
22 Two stage opamp inp inn + g m1 single stage opamp Vdd M 11 out R c C c I 1 First stage can be Differential pair, Telescopic cascode, or Folded cascode; Idealg m1 assumed in the analysis Second stage: Common source amplifier Frequency response is the product of frequency responses of the first stageg m and a common source amplifier driven from a current source
23 Common source amplifier: Frequency response V o (s) V d (s) = ( gm 1 g m11 G 1 G L a 3 = R cc 1 C L C c G 1 G L ) scc (R c 1/g m 11 ) + 1 a 3 s 3 +a 2 s 2 +a 1 s + 1 a 2 = C 1C c +C c C L +C L C 1 +R c C c (G 1 C L +C 1 G L ) G 1 G L a 1 = C c(g m 11 +G 1 +G L +G 1 G L R c ) +C 1 G L +G 1 C L G 1 G L G 1 : Total conductive load at the input G L : Total conductive load at the output C 1 : Total capacitive load at the input C L : Total capacitive load at the output
24 Common source amplifier: Poles and zeros p 1 G 1 C c ( g m 11 G L G 1 G L +G 1 R c ) +C 1 (1 + G 1 G L ) C c p 2 g C m11c 1 +C c +G L +G c+c L C 1 C 1 +C C +G1G L R c c C 1 C c C 1 +C c +C L + RcCc(G 1C L +G L C 1 ) C ( ( c+c L 1 1 p ) + G 1 + G ) L R c C L C c C 1 C 1 C L 1 z 1 = (1/g m 11 R c)c c Unity gain frequency C 1 +C c ω u g m 1 ) ( ) C c (1 + G L g m11 + G 1 g m11 + G 1G L R c g m11 +C GL 1 g m11 + G 1 g m11
25 Common source amplifier: Frequency response Pole splitting using compensation capacitorc c p 1 moves to a lower frequency p 2 moves to a higher frequency (For largec c, p 2 =g m 11 /C L) Zero cancelling resistorr c movesz 1 towards the left halfs plane and results in a third polep 3 z 1 can be moved to withr c = 1/g m 11 z 1 can be moved to cancelp 2 withr c > 1/g m 11 (needs to be verified against process variations) Third polep 3 at a high frequency Poles and zeros from the first stage will appear in the frequency response Y m1 (s) instead ofg m 1 inv o/v i above Mirror pole and zero Poles due to cascode amplifiers
26 Compensation cap sizing p 2 g m11 C c C 1 +C c C 1 C c C 1 +C C +C L ω u g m1 C c Phase margin (Ignoringp 3,z 1,...) g m11 g m1 ( Cc φ M = tan 1 p 2 ω u p 2 = tan φ M ω u C L ) 2 = C c C L ( 1 + C 1 C L ) tan φ M + C 1 C L tan φ M For a given φ M, solve the quadratic to obtainc c /C L IfC 1 is very small,p 2 g m2 /C L ; further simplifies calculations
27 Two stage opamp A o g m1 g m11 /(g ds1 +g ds3 )(g ds11 +g ds12 ) A cm g ds0 g m11 /2g m3 (g ds11 +g ds12 ) C i C gs1 /2 ω u g m1 /C c p k,z k See previous pages S vi 16kT/3g m1 (1 +g m3 /g m1 ) σvos 2 σvt1 2 + (g m3/g m1 ) 2 σvt3 2 V T 1 +V DSAT 1 +V DSAT 0 V dd V DSAT 3 V T 3 +V T 1 V out V DSAT 12 V dd V DSAT 11 SR+ I 0 /C c SR- min{i 0 /C c,i 1 /(C L +C c )} I supply I 0 +I 1 +I ref
28 Opamp comparison Differential Telescopic Folded Two pair cascode cascode stage Gain Noise = = high = Offset = = high = Swing + ++ Speed
29 Differential pair V dd I ref M 3 M 4 out inp M 1 M 2 inn M 0 I 0 Low accuracy (low gain) applications Voltage follower (capacitive load) Voltage follower with source follower (resistive load) In bias stabilization loops (effectively two stages in feedback)
30 Telescopic cascode M 3 M 4 V dd V biasp2 M 7 M 8 out V biasn2 M 5 M 6 inp M 1 M 2 inn V bias0 Low swing circuits Switched capacitor circuits Capacitive load Different input and output common mode voltages First stage of a two stage opamp Only way to get high gain in fine line processes
31 Folded cascode M 9 M 10 V dd V biasp1 M 5 M 6 V biasp2 out inp M 1 M 2 inn M 7 M 8 V biasn2 V bias0 M 3 M 4 Higher swing circuits Higher noise and offset Lower speed than telescopic cascode Low frequency pole at the drain of the input pair Switched capacitor circuits (Capacitive load) First stage of a two stage class AB opamp
32 Two stage opamp bias stage 1 stage 2 V dd M 3 M 4 I ref M 11 R c R L inn M 1 M 2 inp V outbias C c C L M 0 I 0 M 12 Highest possible swing Resistive loads Capacitive loads at high speed Standard opamp: Miller compensated two stage opamp Class AB opamp: Always two (or more) stages
33 Opamps: pmos versus nmos input stage nmos input stage Higherg m for the same current Suitable for large bandwidths Higher flicker noise (usually) pmos input stage Lowerg m for the same current Lower flicker noise (usually) Suitable for low noise low frequency applications
34 Fully differential circuits bias M 3 M 4 v om v op v ip v op v ip v im M 1 M 2 v im v om bias M 0 half circuits Two identical half circuits with some common nodes Two arms of the differential input applied to each half Two arms of the differential output taken from each half
35 Differential half circuit Line of symmetry M 3 M 4 M 3 -v o /2 v o /2 -v o /2 +v d /2 M 1 M 2 -v d /2 v d /2 M 1 M 0 zero increment due to symmetry and linearity Differential half circuit Symmetrical linear (or small signal linear) circuit under fully differential (antisymmmetric) excitation Nodes along the line of symmetry at 0 V (symmetry, linearity) Analyze only the half circuit to find the transfer function
36 Common mode half circuit pbias M 3 M 4 M 3,4 pbias v ocm v ocm v ocm M 1 M2 M 1,2 nbias M 0 nbias M 0 Symmetrical circuit (maybe nonlinear) under common mode (symmmetric) excitation Nodes in each half at identical voltages (symmetry) Fold over the circuit and analyze the half circuit
37 Common mode feedback pbias M 3 M 4 v om v op v op v ip M 1 M 2 v im common mode detector v op +v om 2 + v om V o,cm nbias M 0 Fully differential opamp Common mode feedback circuit Common mode feedback circuit for setting the bias Detect the output common mode and force it to bev o,cm via feedback
38 Common mode feedback loop pbias break the loop for analyzing cmfb loop gain M 3 M 4 C gs3,4 v om common mode detector v op v op +v om 2 + v ip v im M 1 M 2 V o,cm nbias M 0 Common mode feedback loop has to be stable Analyze it by breaking the loop and computing the loop gain with appropriate loading at the broken point Apply a common mode step/pulse in closed loop and ensure stability
39 Fully differential circuits: Noise i n3 M 3 CMFB - + vn,full M 4 i n4 i n3 M 3 v n,half M 1 M 2 M 1 i n1 i n2 i n1 half circuit(small signal) M 0 S n,full = 2S n,half Calculate noise spectral density of the half circuit Multiply by 2
40 Fully differential circuits: Offset V dd M M 4 M 3 + V T3 V T4 V T3 V T1 v off,full V T V T2 v off,half M 1 M 2 + M 1 M 0 half circuit(small signal) v 2 off,full = 2v 2 off,half Calculate mean squared offset of the half circuit Multiply by 2 if mismatch (e.g. V T ) wrt ideal device is used
41 Fully differential circuits: Offset V dd M 3 + M 4 M 3 + V T34 V T34 V T12 v off,full V T v off,half M 1 M 2 M 1 M 0 half circuit(small signal) v 2 off,full = v 2 off,half Calculate mean squared offset of the half circuit Multiply by 1 if mismatch between two real devices is used
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