Analytical model of Threshold Voltage and Sub-threshold Slope of SOI and SON MOSFETs: A comparative study

Transcription

1 Journal of Electron evices, Vol. 8, 010, pp JE [ISSN: ] Journal of Electron evices Analytical moel of Threshol Voltage an Sub-threshol Slope of SOI an SON MOSETs: A comparative stuy Sanjoy eb 1*, N B ngh, as 1, A K e an S K Sarkar 1 1 epartment of Electronics an Telecommunication Engineering Jaavpur University, Kolkata-7000, Inia epartment of Electronics & ommunication Engineering Manipur Institute of Technology, Imphal , Inia epartment of Electronics & ommunication Engineering National Institute of Technology, urgapur-7101, Inia eb_sanjoy@yahoo.com, basanta_n@reiffmail.com, ebraj0@gmail.com, asishkumar.e@nitgp.ac.in an su_sircir@yahoo.co.in Receive 14 September 010, accepte 18 October 010 ABSTRAT A threshol voltage moel base on threeinterface compact capacitive moel is evelope for horizontal SOI/SON MOSET. ifferent short channel effects like rain inuce barrier lowering, charge sharing an fringing fiel effects are consiere. Analytical simulation is one to unerstan the threshol voltage performance of silicon on insulator (SOI) an silicon on nothing (SON) MOSET, uner ifferent structural an operational parameter variations. The performance of the two evices are stuie an compare in terms of threshol voltage roll-off an subthreshol slope. erformance of SON MOSET is foun to be significantly ifferent from equivalent SOI evice. SON MOSET emonstrates lower threshol voltage roll-off an subthreshol slope ue to reuce short channel effects. resent analysis is foun to be useful to figure out the improvement of SON over SOI structures as a next generation short channel MOS structure. Keywors: licon-on-insulator (SOI), silicon-on-nothing (SON), threshol voltage, short channel effects, threshol voltage rolloff, subthreshol slope. 1. INTROUTION With the emergence of mole computing an communication, low power evice esign an implementation have got a significant role to play in VLSI circuit esign. ontinuous evice performance improvement is possible only through a comnation of evice scaling, new evice structures an material property improvement to its funamental limits [1]. The own-scaling of MOSETs has been the most important an effective way for achieving evice performance improvement for VLSI/ULSI circuits. Increase eman for ultra low power consumption, high ensity an high performance evices is continuously pushing the fabrication process to go beyon the sub-micron technologies such as 45nm, nm an so on. However, the performance requirement in these avance technologies couln t be achieve with conventional bulk MOS process leaing to an alternative, licon-on-insulator (SOI) technology [].

2 Short-channel-effects (SEs), transistor scalality, an circuit performance are improve by using SOI technology, especially ultrathin, fully eplete () MOSETs []. MOSET fabricate on insulator (SOI) substrate provies an avantage for high spee applications because of the low parasitic capacitance. As MOS I technology enters the sub-50 nm range, the silicon channel an the burie oxie thicknesses must be less than 50 nm an 100 nm, respectively, in orer to prevent the short channel effect (SE) [4]. The evelopment of SOI MOSET technology has been limite so far by the ifficulty in controlling the silicon film thickness, ajusting burie oxie layer thickness, shallow source rain series resistances an the fringing fiels [5-7]. A super SOI, having a silicon film thickness of five nanometers an a burie oxie thickness of 0 nm might be capable of suppressing the SE at the MOS own-scale limit of 0 nm channel length, however, the requirements for the exceptionally thin silicon an burie oxie films excee present manufacturing capalities for SOI wafers [8]. Although ifferent SEs are highly suppresse in SOI structure, SOI structure is not fully immune to ifferent SEs. Among ifferent SEs relate evice performance egraation, higher threshol voltage roll-off an egrae subthreshol slope are very important issues [9]. To overcome such types of rawbacks in usual SOI structure, ifferent improve SOI structures are suggeste in recent times [10]. licon-on-nothing (SON), an innovative SOI structure suggeste an evelope very recently, enables fabrication of extremely thin silicon (5 to 0 nm) an burie ielectric (10 to 0 nm) super SOI evices, which are capable of quasitotal suppression of SEs an excellent electrical performances [11]. In a SON MOSET, the burie layer of usual SOI MOSET is replace with air which causes less SEs an leakage currents. Among the avantages of fully-eplete () SON architecture comparing to OI, the most significant one is the reuce electrostatic coupling of channel with source/rain an substrate through the burie layer (BL) [1]. Reuce electrostatic coupling through the BL allows in turn to reuce the minimal channel length of transistors or to relax the requirements on film thickness [1]. Moreover, since the so-calle nothing (or air) layer embee below the active film has lower ielectric permittivity than oxie, the parasitic capacitances between source/rain an substrate are reuce an therefore higher circuit spee can be expecte with SON evices. Thick burie layer can be a rawback of SOI MOSETs ue to large positive charge accumulate in the thick BL, while in the case of SON MOSET, no charge will accumulate in the air-gap [14]. Although SOI an SON structures have basic resemblance, accurate moeling of ifferent short channel effects is essential as their influences are ifferent in those structures. Aopting similar theoretical approach evelope previously for SOI MOSET threshol voltage moeling [15], threshol voltage moel of horizontal SON MOSET have been previously establishe [11]. In this work, a generalize three-interface compact capacitive moel of horizontal SOI/SON MOSET has been evelope. ifferent SEs like fringing fiel, substrate coupling an junction-inuce -effects are incorporate in the present moel. A new approach has been aopte for fringing fiel capacitance calculation. Analytical expressions of threshol voltage an subthreshol slope incluing the fringing capacitance effect are evelope from the compact capacitive analysis. The performance of the two evices are stuie an compare in terms of threshol voltage roll-off an subthreshol slope. 01

3 . ANALYTIAL MOELING In a short channel evice, potential profiles in the channel an beneath the channel (in the BL) are two-imensional in nature. Assuming a parabolic potential profile initiate by perpenicular an lateral fiel, threshol voltage can be calculate by solving - oisson s equation in the channel [16]. It can also be calculate by solving 1- oisson s equation an than incorporating lateral fiel effect through voltage oping transformation (VT). This type of analysis is commonly known as compact capacitive moel an this moel preicts threshol voltage with almost same accuracy as with - oisson s equation but with less complexity [16]..1 Equivalent apacitive Moel A generalize layere structure of a SOI/SON MOSET is shown in ig. 1. The structure consiere here has poly silicon (n+) gate. Let t GOX, t, t BL/air an t sub be the thicknesses of gate oxie, silicon channel layer, burie layer an substrate layer respectively. L is the metallurgical channel length of the evice. ig. 1. A SOI/SON-MOSET layere structure. A simple compact-capacitance moel evelope for the escription of the threshol voltage V th of the fully eplete SOI/SON- MOSET is shown in ig.. ig.. Equivalent capacitance moel of SOI/SON- MOSET In the figure, if(1,,) are the interface state capacitances for three interfaces,, is the silicon channel epletion capacitance, GOX is the gate oxie capacitance, B is the burie layer capacitance ue to substrate as, an S are burie layer capacitance ue to fringing fiels from rain an source sie respectively. V B1 is the flat ban voltage at the front interface of the channel ue to gate; V B is the flat ban voltage at the channel back interface ue to source/rain; V B is the flat ban voltage at the back interface of the channel ue to substrate.. Short hannel Effects or a long channel evice, it can be consiere that the gate is completely responsible for epleting the channel. In a short channel evice, some part of the epletion is accomplishe by the influence of rain voltage as well as channel back interface potential; this phenomenon is known as two imensional charge sharing effect [17]. In terms of potential this can be explaine on the basis of potential barrier lowering at source-channel junction ue to lateral fiel in the channel initiate by applie rain voltage an this phenomenon is commonly known as rain inuce barrier lowering (IBL). Another component of IBL is cause by inuce potential at channel back interface [17]. Uner short channel conition, channel back interface potential is ue to comne effect of substrate as, hole accumulation an fringing fiel. 0

4 ..1 IBL ue to lateral fiel Voltage oping transformation is a technique, which can be use to take into account the effect of channel lateral fiel relate IBL into quasi 1 threshol voltage analysis [16]. Accoring to VT, the effect of lateral fiel in the channel from rain sie is equivalent to a reuction in the effective channel oping. Using VT for moeling short channel effects, the effective channel oping is given by [11]; * * V N A N A qleff (4) Here, ε is the ielectric constant of silicon, q is the electronic charge, N is the silicon * impurity oping concentration, V is the effective rain to source voltage which is given by; * V V V S S1 V V V S S1 A S () Here V is the rain-to-source voltage, V is the built in potential, ψ 1 an ψ are the channel front an back interface potential, respectively. Appling voltage oping transformation, the effective channel epletion capacitance is given as; S1 * eff Q qn AtL eff, S1 S () Here Q is the total charge per unit area in silicon in the channel. is ue to accumulation of holes, which are generate by impact ionization, at the channel back interface [17]. ringing fiel effect in a fully eplete SOI/SON MOSET is responsible for a ramatic increase of IBL [5]. The effect of fringing fiel can be reuce by using lower ielectric constant material in the BL. This is actually one in SON structure by using air in the BL. Two-imensional potential profile in the BL is quite complex. As a result, twoimensional analysis of the fringing fiel effect has not been evelope properly [6]. A compact moel of fringing fiel inuce parasitic capacitance can be evelope base on conformal mapping technique. A schematic view of SOI/SON MOSET with fringing-fiel lines emanating from the rain to the channel region is shown in ig.. Assuming that the source is at zero potential, fringing fiel emanating only from the rain sie is consiere in the present analysis. Using conformal mapping, the original structure can be converte into an equivalent two-plate system with an angle of inclination of 180 egree as shown in ig.. The channel back interface an rain back interface are consiere as the two plates which are assume to be of unit area. The two plates are separate by the epletion layer forme at the channel-rain junction... IBL ue to fringing fiel In isolate channel structure like SOI/SON, penetration of fringing-fiel lines from source an rain through burie layer or air inuces a potential at the channel back interface, which causes fringing fiel relate IBL. Substrate as is also capacitively couple to the channel back interface potential which acts as another source of IBL. Another IBL effect ig:. ringing capacitance moel of SOI/SON- MOSET. The capacitance of the two plates can be calculate using the approach aopte for calculation of capacitance of an incline plate capacitor with a egree of inclination up to 0

5 180 egree [18,19]. The capacitance per unit longituinal length of the line is [18]; / S in out (4) in out Here is the inner capacitance an is the outer capacitance. or the structure consiere here both the capacitances will be same an, ' / S K ( BL / air (5) K( k ) in / out ' ( / out ' Here, K ( K ) an using the same approach as in Ref. 0 we can write; k k in / out ' in / out L ( L ( L L L )( L L ) an L ) L L (L L )(L L ). nce the source an rain are heavily ope n+ regions an the channel is p type, an abrupt junction will be forme with a epletion with of L. If evice metallurgical channel length is L then effective channel length L =L-*L an L /S is the length of the rain/source sie. As K ( k in is the complete elliptic integral of first, tag the expansion, the final expression of the capacitance is expresse as ; 1 ' 1 ( 1. ' 4 (....4 (n 1)! ' n ( / S n! BL / air 1 1 ( 1. 4 (....4 (n 1)! n ( n! (6) Here, ε BL/air is the ielectric constant of burie layer/air. As the contribution from the higher orer terms is negligible, contribution up to the fourth orere term is taken into consieration. Assuming that the substrate is eplete, it can be moele with an equivalent capacitor S which can be calculate from S =ε /W S, where W S is the substrate epletion layer with [11]. The charge inuce in the substrate an BL/air interface can be written as S (V B -V B ) where V B is the substrate as. or sufficiently thick BL, substrate epletion will be negligible an uner such conition S can be replace by a fitting parameter.. Threshol Voltage Moel onsiering equilibrium charge conservation at each noe in ig.., surface potentials 1, an can be expresse as; eff eff A ( V V 1 1, GOX G1 B1) (7) B eff, ( V V ) B B ( VB VB B eff, S 1, (8) ) (9) Here, A GOX if 1, B B if an B S if. rom equations 6, 7, 8 an 9 the following equations are erive; (10) B 8 (11) r( V V ) B (1) Here, B B V ( V V ), 1 t A ( 1 L t 4 ( 1 L ), V V, V ( V V ) ), 04

6 5 GOX ( V G1 V B1 ) et LN t, ( V V 1 ) L t ( 1 ), L 6 7 B (1 1 ), L 8 ( V V B ) t et t ( V V 1 ) L an r is a fitting parameter, representing resemblance of substrate resistance effect with negligible substrate epletion. Using rammer s rule, the expression for 1, an are obtaine as; 57 5B 48 r4bvb 1, 7 B 46 (1) 8 rbvb 56 an 7 B 46 (14) r7vb B8 r46vb B5 7 B 46 (15) Uner the assumption that the inversion layer will be forme at the front interface ue to the front interface potential, we can compute evice threshol voltage (front channel threshol voltage) by solving V G1 in terms of 1 an then replacing 1 with. The threshol voltage can be expresse as; V V {( ) th B1 1 4 ( 8 rbvb )}{ GOX ( 7 B )} (16) In case of bulk MOSET, threshol voltage is erive from the front interface surface potential 1. The effect of back potential is neglecte but in short channel SOI/ SON structure, 1 will be strongly influence by the back interface. gnificant 7 L N A A B moification of in SON structure ue to air in the box region will initiate consierable performance variation of SON over SOI structure. VG 1 The sub-threshol swing S (.k BT ) 1 which can be calculate using Eqs. an 7 is given as; eff A eff BOX S.k BT,, B GOX (17). RESULTS & ISUSSIONS The plots of threshol voltage an subthreshol slope with channel length are shown in igs. 4 an 5, respectively. The threshol voltage roll-off (TVRO) an subthreshol slope (STS) reuces with increasing channel length ue to reuce SEs with channel length. TVRO preicte by the analytical moel is compare with the experimental results of SOI structure available in reference 0 an goo agreement are obtaine inicating the correctness of the moel. It is foun from both the plots that the TVRO an STS are reuce in case of SON structure compare to SOI structure. ig. 4. lot of Threshol voltage with channel length for SOI (ashe line) an SON (soli line) MOSET. Back-gate voltage V B = 0 V, V = 1 V, T GOX =5nm, T BOX =147nm, Na=0.5*10 14 cm -, N sub =4*10 1 cm -. urve a: T = 8.6 an curve b: T =18. 05

7 ig. 5. lot of Subthreshol slope with channel length for SOI (ashe line) an SON (soli line) MOSET. arameter values are same as in ig.1 an also the symbols have the same significance. The potential coupling ratio 1 reuces with ecreasing GOX layer thickness. This increases the SEs thereby increasing the TVRO an STS. The performance of SON structure is foun to be superior to SOI structure an their comparison is shown in igs. 6 an 7, respectively. ig. 7. Subthreshol Slope with gate oxie thickness for SOI (ashe line) an SON (soli line) MOSET. gnificance of symbol an parameters values is same as in ig.6. Increasing BL or air layer thickness reuces R ue to reuce as a result TVRO an STS are reuce. This can be observe in the results presente in igs. 8 an 9, respectively. ig. 6. Threshol voltage with gate oxie thickness for SON (ashe line) an SOI (soli line) MOSET. Back-gate voltage V B = 0 V, V = 1 V, T BOX =147nm, Na=0.5*10 14 cm -, N sub =4*10 1 cm -, L=50nm. urve a: V = 1V an curve b: V =0.05V. Other parameters are same as in ig. 1. ig. 8. Threshol voltage with gate oxie thickness for SON (ashe line) an SOI (soli line) MOSET. gnificance of symbol an parameters values is same as in ig.6. 06

8 ig. 9. Subthreshol slope with gate oxie thickness for SON (ashe line) an SOI (soli line) MOSET. gnificance of symbol an parameters values is same as in ig.6. Variations of threshol voltage an subthreshol slope with the substrate voltage (V B ) are shown in the igs. 10 an 11, respectively. Reuction of potential coupling ratio ( R ) with increasing substrate as explains the nature of these graphs. ig. 11. Subthreshol slope with substrate as for SON (ashe line) an SOI (soli line) MOSET. gnificance of symbol an parameters values is same as in ig.6. Effective shift in TVRO an STS with an without SEs are plotte with channel length sft as V th an SS Shift in igs. 1 an 1, respectively. In case of SON structure, threshol voltage an subthreshol slope shift is minimum ue to less SEs. ig. 10. Threshol voltage with substrate as for SON (ashe line) an SOI (soli line) MOSET. gnificance of symbol an parameters values is same as in ig.6. sft ig. 10. V with channel length for SON (ashe th line) an SOI (soli line) MOSET. gnificance of symbol an parameters values is same as in ig.6. 07

9 AKNOWLAGEMENT Sanjoy eb thankfully acknowleges the financial support obtaine from School of Nanoscience an Technology, Jaavpur University in the form of UG ellowship. References ig. 10. Subthreshol slope (SS) shift with channel length for SON (ashe line) an SOI (soli line) MOSET. gnificance of symbol an parameters values is same as in ig ONLUSION A three-interface compact capacitive moel of horizontal SOI/SON-MOSET is evelope an analytical expressions for threshol voltage an sub-threshol slope have been erive. The SEs especially IBL effect ue to fringing fiel, substrate as an junctioninuce lateral fiel are incorporate in the moel. The performance of the two evices are stuie an compare in terms of threshol voltage roll-off an subthreshol slope which are very important issues relate to performance analysis of short channel MOSET. Effect of ifferent parameters like channel length, gate oxie thickness, barrier layer thickness, substrate as are also investigate an analyze to unerstan the comparative performance of SOI an SON structures. resent analysis shows that the SON-MOSET technology is foun to offer evices with scalality an enhance performance in terms of threshol voltage roll-off an subthreshol slope compare to simple SOI structure thereby proviing scope for further miniaturization of evices. [1] The International Technology Roamap for Semiconuctor, Emerging Research evices, 009. [] OLINGE J. licon on insulator technology: materials to VLSI. n e. Norwell, MA: Kluwer: Kluwer Acaemic ublishers; [] URRENT. M., BEBELL. S., MALIK. I., ENG. L., HENLEY., What is the future of sub-100nm MOS: Ultrashallow junctions or ultrathin SOI?, Soli State Technology, 000; 4,. [4] ERNST. T., RISTOLOVEANU S., Burie oxie fringing capacitance: A new physical moel an its implication on SOI evice scaling an architecture, in roc. IEEE Int. SOI onf., 1999, pp [5] ERNST. T., TINELLA.., RAYNAU.., RISTOLOVEANU. S., ringing fiels in sub-0.1 lm fully eplete SOI MOSETs: optimization of the evice architecture, Soli-State Electronics, 00; 46, [6] KOH. R., Burie Layer Engineering to Reuce the rain-inuce Barrier Lowering of Sub-0.05 um SOI-MOSET, Jpn. J. Appl. hys., 1999; 8, 94. [7] RISTOLOVEANU. S, LI. S., Electrical haracterization of SOI evices. Norwell, MA: Kluwer, [8] OLINGE. J., licon-on-insulator Technology: Materials to VLSI, Amsteram, Kluwer Acaemic ublishers, [9] YOUNG. K., Short-channel effects in fully eplete SOI MOSET's, IEEE Trans. Electron evices, 1989; 6, [10] RETET. J., MONRAY. S., RISTOLOVEANU S., SKOTNIKI. T., licon-on-nothing MOSETs: erformance, Short-hannel Effects, an 08

10 Backgate oupling, IEEE Transactions on Electron evices, 004; 51(), [11] JURZAK. M., SKOTNIKI. T., AOLI. M., TORMEN. B., MARTINS. J., REGOLINI. J., UTARTRE., ROIBOT.., LENOBLE.., ANTEL. R., MONRAY. S., licon-on-nothing (SON)- an Innovative rocess for Avance MOS, IEEE Transactions on Electron evices, 000; 47(11), [1] SATO. T, NII. H, HATANO. M, TAKENAKA. K., HAYASHI. H., ISHIGO. K., HIRANO. T., IA. K., TSUNASHIMA. Y., abrication of SON(licon on Nothing)-MOSET an Its ULSI Applications, IEI Technical Report,00;10(178); (SM ); [1] KILHYTSKA. V., HUNG. T., OLBREHTS. B., VOVK. Ya., RASKIN. J., LANRE.., Electrical characterization of true licon-on-nothing MOSETs fabricate by layer transfer over a pre-etche cavity, Soli-State Electronics, 007; 51, [14] JURZAK. M. et. al., SON (silicon on nothing) A newevice architecture for the ULSI era, in Symp. VLSI Tech. ig., 1999, 9 0. [15] BALESTRA.., BENAHIR. M., BRINI. J., GHIBAUO. G., Analytical moels of subthreshol swing an threshol voltage for thin an ultrathin film SOI MOSETs, IEEE Trans. Electron evices, 1990; 7, [16] SKOTNIKI. T., MERKEL. G., ERON. T., The Voltage-oping Transformation: A New Approach to the Moeling of MOSET Short-hannel Effects, IEEE Trans. Electron evices, 1988; 9 (), [17] BRENNAN. K., BROWN. A.,Theory of moern electronic semiconuctor evices, John Wiley & Sons, Inc., New York.( 00). [18] XIANG. Y., The electrostatic capacitance of an incline plate capacitor, Journal of Electrostatics, 006; 64, 9-4. [19] XIANG. Y., urther stuy on electrostatic capacitance of an incline plate capacitor, Journal of Electrostatics, 008; 66, [0] MAJUMAR. A., REN. Z., KOESTER. S., HAENSH. W., Unope Boy Extremely Thin SOI MOSETs With Back Gates, IEEE Trans. Electron evices, 009; 56(10),