Learning Outcomes. Spiral 2 4. Function Synthesis Techniques SHANNON'S THEOREM
|
|
- Cameron Henderson
- 6 years ago
- Views:
Transcription
1 -. -. Learning Outcomes piral unction synthesis with: Mues (hannon's Theorem) Memories I can implement logic for any truth table by using hannon's theorem to decompose the function to create two smaller functions and a to mu I can recursively apply hannon's theorem k times to decompose any sie truth table to arrive at k smaller functions and a k to mu I can implement logic for any truth table by using a memory as a look up table I understand how to determine the necessary dimensions of the memory I understand how to reinterpret input combinations as address inputs to determine the correct row to place the desired output Mark Redekopp unction ynthesis Techniques Given a combination function (i.e. truth table or other description) what methods can we use to arrive at a circuit? Neither of these to larger number of inputs Now we will see a few others X Z P Primes between - Implementing functions with mues HANNON' THEOREM
2 -. -. implify This to Mu: Another View Given (,y,) = y + y, simplify (,y,) = then simplify (,y,) = Old Views: I I -bit wide -to- mu (I ) IN IN if(s==) = IN else = IN Given G(a,b,c,d) = bd + ab cd + ac d G(,,c,d) = New View: We can show the function of a -to- mu as a splitter where the variable 's' decides which input passes upwards s I I bit Prime Number unction unction Implementation w/ Mues X Z P X Z P O-set y Implementing a function using mues relies is based on hannon s epansion theorem which states: Primes between - Truth Table ON-set (X,X,,X n ) = X (,X,,X n ) + X (,X,,X n ) X can be pulled out of if we substitute an appropriate constant and qualify it with X or X Now recall a to mu can be built as: if(==) output else output I I = I + I Comparing the two equations, hannon s theorem says we can use X as our select bit to a to mu with (,X, X n ) as input of our mu and (,X,,X n ) as input
3 Binary Decision Trees & Mues plitting on X X Z (,y,) Z (,y,) Z (,y,) Z (,,) Z (,,) Z (,,) Z (,,) y (,y,) (,y,) (,y,) y (,,) (,,) (,,) (,,) (,y,) (,y,) (,y,) (,,) (,,) (,,) (,,) We can use smaller mues by breaking the truth table into fewer disjoint sets This increases the amount of logic at the inputs though Break the truth table into groups based on some number (k) of MB s or each group, describe as a function of the n k LB s X Z I I X Put the k MB s on the selects Implement G hannon s Theorem X Z G (X,X,,X n ) = X (,X,,X n ) + X (,X,,X n ) Now recall a to mu can be built as: I I X G = I + I Comparing the two equations, hannon s theorem says we can use X as our select bit to a to mu with (,X, X n ) as input of our mu and (,X,,X n ) as input We can recursively apply hannon s theorem to pull out more variables: (X,X,,X n ) = X X (,,,X n ) + X X (,,,X n ) + X X (,,,X n ) + X X (,,,X n ) +
4 -. -. Mues allow us to break a function into some number of smaller, disjoint functions Use MB s to choose which small function we want By including the use of inverters we can use a mu with n select bits (given a function of n var s) Break the truth table into groups of rows or each group, put in terms of:,,, or Additional Logic X Z (,y,) can be broken into several disjoint functions () () () () D D D D y Put the n- MB s on the selects X Z G More Practice D D D D y G As ar as We like plitting on Z We can take this tactic all the way down and use ONL a mu to implement any function Connect the input variables to the select bits of the mu The output of the mu is the output of the function Whatever the output should be for each input value, attach that to the input of the mu X Z D D D D D D D D y We can always rearrange our variables if it helps make the function simpler to implement X Z Z X y y
5 Implementing Logic unctions We can use mues to implement any arbitrary logic function Choose one variable to the large function into two smaller functions: and to mu will produce the bit and the chosen "split" variable will be the Implement f(,,, ) using any known method and connect it to of the to mu Implement f(,,, ) using any known method and connect it to of the to mu -. Implementing an Initial tate ince the NL is just a combinational function of the current state and inputs, we can use hannon's theorem (i.e. mues)to find an implementation rather than K Maps Q(t) Q(t) NL (Net tate Logic) CLK D D Current tate eedback OL M (Output (tate Memory) unction Logic) PRE Q(t) D Q CLK CLR REET PRE D Q CLK CLR REET Q(t) A -.8 Eample Implement D & D using to mues with as the select Current tate tate Q Q tate Net tate = = Q*= D Q*= D tate Q* =D Q* =D G G G G G G G G G G G G Output A -.9 Eample Implement D and D using () to mues with Q,Q as the selects Current tate Net tate = = Output tate Q Q tate Q * Q * tate Q * Q * G MTG MG M MT N/A X d d X d d d d d MT M M M -.
6 Eample Implement D using a mu Current tate Net tate H L = H L = H L = H L = ymbol Q ym. Q* ym. Q* ym. Q* ym. Q* O ON O O X d ON ON ON O X d Note: The tate Value, Q forms the Pump output (i.e. when we want the pump to be on and othewise) L O P= L H ON P= -. H Eample Implement D using a mu. Current tate Net tate X = X = tate Q Q Q tate* D D D tate* D D D Z init init init -. Outp ut ummary hannon's theorem allows us to decompose an large function into smaller functions This allows a method that can for a function with It is at the heart of many computer algorithms that will find logic implementation given highlevel descriptions of a function Using a LookUp Table to implement a function MEMORIE
7 -. -. Memories as Look Up Tables Implementing unctions w/ Memories One major application of memories in digital design is to use them as s (Look Up Tables) to implement logic functions Given a logic function use a memory to hold all the and feed the inputs of the function to the address inputs to look up the answer X Z Arbitrary Logic unction Z X 8 Memory A A D X,,Z inputs look up the correct answer 8 Memory A A D Implementing unctions w/ Memories Eample X C i C o C i X 8 Memory A A 8 Memory A A Implement D & D using a memory Current tate Net tate = = tate Q Q tate Q* Q* tat e Q* Q* G G G G G G G G G G G G 8 Memory A A ull Adder D D D D D D C o ++ =
8 Eample L Eample Implement D using a memory Current tate Net tate H L = H L = H L = H L = ymbol Q ym. Q* ym. Q* ym. Q* ym. Q* O ON O O X d ON ON ON O X d L O P= A A H 8 Memory ON P= H Implement D and D using a memory Current tate Net tate = = Output tate Q Q tate Q * Q * tate Q * Q * G MTG MG M MT 8 Memory A A N/A X d d X d d d d d MT M M M D D D Multiplier Eample -. Implementing unctions w/ Memories -. Determine the dimensions of the memory that would be necessary to implement a bit unsigned multiplier with inputs X[:] and [:] and outputs P[??:] (Question: How many bits are needed for P). Eample: X X X X = =... ROM To implement a function w/ n variables and m outputs Just place the output truth table values in the memory Memory will have dimensions: n rows and m columns till does not terribly well (i.e. n inputs requires memory w/ n outputs) But it is easy and since we can change the contents of memories it allows us to create " " logic This idea is at the heart of P = X * = * = =
Spiral 2-4. Function synthesis with: Muxes (Shannon's Theorem) Memories
2-4. Spiral 2-4 Function synthesis with: Muxes (Shannon's Theorem) Memories 2-4.2 Learning Outcomes I can implement logic for any truth table by using Shannon's theorem to decompose the function to create
More informationOutcomes. Unit 14. Review of State Machines STATE MACHINES OVERVIEW. State Machine Design
4. Outcomes 4.2 Unit 4 tate Machine Design I can create a state iagram to solve a sequential problem I can implement a working state machine given a state iagram 4.3 Review of tate Machines 4.4 TATE MACHINE
More information14.1. Unit 14. State Machine Design
4. Unit 4 State Machine Design 4.2 Outcomes I can create a state diagram to solve a sequential problem I can implement a working state machine given a state diagram STATE MACHINES OVERVIEW 4.3 4.4 Review
More information9.1. Unit 9. Implementing Combinational Functions with Karnaugh Maps or Memories
. Unit Implementing Combinational Functions with Karnaugh Maps or Memories . Outcomes I can use Karnaugh maps to synthesize combinational functions with several outputs I can determine the appropriate
More informationSpiral 2-1. Datapath Components: Counters Adders Design Example: Crosswalk Controller
2-. piral 2- Datapath Components: Counters s Design Example: Crosswalk Controller 2-.2 piral Content Mapping piral Theory Combinational Design equential Design ystem Level Design Implementation and Tools
More informationOutcomes. Spiral 1 / Unit 2. Boolean Algebra BOOLEAN ALGEBRA INTRO. Basic Boolean Algebra Logic Functions Decoders Multiplexers
-2. -2.2 piral / Unit 2 Basic Boolean Algebra Logic Functions Decoders Multipleers Mark Redekopp Outcomes I know the difference between combinational and sequential logic and can name eamples of each.
More informationIntroduction to Digital Logic
Introduction to Digital Logic Lecture 15: Comparators EXERCISES Mark Redekopp, All rights reserved Adding Many Bits You know that an FA adds X + Y + Ci Use FA and/or HA components to add 4 individual bits:
More informationReview for Test 1 : Ch1 5
Review for Test 1 : Ch1 5 October 5, 2006 Typeset by FoilTEX Positional Numbers 527.46 10 = (5 10 2 )+(2 10 1 )+(7 10 0 )+(4 10 1 )+(6 10 2 ) 527.46 8 = (5 8 2 ) + (2 8 1 ) + (7 8 0 ) + (4 8 1 ) + (6 8
More informationSystems I: Computer Organization and Architecture
Systems I: Computer Organization and Architecture Lecture 6 - Combinational Logic Introduction A combinational circuit consists of input variables, logic gates, and output variables. The logic gates accept
More information211: Computer Architecture Summer 2016
211: Computer Architecture Summer 2016 Liu Liu Topic: Storage Project3 Digital Logic - Storage: Recap - Review: cache hit rate - Project3 - Digital Logic: - truth table => SOP - simplification: Boolean
More informationLearning Objectives 10/7/2010. CE 411 Digital System Design. Fundamental of Logic Design. Review the basic concepts of logic circuits. Dr.
/7/ CE 4 Digital ystem Design Dr. Arshad Aziz Fundamental of ogic Design earning Objectives Review the basic concepts of logic circuits Variables and functions Boolean algebra Minterms and materms ogic
More informationTotal Time = 90 Minutes, Total Marks = 50. Total /50 /10 /18
University of Waterloo Department of Electrical & Computer Engineering E&CE 223 Digital Circuits and Systems Midterm Examination Instructor: M. Sachdev October 23rd, 2007 Total Time = 90 Minutes, Total
More informationCombinational Logic. By : Ali Mustafa
Combinational Logic By : Ali Mustafa Contents Adder Subtractor Multiplier Comparator Decoder Encoder Multiplexer How to Analyze any combinational circuit like this? Analysis Procedure To obtain the output
More informationSoftware Engineering 2DA4. Slides 8: Multiplexors and More
Software Engineering 2DA4 Slides 8: Multiplexors and More Dr. Ryan Leduc Department of Computing and Software McMaster University Material based on S. Brown and Z. Vranesic, Fundamentals of Digital Logic
More informationPanHomc'r I'rui;* :".>r '.a'' W"»' I'fltolt. 'j'l :. r... Jnfii<on. Kslaiaaac. <.T i.. %.. 1 >
5 28 (x / &» )»(»»» Q ( 3 Q» (» ( (3 5» ( q 2 5 q 2 5 5 8) 5 2 2 ) ~ ( / x {» /»»»»» (»»» ( 3 ) / & Q ) X ] Q & X X X x» 8 ( &» 2 & % X ) 8 x & X ( #»»q 3 ( ) & X 3 / Q X»»» %» ( z 22 (»» 2» }» / & 2 X
More informationMANY BILLS OF CONCERN TO PUBLIC
- 6 8 9-6 8 9 6 9 XXX 4 > -? - 8 9 x 4 z ) - -! x - x - - X - - - - - x 00 - - - - - x z - - - x x - x - - - - - ) x - - - - - - 0 > - 000-90 - - 4 0 x 00 - -? z 8 & x - - 8? > 9 - - - - 64 49 9 x - -
More informationReview Getting the truth table
Digital Circuits Review Getting the truth table The first step in designing a digital circuit usually is to get the truth table. That is, for every input combination, figure out what an output bit should
More informationMODULAR CIRCUITS CHAPTER 7
CHAPTER 7 MODULAR CIRCUITS A modular circuit is a digital circuit that performs a specific function or has certain usage. The modular circuits to be introduced in this chapter are decoders, encoders, multiplexers,
More informationELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT, OAKLAND UNIVERSITY ECE-2700: Digital Logic Design Winter Notes - Unit 2
ECE-7: Digital Logic Design Winter 8 Notes - Unit OPTIMIZED IMPLEMENTATION OF LOGIC FUNCTIONS BASIC TECHNIQUES: We can alas minimie logic unctions using the Boolean theorems. Hoever, more poerul methods
More informationQ: Examine the relationship between X and the Next state. How would you describe this circuit? A: An inverter which is synched with a clock signal.
/2/2 OF 7 Next, let s reverse engineer a T-Flip flop Prob. (Pg 529) Note that whenever T is equal to, there is a state change, otherwise, there isn t. In this circuit, (x) determines whether the output
More informationDifferent encodings generate different circuits
FSM State Encoding Different encodings generate different circuits no easy way to find best encoding with fewest logic gates or shortest propagation delay. Binary encoding: K states need log 2 K bits i.e.,
More information(Boolean Algebra, combinational circuits) (Binary Codes and -arithmetics)
Task 1. Exercises: Logical Design of Digital Systems Seite: 1 Self Study (Boolean Algebra, combinational circuits) 1.1 Minimize the function f 1 a ab ab by the help of Boolean algebra and give an implementation
More informationLOWELL WEEKI.Y JOURINAL
/ $ 8) 2 {!»!» X ( (!!!?! () ~ x 8» x /»!! $?» 8! ) ( ) 8 X x /! / x 9 ( 2 2! z»!!»! ) / x»! ( (»»!» [ ~!! 8 X / Q X x» ( (!»! Q ) X x X!! (? ( ()» 9 X»/ Q ( (X )!» / )! X» x / 6!»! }? ( q ( ) / X! 8 x»
More informationCombinational Logic Design Combinational Functions and Circuits
Combinational Logic Design Combinational Functions and Circuits Overview Combinational Circuits Design Procedure Generic Example Example with don t cares: BCD-to-SevenSegment converter Binary Decoders
More informationLooking at a two binary digit sum shows what we need to extend addition to multiple binary digits.
A Full Adder The half-adder is extremely useful until you want to add more that one binary digit quantities. The slow way to develop a two binary digit adders would be to make a truth table and reduce
More informationOutcomes. Spiral 1 / Unit 3. The Problem SYNTHESIZING LOGIC FUNCTIONS
-3. -3.2 Outcomes Spiral / Unit 3 Minterm and Materms Canonical Sums and Products 2 and 3 Variable oolean lgebra Theorems emorgan's Theorem unction Snthesis use Canonical Sums/Products Mark Redekopp I
More informationChapter 3 Combinational Logic Design
Logic and Computer Design Fundamentals Chapter 3 Combinational Logic Design Part 2 Combinational Logic Charles Kime & Thomas Kaminski 28 Pearson Education, Inc. (Hyperlinks are active in View Show mode)
More informationDIGITAL CIRCUIT LOGIC BOOLEAN ALGEBRA
DIGITAL CIRCUIT LOGIC BOOLEAN ALGEBRA 1 Learning Objectives Understand the basic operations and laws of Boolean algebra. Relate these operations and laws to circuits composed of AND gates, OR gates, INVERTERS
More informationCSE 140L Spring 2010 Lab 1 Assignment Due beginning of the class on 14 th April
CSE 140L Spring 2010 Lab 1 Assignment Due beginning of the class on 14 th April Objective - Get familiar with the Xilinx ISE webpack tool - Learn how to design basic combinational digital components -
More informationWORKBOOK. Try Yourself Questions. Electrical Engineering Digital Electronics. Detailed Explanations of
27 WORKBOOK Detailed Eplanations of Try Yourself Questions Electrical Engineering Digital Electronics Number Systems and Codes T : Solution Converting into decimal number system 2 + 3 + 5 + 8 2 + 4 8 +
More information3. Complete the following table of equivalent values. Use binary numbers with a sign bit and 7 bits for the value
EGC22 Digital Logic Fundamental Additional Practice Problems. Complete the following table of equivalent values. Binary. Octal 35.77 33.23.875 29.99 27 9 64 Hexadecimal B.3 D.FD B.4C 2. Calculate the following
More informationDigital Design. Digital Design
Principles Of Digital Design Chapter 3 Boolean Algebra and Logic Design Boolean Algebra Logic Gates Digital Design Implementation Technology ASICs Gate Arrays Basic Algebraic Properties A set is a collection
More informationECE380 Digital Logic. Positional representation
ECE380 Digital Logic Number Representation and Arithmetic Circuits: Number Representation and Unsigned Addition Dr. D. J. Jackson Lecture 16-1 Positional representation First consider integers Begin with
More informationMenu. Master-Slave Flip-Flop
Menu Clocks and Master-lave Flip-Flops J-K and other Flip-Flops Truth table & excitation table Adders (see [Lam: pg 130]) Counters Look into my... 1 CLK Master-lave Flip-Flop Master-lave Latch/Flip-Flop
More informationto become literate in most common concepts and terminology of digital electronics
Logic Design 1 Goal: to become literate most common concepts and termology of digital electronics Important concepts: - use abstraction and composition to implement complicated functionality with very
More informationWeek-I. Combinational Logic & Circuits
Week-I Combinational Logic & Circuits Overview Binary logic operations and gates Switching algebra Algebraic Minimization Standard forms Karnaugh Map Minimization Other logic operators IC families and
More informationCHAPTER1: Digital Logic Circuits Combination Circuits
CS224: Computer Organization S.KHABET CHAPTER1: Digital Logic Circuits Combination Circuits 1 PRIMITIVE LOGIC GATES Each of our basic operations can be implemented in hardware using a primitive logic gate.
More informationBinary addition (1-bit) P Q Y = P + Q Comments Carry = Carry = Carry = Carry = 1 P Q
Digital Arithmetic In Chapter 2, we have discussed number systems such as binary, hexadecimal, decimal, and octal. We have also discussed sign representation techniques, for example, sign-bit representation
More informationECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN. Week 9 Dr. Srinivas Shakkottai Dept. of Electrical and Computer Engineering
ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN Week 9 Dr. Srinivas Shakkottai Dept. of Electrical and Computer Engineering TIMING ANALYSIS Overview Circuits do not respond instantaneously to input changes
More informationCombinational Logic. Mantıksal Tasarım BBM231. section instructor: Ufuk Çelikcan
Combinational Logic Mantıksal Tasarım BBM23 section instructor: Ufuk Çelikcan Classification. Combinational no memory outputs depends on only the present inputs expressed by Boolean functions 2. Sequential
More informationOutcomes. Spiral 1 / Unit 5. Logic Function Synthesis KARNAUGH MAPS. Karnaugh Maps
-. -. Spiral / Unit Mark Redekopp Outcomes I know the difference between combinational and sequential logic and can name examples of each. I understand latency, throughput, and at least technique to improve
More informationBinary addition example worked out
Binary addition example worked out Some terms are given here Exercise: what are these numbers equivalent to in decimal? The initial carry in is implicitly 0 1 1 1 0 (Carries) 1 0 1 1 (Augend) + 1 1 1 0
More informationDiscrete Mathematics. CS204: Spring, Jong C. Park Computer Science Department KAIST
Discrete Mathematics CS204: Spring, 2008 Jong C. Park Computer Science Department KAIST Today s Topics Combinatorial Circuits Properties of Combinatorial Circuits Boolean Algebras Boolean Functions and
More informationFOF (Functionally Observable Fault): A unified mode for testing and debugging - ATPG and application to debugging -
FOF Functionally Observable Fault: uniied mode or testing and debugging - TPG and application to debugging - Masahiro Fujita VLSI Design and Education enter VDE University o Tokyo Stuck-at ault and unctional
More informationECE 545 Digital System Design with VHDL Lecture 1. Digital Logic Refresher Part A Combinational Logic Building Blocks
ECE 545 Digital System Design with VHDL Lecture Digital Logic Refresher Part A Combinational Logic Building Blocks Lecture Roadmap Combinational Logic Basic Logic Review Basic Gates De Morgan s Law Combinational
More informationThe Design Procedure. Output Equation Determination - Derive output equations from the state table
The Design Procedure Specification Formulation - Obtain a state diagram or state table State Assignment - Assign binary codes to the states Flip-Flop Input Equation Determination - Select flipflop types
More informationGF(2 m ) arithmetic: summary
GF(2 m ) arithmetic: summary EE 387, Notes 18, Handout #32 Addition/subtraction: bitwise XOR (m gates/ops) Multiplication: bit serial (shift and add) bit parallel (combinational) subfield representation
More informationBoolean Algebra, Gates and Circuits
Boolean Algebra, Gates and Circuits Kasper Brink November 21, 2017 (Images taken from Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc.) Outline Last week: Von
More informationBoolean Algebra and Digital Logic 2009, University of Colombo School of Computing
IT 204 Section 3.0 Boolean Algebra and Digital Logic Boolean Algebra 2 Logic Equations to Truth Tables X = A. B + A. B + AB A B X 0 0 0 0 3 Sum of Products The OR operation performed on the products of
More informationMark Redekopp, All rights reserved. Lecture 5 Slides. Canonical Sums and Products (Minterms and Maxterms) 2-3 Variable Theorems DeMorgan s Theorem
Lecture 5 Slides Canonical Sums and Products (Minterms and Materms) 2-3 Variable Theorems DeMorgan s Theorem Using products of materms to implement a function MAXTERMS Question Is there a set of functions
More informationOutcomes. Spiral 1 / Unit 5. Logic Function Synthesis KARNAUGH MAPS. Karnaugh Maps
-. -. Spiral / Unit Mark Redekopp Outcomes I know the difference between combinational and sequential logic and can name examples of each. I understand latency, throughput, and at least technique to improve
More informationBuilding a Computer Adder
Logic Gates are used to translate Boolean logic into circuits. In the abstract it is clear that we can build AND gates that perform the AND function and OR gates that perform the OR function and so on.
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 1 Gate Circuits and Boolean Equations Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active
More informationLecture 7: Logic design. Combinational logic circuits
/24/28 Lecture 7: Logic design Binary digital circuits: Two voltage levels: and (ground and supply voltage) Built from transistors used as on/off switches Analog circuits not very suitable for generic
More informationShift Register Counters
Shift Register Counters Shift register counter: a shift register with the serial output connected back to the serial input. They are classified as counters because they give a specified sequence of states.
More informationXI STANDARD [ COMPUTER SCIENCE ] 5 MARKS STUDY MATERIAL.
2017-18 XI STANDARD [ COMPUTER SCIENCE ] 5 MARKS STUDY MATERIAL HALF ADDER 1. The circuit that performs addition within the Arithmetic and Logic Unit of the CPU are called adders. 2. A unit that adds two
More informationCHAPTER 12 Boolean Algebra
318 Chapter 12 Boolean Algebra CHAPTER 12 Boolean Algebra SECTION 12.1 Boolean Functions 2. a) Since x 1 = x, the only solution is x = 0. b) Since 0 + 0 = 0 and 1 + 1 = 1, the only solution is x = 0. c)
More informationComputer Science 324 Computer Architecture Mount Holyoke College Fall Topic Notes: Digital Logic
Computer Science 324 Computer Architecture Mount Holyoke College Fall 2007 Topic Notes: Digital Logic Our goal for the next few weeks is to paint a a reasonably complete picture of how we can go from transistor
More informationDigital Circuits and Systems
EE201: Digital Circuits and Systems 4 Sequential Circuits page 1 of 11 EE201: Digital Circuits and Systems Section 4 Sequential Circuits 4.1 Overview of Sequential Circuits: Definition The circuit whose
More informationELE2120 Digital Circuits and Systems. Tutorial Note 9
ELE2120 Digital Circuits and Systems Tutorial Note 9 Outline 1. Exercise(1) Sequential Circuit Analysis 2. Exercise (2) Sequential Circuit Analysis 3. Exercise (3) Sequential Circuit Analysis 4. Ref. Construction
More informationUniversity of Toronto Faculty of Applied Science and Engineering Edward S. Rogers Sr. Department of Electrical and Computer Engineering
University of Toronto Faculty of Applied Science and Engineering Edward S. Rogers Sr. Department of Electrical and Computer Engineering Final Examination ECE 241F - Digital Systems Examiners: S. Brown,
More informationCHAPTER 7. Solutions for Exercises
CHAPTER 7 Solutions for Exercises E7.1 (a) For the whole part we have: Quotient Remainders 23/2 11 1 11/2 5 1 5/2 2 1 2/2 1 0 1/2 0 1 Reading the remainders in reverse order we obtain: 23 10 = 10111 2
More informationSchedule. ECEN 301 Discussion #25 Final Review 1. Date Day Class No. 1 Dec Mon 25 Final Review. Title Chapters HW Due date. Lab Due date.
Schedule Date Day Class No. Dec Mon 25 Final Review 2 Dec Tue 3 Dec Wed 26 Final Review Title Chapters HW Due date Lab Due date LAB 8 Exam 4 Dec Thu 5 Dec Fri Recitation HW 6 Dec Sat 7 Dec Sun 8 Dec Mon
More informationECE 238L Boolean Algebra - Part I
ECE 238L Boolean Algebra - Part I August 29, 2008 Typeset by FoilTEX Understand basic Boolean Algebra Boolean Algebra Objectives Relate Boolean Algebra to Logic Networks Prove Laws using Truth Tables Understand
More informationLogic and Computer Design Fundamentals. Chapter 2 Combinational Logic Circuits. Part 1 Gate Circuits and Boolean Equations
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part Gate Circuits and Boolean Equations Charles Kime & Thomas Kaminski 28 Pearson Education, Inc. (Hperlinks are active in
More informationContents. Chapter 3 Combinational Circuits Page 1 of 36
Chapter 3 Combinational Circuits Page of 36 Contents Combinational Circuits...2 3. Analysis of Combinational Circuits...3 3.. Using a Truth Table...3 3..2 Using a Boolean Function...6 3.2 Synthesis of
More informationTHE LOGIC OF COMPOUND STATEMENTS
CHAPTER 2 THE LOGIC OF COMPOUND STATEMENTS Copyright Cengage Learning. All rights reserved. SECTION 2.4 Application: Digital Logic Circuits Copyright Cengage Learning. All rights reserved. Application:
More informationBinary Multipliers. Reading: Study Chapter 3. The key trick of multiplication is memorizing a digit-to-digit table Everything else was just adding
Binary Multipliers The key trick of multiplication is memorizing a digit-to-digit table Everything else was just adding 2 3 4 5 6 7 8 9 2 3 4 5 6 7 8 9 2 2 4 6 8 2 4 6 8 3 3 6 9 2 5 8 2 24 27 4 4 8 2 6
More information1.10 (a) Function of AND, OR, NOT, NAND & NOR Logic gates and their input/output.
Chapter 1.10 Logic Gates 1.10 (a) Function of AND, OR, NOT, NAND & NOR Logic gates and their input/output. Microprocessors are the central hardware that runs computers. There are several components that
More informationBoolean Algebra CHAPTER 15
CHAPTER 15 Boolean Algebra 15.1 INTRODUCTION Both sets and propositions satisfy similar laws, which are listed in Tables 1-1 and 4-1 (in Chapters 1 and 4, respectively). These laws are used to define an
More informationLecture 6: Gate Level Minimization Syed M. Mahmud, Ph.D ECE Department Wayne State University
Lecture 6: Gate Level Minimization Syed M. Mahmud, Ph.D ECE Department Wayne State University Original Source: Aby K George, ECE Department, Wayne State University Contents The Map method Two variable
More informationUNIT III Design of Combinational Logic Circuits. Department of Computer Science SRM UNIVERSITY
UNIT III Design of ombinational Logic ircuits Department of omputer Science SRM UNIVERSITY Introduction to ombinational ircuits Logic circuits for digital systems may be ombinational Sequential combinational
More informationCombinational Logic. Jee-Hwan Ryu. School of Mechanical Engineering Korea University of Technology and Education
MEC5 디지털공학 Combinational Logic Jee-Hwan Ryu School of Mechanical Engineering Combinational circuits Outputs are determined from the present inputs Consist of input/output variables and logic gates inary
More information8. Design Tradeoffs x Computation Structures Part 1 Digital Circuits. Copyright 2015 MIT EECS
8. Design Tradeoffs 6.004x Computation Structures Part 1 Digital Circuits Copyright 2015 MIT EECS 6.004 Computation Structures L08: Design Tradeoffs, Slide #1 There are a large number of implementations
More informationCombinatorial RTL Components
Principles Of Digital Design Combinatorial RTL Components Computation and Reorganization Arithmetic and Comparison Components Logic Components election Components ncoding/decoding Components Bit manipulation
More informationCprE 281: Digital Logic
CprE 281: Digital Logic Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ Signed Numbers CprE 281: Digital Logic Iowa State University, Ames, IA Copyright Alexander Stoytchev Administrative
More informationEE40 Lec 15. Logic Synthesis and Sequential Logic Circuits
EE40 Lec 15 Logic Synthesis and Sequential Logic Circuits Prof. Nathan Cheung 10/20/2009 Reading: Hambley Chapters 7.4-7.6 Karnaugh Maps: Read following before reading textbook http://www.facstaff.bucknell.edu/mastascu/elessonshtml/logic/logic3.html
More information8. Design Tradeoffs x Computation Structures Part 1 Digital Circuits. Copyright 2015 MIT EECS
8. Design Tradeoffs 6.004x Computation Structures Part 1 Digital Circuits Copyright 2015 MIT EECS 6.004 Computation Structures L08: Design Tradeoffs, Slide #1 There are a large number of implementations
More informationMidterm Examination # 1 Wednesday, February 25, Duration of examination: 75 minutes
Page 1 of 10 School of Computer Science 60-265-01 Computer Architecture and Digital Design Winter 2009 Semester Midterm Examination # 1 Wednesday, February 25, 2009 Student Name: First Name Family Name
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT2: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 4 Following the slides of Dr. Ahmed H. Madian محرم 439 ه Winter 28
More informationCSE140: Design of Sequential Logic
CSE4: Design of Sequential Logic Instructor: Mohsen Imani Flip Flops 2 Counter 3 Up counter 4 Up counter 5 FSM with JK-Flip Flop 6 State Table 7 State Table 8 Circuit Minimization 9 Circuit Timing Constraints
More information9/29/2016. Task: Checking for a Lower-Case Letter. ECE 120: Introduction to Computing. Change C 5 to C 5 to Obtain L(C) from U(C)
University of Illinois at Urbana-Champaign Dept. of Electrical and Computer Engineering ECE 12: Introduction to Computing Multiplexers (Muxes) Task: Checking for a Lower-Case Letter What if we also need
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 1 Gate Circuits and Boolean Equations Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. Overview Part 1 Gate
More informationSynchronous Sequential Logic
1 IT 201 DIGITAL SYSTEMS DESIGN MODULE4 NOTES Synchronous Sequential Logic Sequential Circuits - A sequential circuit consists of a combinational circuit and a feedback through the storage elements in
More informationENGG 1203 Tutorial _03 Laboratory 3 Build a ball counter. Lab 3. Lab 3 Gate Timing. Lab 3 Steps in designing a State Machine. Timing diagram of a DFF
ENGG 1203 Tutorial _03 Laboratory 3 Build a ball counter Timing diagram of a DFF Lab 3 Gate Timing difference timing for difference kind of gate, cost dependence (1) Setup Time = t2-t1 (2) Propagation
More informationCombinational Logic Design Principles
Combinational Logic Design Principles Switching algebra Doru Todinca Department of Computers Politehnica University of Timisoara Outline Introduction Switching algebra Axioms of switching algebra Theorems
More informationCS61c: Representations of Combinational Logic Circuits
CS61c: Representations of Combinational Logic Circuits J. Wawrzynek March 5, 2003 1 Introduction Recall that synchronous systems are composed of two basic types of circuits, combination logic circuits,
More informationComputational Boolean Algebra. Pingqiang Zhou ShanghaiTech University
Computational Boolean Algebra Pingqiang Zhou ShanghaiTech University Announcements Written assignment #1 is out. Due: March 24 th, in class. Programming assignment #1 is out. Due: March 24 th, 11:59PM.
More information6. Finite State Machines
6. Finite State Machines 6.4x Computation Structures Part Digital Circuits Copyright 25 MIT EECS 6.4 Computation Structures L6: Finite State Machines, Slide # Our New Machine Clock State Registers k Current
More informationAnalysis and Synthesis of Weighted-Sum Functions
Analysis and Synthesis of Weighted-Sum Functions Tsutomu Sasao Department of Computer Science and Electronics, Kyushu Institute of Technology, Iizuka 820-8502, Japan April 28, 2005 Abstract A weighted-sum
More informationS.Y. Diploma : Sem. III [CO/CM/IF/CD/CW] Digital Techniques
S.Y. Diploma : Sem. III [CO/CM/IF/CD/CW] Digital Techniques Time: 3 Hrs.] Prelim Question Paper Solution [Marks : 100 Q.1(a) Attempt any SIX of the following : [12] Q.1(a) (i) Derive AND gate and OR gate
More informationCombinational Logic Design Arithmetic Functions and Circuits
Combinational Logic Design Arithmetic Functions and Circuits Overview Binary Addition Half Adder Full Adder Ripple Carry Adder Carry Look-ahead Adder Binary Subtraction Binary Subtractor Binary Adder-Subtractor
More information04. What is the Mod number of the counter circuit shown below? Assume initially reset.
. Which of the following is the state diagram for the Meale machine shown below. 4. What is the Mod number of the counter circuit shown below? Assume initiall reset. input CLK D output D D a. b. / / /
More informationQuantum Computing. 6. Quantum Computer Architecture 7. Quantum Computers and Complexity
Quantum Computing 1. Quantum States and Quantum Gates 2. Multiple Qubits and Entangled States 3. Quantum Gate Arrays 4. Quantum Parallelism 5. Examples of Quantum Algorithms 1. Grover s Unstructured Search
More informationChapter 5 Arithmetic Circuits
Chapter 5 Arithmetic Circuits SKEE2263 Digital Systems Mun im/ismahani/izam {munim@utm.my,e-izam@utm.my,ismahani@fke.utm.my} February 11, 2016 Table of Contents 1 Iterative Designs 2 Adders 3 High-Speed
More informationPart 1: Digital Logic and Gates. Analog vs. Digital waveforms. The digital advantage. In real life...
Part 1: Digital Logic and Gates Analog vs Digital waveforms An analog signal assumes a continuous range of values: v(t) ANALOG A digital signal assumes discrete (isolated, separate) values Usually there
More informationUnit 2 Boolean Algebra
Unit 2 Boolean Algebra 1. Developed by George Boole in 1847 2. Applied to the Design of Switching Circuit by Claude Shannon in 1939 Department of Communication Engineering, NCTU 1 2.1 Basic Operations
More informationMulti-Level Logic Optimization. Technology Independent. Thanks to R. Rudell, S. Malik, R. Rutenbar. University of California, Berkeley, CA
Technology Independent Multi-Level Logic Optimization Prof. Kurt Keutzer Prof. Sanjit Seshia EECS University of California, Berkeley, CA Thanks to R. Rudell, S. Malik, R. Rutenbar 1 Logic Optimization
More informationCOMBINATIONAL LOGIC FUNCTIONS
COMBINATIONAL LOGIC FUNCTIONS Digital logic circuits can be classified as either combinational or sequential circuits. A combinational circuit is one where the output at any time depends only on the present
More information