EE201l Homework # 6. Microprogrammed Control Unit Design

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1 EE201l Homework # 6 Microprogrammed ontrol Unit Design Instructor: G. Puvvada 1. Refer to the design of the microprogrammed control unit for the change dispenser discussed in your class notes Assume that the change to be dispensed is $0-87. For this value of change, find (and state) the sequence of control memory addresses generated to dispense the change. Start with the zero address. (Hint: Address sequence is same as the step sequence that can be obtained by processing the algorithm given in the control sequence with a starting value of X=87.) 2. For simplicity, we ignored nickels in the change dispenser control unit. Now, we wish to take into consideration nickels also (along with quarters, dimes, and cents). 2.1 Find the size of the ontrol Memory ROM you require. Size of ontrol Memory ROM: Number of address lines going to this ROM: Number of data lines coming out of this ROM: 2.2 Find the sizes of the following three fields. ondition Select: Branch Address: ontrol Signals: 3/21/06 EE201L Homework #6 1 / 16 opyright 2006 Gandhi Puvvada

5 3. Design a two-bit up/down counter using the microprogrammed control unit method. Given a control input called UP/DOWN, you are required to produce the counter s output in sevensegment code (SS code) suitable for your Digilab FPGA DIO1 board. Please refer to your lab manual and see the Flash animation at UP/DOWN = "1", ounter increments (goes up) with each clock pulse, for example {0, 1, 2, 3, 0, 1, 2,...}; The SS code (abcdefg) output will be: { , , , , , , ,...} UP/DOWN = "0", ounter decrements (goes down) in this manner {0, 3, 2, 1, 0, 3, 2,...}; The SS code (abcdefg) output will be: { , , , , , , ,...} Initially, the microprogram counter is reset to zero and the up-down counter output shall be corresponding to zero display on the SS display. The control sequence below is suggested. Some steps/details are missing. You must fill them up before proceeding further. Step 0 Output ount 0 ( ) If UP/DOWN = 0 --> Go to step 3 Step 1 Output ount 1 ( ) If UP/DOWN = 0 --> Go to step 0 Step 2 Output ount 2 ( )- If Step 3 Assume there exist only two situations, depending upon the single ONDITION SELET Bit (in the condition select field of the micro-instruction): ONDITION SELET Bit = 0 -->No Branch ONDITION SELET Bit = 1 -->Branch if UP/DOWN = 0 omplete the design below, by interconnecting the components and filling in the bits in the ROM. a Vcc lk /RESET f e g b c UP DOWN UP/DOWN I0 I1 s Y LOAD LOAD /LR ontrol Memeory d ommon anode 7-seg. display S BA S0 B1 B0 Output field a b c d e f g Step 0 Step 1 Step 2 Step 3 SS ode a b c d e f g 3/21/06 EE201L Homework #6 2 / 16 opyright 2006 Gandhi Puvvada

8 4. Microcoded control unit design: onsider the following state diagram with four states, STEP0, STEP1, STEP2, STEP3. Four output lights (one for each state) L0, L1, L2, L3 should be controlled such that L0 is ON (L0 = 1) when the machine is in STEP0 and so on. Y = 1 STEP 0 L0 = 1 X = 0 STEP Y = 0 1 L1 = 1 STEP 2 L2 = 1 X = 0 STEP 3 L3 = 1 1 X = 1 O n ce it co m es to step 3, it rem a in s th ere. X = 1 omplete the following design of a microcoded control unit to serve the above requirements. 4.1 Find the depth of the control store: 4.1.1Number of steps in the control sequence: 4.1.2Number of location in the control store (u_program Memory) 4.1.3Number of address bits required to address this memory: 4.2 Find the width of the control store: 4.2.1ontrol field size (number of bits): 4.2.2Branch address field size (number of bits): 4.2.3ondition select field size (number of bits): onditions ondition select bits No Branch 00 Branch if X = 1 01 Branch if Y = 1 10 Unconditional branch omplete the schematic below and fill-in the control store with appropriate microcode. Fill-in "d" for don t care. I 0 Increm ent lk /RESET I 1 I 2 Y LOAD up I 3 S 1 S 0 Address 0 0 ondition Select Branch Address S 1 S 0 A 1 A 0 L 0 L 1 L 2 L 3? OUTPUTS M { 2 3/21/06 EE201L Homework #6 3 / 16 opyright 2006 Gandhi Puvvada

9 5. One-Hot method of designing the change dispenser Let us revisit the hange Dispensing Machine disussed in the class notes. One deviation from the class notes: here, we use three comparators ostensibly to speed up the dispensing process. The block diagram for the datapath unit (DPU) and the ontrol Unit (U) are shown above, together with a State Diagram I1 I0 x-mux Y hange x_mux_sel I0 I1 I2 S1 Y S0 S1 S0 } onst. Select x_minus_const x-reg Subtractor x_load onst omp omp omp X >= 25 X >= 10 X >= 1 lock /Reset GO Rel_25c Rel_10c Rel_1c ontrol Unit S1 S0 x_mux_sel x_load } onst. Select 2 3/21/06 EE201L Homework #6 4 / 16 opyright 2006 Gandhi Puvvada

10 Suggested State Diagram INITIAL Initialize X <= change x_mux_sel = 0 x_load = 1 ~RESET (X >= 25) OMPARE ompare X with constants simultaneously (X>=25)(X>=10)(X>=1) GO Release uarter X <= X - 25 onst. Sel = 00 x_mux_sel = 1 x_load = 1 RELEASE_25 (X>=25)(X>=10) unconditional (X>=25)(X>=10)(X>=1) DONE DONE (Wait for GO) ~GO RELEASE_10 Release Dime X <= X - 10 onst. Sel = 01 x_mux_sel = 1 x_load = 1 RELEASE_1 Release ent X <= X - 1 onst. Sel = 10 x_mux_sel = 1 x_load = 1 Write down the next state equations. INITIAL State D IN = IN * = OMPARE State D = * = RELEASE_25 State D 25 = 25 * = RELEASE_10 State D 10 = 10 * = RELEASE_1 State D 1 = 1 * = DONE State D D = D * = 3/21/06 EE201L Homework #6 5 / 16 opyright 2006 Gandhi Puvvada

11 5.1 Mr. Bruin made an observation that the OMPARE state is reached unconditionally from all other states (INITIAL, RELEASE_25, RELEASE_10, RELEASE_1) except from the DONE state. So he simplified the next state logic as shown below. Miss Bruin corrected his design by replacing D D with D. What do you say? D D D LK V PRE D LK LR /RESET 5.2 Note that the state flip_flop for in the above question is positive edge-triggered. So, we infer that the state machine changes state on the positive edge of the clock. So an output signal such as Rel_25 or x_load will go active from a positive edge of the clock to another positive edge of the clock. OMPARE Now consider the X register triggered by x_load control signal. It is a negative edge triggered register. Assume that the x_load signal is glitch free. Your choice is: hoice-a / hoice-b hoice-a: hoice-b: We should either change the x-register to a positive edge triggered register to match with the positive edge triggered state machine or change the state memory flip-flops to negative edge triggered flip-flops to match with the X register. We do not have to change anything. We need to load the X register with x_minus_constant at the end of the clock (state) as we need to allow time for the subtractor to produce x_minus_constant. The x_load is a positive going pulse. It is high during the RELEASE_25 state. It has a negative edge at the end of the pulse. So the negative edge of the x-load triggers the X register at the right time. 5.3 omplete the truth table for the OFL (output function logic) for generating outputs in different states. Please write a "1" or a "0" or a "d" ("d" for "don't care") in each of the squares below. Symbolic name of the state URRENT STATE OIN RELEASES X- MUX IN D Rel_25 Rel_10 Rel_1 SEL S1 S0 ONSTANT SEL X- LOAD DONE INITIAL 1 OMPUTE RELEASE_25 RELEASE_10 RELEASE_1 DONE 3/21/06 EE201L Homework #6 6 / 16 opyright 2006 Gandhi Puvvada

12 5.4 For a particular amount of change dispensed using the above state machine designed by you, the waveforms are captured on a logic analyzer. The waveforms for the state flip-flops are recorded below completely. Other waveforms are drawn partly. It is difficult to draw the waveforms to show exact delays of the state flip-flops, the X register, and the constant comparator. Assume that the clock period is of 10 ns and the state flip-flop outputs change in 1ns after the positive edge of the clock. Also assume that the subtractor and the comparator take about 5ns. Also for the sake of drawing these waveforms, assume that the don t cares (d s) in the table in 5.3 above are all replaced with zeros (0 s). omplete all waveforms. Try to shows delays so as to indicate the cause and effect relation. LOK GO IN OMPARE DONE X >= 25 X >= 10 X >= 1 const_sel 00 x_mux_sel x_load x_minus_const X 3/21/06 EE201L Homework #6 7 / 16 opyright 2006 Gandhi Puvvada

13 6. Analyze the following predesigned microprogrammed control unit. 6.1 omplete the state diagram using the symbolic state names W, X, Y, and Z for the four micro-instructions in the microprogram memory. In each state, show the output as "LIGHT ON" or "LIGHT OFF" as appropriate. W LIGHT X LIGHT a b 1 c I0 I1 I2 I3 S1 mux S0 Y Active High Synchronous LOAD lock WAVEFORM M B1 B0 MSB LSB D D A1 A0 Two-bit address up RESET Y LIGHT Z LIGHT Address ondition Select Branch Address B1 B0 Output L STATE W STATE X STATE Y STATE Z WAVEFORM 330 OHM Vcc 6.2 For the above control unit, the following patters of RESET, a, b and c inputs are applied. Draw the waveforms of the address outputs A0(LSB), A1(MSB) of the up (microprogram counter) and the overall output L of the control unit. LOK RESET a b c A 0 (LSB) A 1 (MSB) H L H L L H L Note: this is the signal L (not the actual light) 3/21/06 EE201L Homework #6 8 / 16 opyright 2006 Gandhi Puvvada

7. Microprogrammed ontrol Unit: Please refer to the "detour" sign controller you designed using one-hot-method in your lab. Redesign it using up method.

14 7. Microprogrammed ontrol Unit: Please refer to the "detour" sign controller you designed using one-hot-method in your lab. Redesign it using up method. omplete the sequence of control steps below and complete the design. Note that "No BRANH: can be replaced by an "UNONDITIONAL BRANH TO THE NEXT STEP". Step 0 All lights off. If L/R is 1, go to step 4. Step 1 G1 lights on. go to step 2. Step 2 Step 3 Step 4 G2 lights on. Go to step 5. Step 5 Step 6 G2, G1, GL lights on. Go to step 0. Number of total steps: Nearest power of 2 (which is equal or just greater than the number of steps): Number of locations in the control memory: Number of address bits: Number of outputs needed to control the four groups of lights: Branch address field width: Number of conditions: (count L/R = 1 as one condition and unconditional branch as another condition) ondition select field width: Total width of the microinstruction: Size of the control memory: LEFT Vcc? ONDITION SELET MUX. I0 y LOK LOAD /RESET up RIGHT L/R signal I1 s M Address Step { GL G1 G2 GR 3/21/06 EE201L Homework #6 9 / 16 opyright 2006 Gandhi Puvvada

16 8. State machine design: You may have seen touch-sensitive table lamps in illumination supplies stores such as Lamps + Plus. These lamps usually have three states, OFF, DIM, and BRIGHT. They have two filaments in the lamp. Filament F1 only lights up in DIM mode. Both filaments, F1 and F2, light up in BRIGHT mode. The lamps go through the three states as per the state diagram #1 below. The input T stands for TOUH sensor signal. #1 ~Reset T T T OFF DIM BRIGHT T T There are also another kind of lamps which are clap-sensitive. These require two consecutive claps (with about one second gap) to change brightness. A single clap (without the second clap) is considered as some spurious sound and should not cause the light to change its brightness. The state diagram #2 applies to such a design. The input stands for clap sensor signal. Assume that the state machine is driven by a slow 1 cycle/sec clock. omplete the missing state transition conditions. T #2 ~Reset OFF- DIM- BRIGHT- OFF DIM BRIGHT 8.1 Design a state machine for the clap-sensitive lamp using one-hot method based on the state diagram #2. Produce two outputs called F1 and F2 to control the two filaments. Sys_lk D SET LR OFF_ Sys_lk D SET LR DIM_ Sys_lk D SET LR BRIGHT_ F1 F2 Sys_lk D SET LR OFF Sys_lk D SET LR DIM Sys_lk D SET LR BRIGHT 3/21/06 EE201L Homework #6 10 / 16 opyright 2006 Gandhi Puvvada

17 8.2 omplete the state diagram below for a new touch-and-clap sensitive lamp. If a touch and a clap occur at the same time, then the lamp should take action based on touch (ignoring the clap) as touch is a more positive (confirming) action. #3 ~Reset OFF- T + DIM- BRIGHT - OFF T DIM BRIGHT T. 8.3 The previous state diagram #2 is redrawn below, with two additional dummy states D_OFF1 and D_OFF2 to facilitate implementation of a microprogrammed control unit. Note that, the state machine moves from D_OFF1 to D_OFF2 if there is no clap. Similarly it moves from D_OFF2 to OFF if there is no clap. 0 #4 ~Reset OFF- DIM- BRIGHT- OFF DIM BRIGHT 7 1 D_OFF D_OFF The number of locations in the micro-program memory = The number of address lines going into the memory = The width of the branch address field = bits Two filaments F1 and F2 are to be controlled by the machine. The width of the output control signal field = bits. The condition select mux has to select between conditions and as branch conditions. 3/21/06 EE201L Homework #6 11 / 16 opyright 2006 Gandhi Puvvada

18 The condition select mux is a (2-to-1 / 3-to-1 / 4-to-1) mux and has (1 / 2 / 3) select lines. The width of the condition select filed is (1 / 2 / 3) bit(s). Total width of the microprogram memory is bits. The size of the microprogram memory is 8.5 omplete the design of the microprogram control unit below. onnect the missing lines and fillup the bits (contents) of the microprogram memeory. ondition select mux I0 I1 s y LOAD LOK M B2 B1 B0 D D D A2 A1 A0 /RESET up OND.- SEL. FIELD Branch ADDR. FIELD ONTROL FIELD Address S0 B2 B1 B0 F1 F2 OFF OFF_ DIM DIM_ BRIGHT BRIGHT_ D_OFF1 D_OFF2 S0 B2 B1 B0 F1 F2 8.6 Show how you can replace the above condition select mux (reproduced on the side) by using an XOR or an XNOR gate (two or three input). Label the inputs of the gate. ondition select mux I0 y LOAD LOAD 9. In your previous homework, you have designed a state machine for a temperature control using one hot method. Now we will implement the design using micro-programmed control unit. I1 s S0 The heater consists of two heating coils H1 and H2. It has three temperature sensors (switches) which produce three digital outputs N, L, and VL. 3/21/06 EE201L Homework #6 12 / 16 opyright 2006 Gandhi Puvvada

19 N = 1 ==> Temperature is NORMAL (or above normal)>75 0 F L = 1 ==> Temperature is LOW (below normal) <70 0 F VL = 1==> Temperature is VERY LOW <65 0 F Obviously when VL is true (VL = 1), then L is also true (L = 1). Similarly when N is true (N = 1), both L and VL are false (L = VL = 0). It is possible that all three outputs read zero for example if the temperature is 72 0 F. If the temperature falls below the LOW mark (L = 1), the heating coil-1 (H1) is switched on (H1 = 1). If heating coil # 1 could not hold or raise the temperature and the temperature further falls to VERY LOW mark (VL = 1), the heating coil2 (H2) is also switched on (H2 = 1). Once any heating coil is switched on, it is only shut off when the temperature builds up to the NORMAL level. The state diagram is drawn below. State I is the INITIAL state in which both coils are off (H1, H2 = 0, 0). State SH is the SINGLE-HEATER state in which only H1 is on (H1, H2 = 1, 0). State TH is the TWO-HEATER state in which both heaters are on (H1, H2 = 1, 1). L N ~Reset I H1, H2 = 0,0 N TH H1, H2 = 1,1 L VL N SH H1, H2= 1,0 N VL 9.1 To make it convenient to this implementation, an extra state or step called SH_TEMP (Single Heater Temp) is introduced as shown in the following incomplete state diagram. We come into SP_TEMP from SP and continue to run the single heater (H1) while deciding whether we should be going to state I (Initial) or state TH (TWO HEATERS). 3/21/06 EE201L Homework #6 13 / 16 opyright 2006 Gandhi Puvvada

20 omplete the state diagram by writing the missing state transitions for the four state transition arrows marked with the question mark (?). ~Reset 0 I H1, H2 = 0,0? N? 3 TH H1, H2 = 1,1 L? 1 SH H1, H2= 1,0? SH_TEMP H1, H2= 1,0 VL N N Find the following data related to this design. Refer to the incomplete design on the next page. Number of states (or steps) in the above state machine (or algorithm): Number of locations in the microprogram ROM: Number of address input pins needed on the ROM to allow us to address any location (execute any step) in the ROM: Size of the micro-program counter (up): bits Size of the branch address: bits Hence branch address field is bits wide. Based on the number of control signals to be generated (H1 and H2), we need a control filed of bits wide. Are there any unconditional branches in the above state diagrams?yes / NO So do we need a logic-1 standing in front of the condition select mux to effect any such unconditional branches?yes / NO 3/21/06 EE201L Homework #6 14 / 16 opyright 2006 Gandhi Puvvada

21 omplete the following list of the conditional branches together with the associated conditions onditional branch Set of different conditions governing the above conditional branches: Based on the above, what size condition-select mux do we need? How many condition select bits? Size of condition-select field in the control word Width of the ROM = width of the condition-select field + width of the branch-address field + width of the control field = 9.3 omplete the design. Fill-in the bits in the uprog ROM. ondition associated (1) I --> I (Step 0 to Step 0) L (2) (3) (4) L ondition select mux I0 N N VL I1 I2 mux Y LOAD LOK D D up /RESET N I3 S1 S0 M A1 A0 A1 A ond. -Sel. Field Branch Addr. Field ontrol Field S1 S0 B1 B0 H1 H2 I SH SH_TEMP TH 3/21/06 EE201L Homework #6 15 / 16 opyright 2006 Gandhi Puvvada

22 9.4 omplete the waveform below. Here we are asking you to draw (a) the waveforms for I, SH, SH_TEMP, TH, (four one-hot flip-flops for the four states) if the state machine was implemented using one-hot state assignment method, (b) the symbolic state waveform for (state, up), if the state machine was implemented using the microprogrammed control unit method (c) the waveforms for H1 and H2 heating coils operation. LOK RESET N L VL State I I SH SH_TEMP TH H1 H2 State, up I, The waveforms you drew above for the heating coils, H1 and H2, are good for (a) one-hot implementation of the state machine only (b) micro-programmed U implementation of the state machine only (c) both one-hot and micro-programmed U implementations. 3/21/06 EE201L Homework #6 16 / 16 opyright 2006 Gandhi Puvvada

EE201L Homework # One-Hot state assignment method of designing a state machine LRH = 000 BOTH LIGHTS OFF IDLE Q I Q R = 1 = 1000 Q L Q H

EE201L Homework # One-Hot state assignment method of designing a state machine LRH = 000 BOTH LIGHTS OFF IDLE Q I Q R = 1 = 1000 Q L Q H EE201L Homework # 5 Instructor: G. Puvvada 1. One-Hot state assignment method of designing a state machine Consider the turn signals and hazard warning signal controls on most cars. The turn signal control