Chapter 5 Synchronous Sequential Logic

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1 Chapter 5 Synchronous Sequential Logic Sequential circuit: A circuit that includes memory elements. In this case the output depends not only on the current input but also on the past inputs. Memory A synchronous sequential circuit uses signals that affect the storage elements only at discrete instances of time. - timing device: clock pulse Memory Sequential Logic 1

2 Flip-Flops Flip-Flop: a circuit that can maintain a binary state indefinitely. RS Flip-Flop FF Q Q A flip-flop has two useful states: when Q = 1: set state; when Q = 0: reset or clear state. Sequential Logic 2

3 Clocked RS When C goes to 1, information from S and R goes through to the FF. Q S R Q(t+1) indeterminate indeterminate Characteristic table When both inputs are set to 1, the outputs momentarily go to 0. The state is indeterminate. Sequential Logic 3

4 D Flip-Flop D Q(t+1) Q D Q(t+1) Characteristic table JK Flip-Flop J K Q(t+1) 0 0 Q Q Sequential Logic 4

5 T Flip-Flop T Q(t+1) 0 Q 1 Q Sequential Logic 5

6 Characteristic & Excitation Tables S R Q(t+1) 0 0 Q(t) ? J K Q(t+1) 0 0 Q Q D Q(t+1) T Q(t+1) 0 Q 1 Q Q Q(t+1) J K X X 1 0 X X 0 Q Q(t+1) D Q Q(t+1) T Sequential Logic 6

7 Analysis of Sequential Circuits State Equations: Behavior of clocked circuits is described by state equations State equations: specify next state as a function of the inputs and the present state A(t+1) = B(t+1) = y = Sequential Logic 7

8 Analysis of Sequential Circuits State Table: The time sequence of inputs, outputs and ffs can be shown in a state table A(t+1) = A(t) x(t) + B(t) x(t) B(t+!) = A (t) x(t) y = x [A(t) + B(t)] Present State Input Next State Output A B x A B y Sequential Logic 8

9 Analysis of Sequential Circuits State Table: Present State Input Next State Output A B x A B y Another form of state table is the following: Present State Next State Output x=0 x=1 x=0 x =1 A B A B AB y y Sequential Logic 9

10 State Diagram State diagram represents graphically the information in a state table State: shown by a circle Transitions between states: lines connecting circles Binary # inside circle indicates state of the ff Input / output: #/# close to transition lines Present State Next State Output x=0 x=1 x=0 x =1 A B A B AB y y Sequential Logic 10

11 Analysis with JK and T flip-flops Recall the JK flip-flop design based on a D flip-flop: The state equation at the input of the D flip-flop is: DA = For a T flip-flop: The state equation at the input of the D flip-flop is: DA = Sequential Logic 11

12 Analysis with JK flip-flops Example: Analyze the following sequential circuit: JA = B KA = Bx JB = x KB = A x + Ax 1) First find inputs to ff 2) Then next state Present State Input Next State F-F inputs A B x A B JA KA JB KB Sequential Logic 12

13 Analysis with JK flip-flops Example: Analyze the following sequential circuit: JA = KA = JB = KB = Truth table with state states: (we do not need to know the ff input values since we can calculate the next state directly from the state equations) Then: A(t+1) = JA + K A = BA + (Bx ) A = B(t+1) = x B + (A x +Ax ) B = Sequential Logic 13

14 Design Procedure STEPS: 1 st - derive the state diagram 2 nd - assign binary values to the states 3 rd - derive state table 4 th - choose type of flip-flops 5 th derive equations for the ff inputs and the output 6 th draw the logic diagram Q: How many flip-flops are needed? A: the number is determined by the # of states. EXAMPLE: Design a circuit that detects 3 or more consecutive 1 s in a binary string. Sequential Logic 14

15 Design Procedure Present State Input Next State Output A B x A B y Design the circuit using D flip-flops. Inputs for the flip-flops are the same as the next state Use K-maps to simplify the two inputs to flip-flops DA and DB and output y. Sequential Logic 15

16 Design Procedure Sequential Logic 16

17 Design using JK flip-flops Excitation table for JK Q Q(t+1) J K X X 1 0 X X 0 The state table should also include the inputs to JK flip-flops which generate the desired transition sequence. Example: Assume the following state table Present State Input Next State FF inputs A B x A B JA KA JA KA Sequential Logic 17

18 Simplify the inputs using K-maps Present State Input Next State FF inputs A B x A B JA KA JA KA X 0 X X 1 X X X X X X 0 0 X X 0 1 X X 0 X X 1 X 1 Sequential Logic 18

19 Design the circuit using JK flip-flops Equations: JA = Bx KA = Bx JA = x KB = Ax + A x Sequential Logic 19

20 Design of Counters A sequential circuit that goes through a defined sequence of states when the input (count) pulses are applied is called a counter Count number of occurrences of an event. Useful in generating timing sequences to control other operations in a digital system. Example: Design a counter that counts from 0 to 7 and returns to 0 after 7. State diagram No inputs or outputs Transitions occur during a clock edge (0 to 1) Next state depends entirely on the present state Sequential Logic 20

21 Design of Counters State table (for T flip-flops) Present State Next State FF inputs A2 A1 A0 A2 A1 A0 TA2 TA1 TA Simplify the inputs using K-maps Sequential Logic 21

22 Design of Counters Logic diagram hkjh Sequential Logic 22

23 State Reduction Objective: to reduce the number of flip-flops Effect: this process may increase the number of gates required to implement the circuit EXAMPLE Note that only input-output sequences are important (internal states are used just to provide the required sequences) For this reason, states are marked with letters There are an infinite number of input sequences. Each results in a unique output Sequential Logic 23

24 State Reduction Consider the following input: Input Starting with the state a, let s determine the state transitions and output state a a b c d e f f g f g a Input Output To reduce the states we need to complete the state table Present State Next State Output x=0 x=1 x=0 x =1 a a b 0 0 b c d 0 0 c a d 0 0 d c f 0 1 e a f 0 1 f g f 0 1 g a f 0 1 Sequential Logic 24

25 State Reduction Equivalent states: for all input combinations they give the same output and send the circuit to the same state Present State Next State Output x=0 x=1 x=0 x =1 a a b 0 0 b c d 0 0 c a d 0 0 d c f 0 1 e a f 0 1 f g f 0 1 g a f 0 1 States g and e are equivalent So g is replaced by e Present State Next State Output x=0 x=1 x=0 x =1 a a b 0 0 b c d 0 0 c a d 0 0 d c f 0 1 e a f 0 1 f e f 0 1 Sequential Logic 25

26 State Reduction We observe that d is equivalent to f; f is removed Present State Next State Output x=0 x=1 x=0 x =1 a a b 0 0 b c d 0 0 c a d 0 0 d c d 0 1 e a d 0 1 State diagram for new state table: Let s apply the same input sequence: state a Input Output 0 Sequential Logic 26

Analysis and Design of Sequential Circuits: Examples

COSC3410 Analysis and Design of Sequential Circuits: Examples J. C. Huang Department of Computer Science University of Houston Sequential machine slide 1 inputs combinational circuit outputs memory elements