Dual N-Channel 40-V MOSFET

Transcription

1 S494DY Vshay Slconx Dual N-Channel 4-V MOSFET PRODUCT SUMMRY V DS (V) R DS(on) (Ω) I D () Q g (Typ.).6 at V GS = V at V GS = 4.5 V 8 56 FETURES Halogen-fee ccodng to IEC valable TenchFET Powe MOSFET % R g Tested UIS Tested SO-8 S 8 D G 2 7 D PPLICTIONS CCFL Invete D D 2 S D 2 G D 2 G G 2 Top Vew Odeng Infomaton: S494DY-T-E3 (Lead (Pb)-fee) S494DY-T-GE3 (Lead (Pb)-fee and Halogen-fee) S N-Channel MOSFET S 2 N-Channel MOSFET BSOLUTE MXIMUM RTINGS T = 25 C, unless othewse noted Paamete Symbol Lmt Unt Dan-Souce Voltage V DS 4 V Gate-Souce Voltage V GS ± 6 T C = 25 C 8 T Contnuous Dan Cuent (T J = 5 C) C = 7 C 8 I D T = 25 C 8 b, c T = 7 C 6.5 b, c Pulsed Dan Cuent ( µs Pulse Wdth) I DM 2 T Souce-Dan Cuent Dode Cuent C = 25 C 2.7 I S T = 25 C.6 b, c Pulsed Souce-Dan Cuent I SM 2 Sngle Pulse valanche Cuent I L =. mh S 2 Sngle Pulse valanche Enegy E S 2 T C = 25 C 3.25 T Maxmum Powe Dsspaton C = 7 C 2. P D W T = 25 C 2. b, c T = 7 C.25 b, c Opeatng Juncton and Stoage Tempeatue Range T J, T stg - 55 to 5 C THERML RESISTNCE RTINGS Paamete Symbol Typ. Max. Unt Maxmum Juncton-to-mbent b, d t s R thj C/W Maxmum Juncton-to-Foot (Dan) Steady-State R thjf Notes: a. Based on T C = 25 C. b. Suface Mounted on " x " FR4 boad. c. t = s. d. Maxmum unde steady state condtons s 2 C/W. Document Numbe: S9-54-Rev. C, 6-p-9

2 S494DY Vshay Slconx SPECIFICTIONS T J = 25 C, unless othewse noted Paamete Symbol Test Condtons Mn. Typ. Max. Unt Statc Dan-Souce Beakdown Voltage V DS V GS = V, I D = 25 µ 4 V V DS Tempeatue Coeffcent ΔV DS /T J I D = 25 µ 4 V GS(th) Tempeatue Coeffcent ΔV GS(th) /T J I D = 25 µ mv/ C Gate Theshold Voltage V GS(th) V DS = V GS, I D = 25 µ.8 2. V Gate-Body Leakage I GSS V DS = V, V GS = ± 6 V n V DS = 4 V, V GS = V Zeo Gate Voltage Dan Cuent I DSS V DS = 4 V, V GS = V, T J = 55 C µ On-State Dan Cuent b I D(on) V DS = 5 V, V GS = V 2 V GS = V, I D = 5 Dan-Souce On-State Resstance b.3.6 R DS(on) V GS = 4.5 V, I D = Ω Fowad Tansconductance b g fs V DS = 5 V, I D = 5 23 S Dynamc a Input Capactance C ss 239 Output Capactance C oss N-Channel V DS = 2 V, V GS = V, I D = MHz 27 pf Revese Tansfe Capactance C ss 65 Total Gate Chage Q g V DS = 2 V, V GS = V, I D = Gate-Souce Chage Q gs V DS = 2 V, V GS = 4.5 V, I D = 5 Gate-Dan Chage Q gd 9.7 N-Channel 5.5 nc Gate Resstance R g f = MHz Tun-On Delay Tme t d(on) 5 23 N-Channel Rse Tme t 2 3 V DD = 2 V, R L = 4 Ω Tun-Off Delay Tme t d(off) I D 5, V GEN = 4.5 V, R g = Ω Tme t Fall Tme t f 5 Tun-On Delay d(on) ns 7 8 V DD = 2 V, R L =4 Ω Tun-Off Delay Tme t d(off) I D 5, V GEN = 4.5 V, R g = Ω Rse Tme t N-Channel Fall Tme t f 9 3 Dan-Souce Body Dode Chaactestcs Contnuous Souce-Dan Dode Cuent I S T C = 25 C 2.7 Pulse Dode Fowad Cuent a I SM 2 Body Dode Voltage V SD I S = V Body Dode Revese Recovey Tme t ns Body Dode Revese Recovey Chage Q N-Channel nc Revese Recovey Fall Tme t a I F = 2, di/dt = /µs, T J = 25 C 26 Revese Recovey Rse Tme t b 36 ns Stesses beyond those lsted unde bsolute Maxmum Ratngs may cause pemanent damage to the devce. These ae stess atngs only, and functonal opeaton of the devce at these o any othe condtons beyond those ndcated n the opeatonal sectons of the specfcatons s not mpled. Exposue to absolute maxmum atng condtons fo extended peods may affect devce elablty. 2 Document Numbe: S9-54-Rev. C, 6-p-9

3 S494DY Vshay Slconx TYPICL CHRCTERISTICS 25 C, unless othewse noted 2 ) 6 V GS = thu 3 V t ( e n n C u a ( t D 8 T C = 25 C I D ) t ( e n n C u a ( l D t I D.4 25 C 4 2 V V DS Dan-to-Souce Voltage (V) Output Chaactestcs.2-55 C V GS Gate-to-Souce Voltage (V) Tansfe Chaactestcs.2 35 R D S o ) O n - R e s s a n c e ( m ) n V GS = 4.5 V V GS = V Capactance (pf) C C ss C oss I D Dan Cuent () On-Resstance vs. Dan Cuent and Gate Voltage C ss V DS Dan-to-Souce Voltage (V) Capactance.8 Gate-to-Souce Voltage (V) V G S I D = 5 V DS = V V DS = 2 V V DS = 3 V R D S o n ) O n - R e s s a n c e N o m a z e d ) ( I D = 5 V GS = V V GS = 4.5 V Q g Total Gate Chage (nc) Gate Chage T J Juncton Tempeatue ( C) On-Resstance vs. Juncton Tempeatue Document Numbe: S9-54-Rev. C, 6-p-9 3

4 ( t S494DY Vshay Slconx TYPICL CHRCTERISTICS 25 C, unless othewse noted. I S S o u c e C u e n t ( ) 2 T J = 5 C T J = 25 C V SD Souce-to-Dan Voltage (V) Souce-Dan Dode Fowad Voltage R D S(on ) Dan-to-Souce On-Resstance ( ) I D = T = 25 C.2 T = 25 C V GS Gate-to-Souce Voltage (V) On-Resstance vs. Gate-to-Souce Voltage.4 I D = 25 µ V G S ) V a c e ( V ) n a h I D = 5 m P o w e ( W ) T J Tempeatue ( C) Theshold Voltage... Tme (s) Sngle Pulse Powe, Juncton-to-mbent Lmted by R DS(on) * ) t ( n e u n C a ms ms D ms I D. T = 25 C Sngle Pulse s s DC.. V DS Dan-to-Souce Voltage (V) * V GS mnmum V GS at whch R DS(on) s specfed Safe Opeatng ea, Juncton-to-mbent 4 Document Numbe: S9-54-Rev. C, 6-p-9

5 S494DY Vshay Slconx TYPICL CHRCTERISTICS 25 C, unless othewse noted 2 I D Dan Cuent ( ) Package Lmted T C Case Tempeatue ( C) Cuent Deatng* Dsspaton (W) Powe.8 ) P o w e o n ( W p a s s D t T C Case Tempeatue ( C) Powe Deatng, Juncton-to-Foot T mbent Tempeatue ( C) Powe Deatng, Juncton-to-mbent * The powe dsspaton P D s based on T J(max) = 5 C, usng juncton-to-case themal esstance, and s moe useful n settlng the uppe dsspaton lmt fo cases whee addtonal heatsnkng s used. It s used to detemne the cuent atng, when ths atng falls below the package lmt. Document Numbe: S9-54-Rev. C, 6-p-9 5

6 l f f t l f f t S494DY Vshay Slconx TYPICL CHRCTERISTICS 25 C, unless othewse noted Duty Cycle =.5 N o m a z e d E e c v e T a n s e n t T h e m a l I m p e d a n c e.5.2 Notes:.. P DM.5 t t 2 t.2. Duty Cycle, D = t 2 2. Pe Unt Base = R thj = 2 C/W Sngle Pulse 3. T JM T = P DM Z (t) thj 4. Suface Mounted Squae Wave Pulse Duaton (s) Nomalzed Themal Tansent Impedance, Juncton-to-mbent N o m a z e d E e c v e T a n s e n t T h e m a l I m p e d a n c e 2. Duty Cycle = Sngle Pulse -3-2 Squae Wave Pulse Duaton (s) Nomalzed Themal Tansent Impedance, Juncton-to-Case - Vshay Slconx mantans woldwde manufactung capablty. Poducts may be manufactued at one of seveal qualfed locatons. Relablty data fo Slcon Technology and Package Relablty epesent a composte of all qualfed locatons. Fo elated documents such as package/tape dawngs, pat makng, and elablty data, see Document Numbe: S9-54-Rev. C, 6-p-9

7 Package Infomaton Vshay Slconx SOIC (NRROW): 8-LED JEDEC Pat Numbe: MS E H S D.25 mm (Gage Plane) h x 45 C ll Leads e B L q. mm.4" MILLIMETERS INCHES DIM Mn Max Mn Max B C D E e.27 BSC.5 BSC H h L q 8 8 S ECN: C-6527-Rev. I, -Sep-6 DWG: 5498 Document Numbe: 792 -Sep-6

8 VISHY SILICONIX TenchFET Powe MOSFETs pplcaton Note 88 Mountng LITTLE FOOT, SO-8 Powe MOSFETs Whaton McDanel Suface-mounted LITTLE FOOT powe MOSFETs use ntegated ccut and small-sgnal packages whch have been been modfed to povde the heat tansfe capabltes equed by powe devces. Leadfame mateals and desgn, moldng compounds, and de attach mateals have been changed, whle the footpnt of the packages emans the same. See pplcaton Note 826, Recommended Mnmum Pad Pattens Wth Outlne Dawng ccess fo Vshay Slconx MOSFETs, ( fo the bass of the pad desgn fo a LITTLE FOOT SO-8 powe MOSFET. In convetng ths ecommended mnmum pad to the pad set fo a powe MOSFET, desgnes must make two connectons: an electcal connecton and a themal connecton, to daw heat away fom the package. In the case of the SO-8 package, the themal connectons ae vey smple. Pns 5, 6, 7, and 8 ae the dan of the MOSFET fo a sngle MOSFET package and ae connected togethe. In a dual package, pns 5 and 6 ae one dan, and pns 7 and 8 ae the othe dan. Fo a small-sgnal devce o ntegated ccut, typcal connectons would be made wth taces that ae.2 nches wde. Snce the dan pns seve the addtonal functon of povdng the themal connecton to the package, ths level of connecton s nadequate. The total coss secton of the coppe may be adequate to cay the cuent equed fo the applcaton, but t pesents a lage themal mpedance. lso, heat speads n a ccula fashon fom the heat souce. In ths case the dan pns ae the heat souces when lookng at heat spead on the PC boad Fgue. Sngle MOSFET SO-8 Pad Patten Wth Coppe Speadng Fgue 2. Dual MOSFET SO-8 Pad Patten Wth Coppe Speadng The mnmum ecommended pad pattens fo the sngle-mosfet SO-8 wth coppe speadng (Fgue ) and dual-mosfet SO-8 wth coppe speadng (Fgue 2) show the statng pont fo utlzng the boad aea avalable fo the heat-speadng coppe. To ceate ths patten, a plane of coppe oveles the dan pns. The coppe plane connects the dan pns electcally, but moe mpotantly povdes plana coppe to daw heat fom the dan leads and stat the pocess of speadng the heat so t can be dsspated nto the ambent a. These pattens use all the avalable aea undeneath the body fo ths pupose. Snce suface-mounted packages ae small, and eflow soldeng s the most common way n whch these ae affxed to the PC boad, themal connectons fom the plana coppe to the pads have not been used. Even f addtonal plana coppe aea s used, thee should be no poblems n the soldeng pocess. The actual solde connectons ae defned by the solde mask openngs. By combnng the basc footpnt wth the coppe plane on the dan pns, the solde mask geneaton occus automatcally. fnal tem to keep n mnd s the wdth of the powe taces. The absolute mnmum powe tace wdth must be detemned by the amount of cuent t has to cay. Fo themal easons, ths mnmum wdth should be at least.2 nches. The use of wde taces connected to the dan plane povdes a low mpedance path fo heat to move away fom the devce. PPLICTION NOTE Document Numbe: Revson: 8-Jun-7

9 pplcaton Note 826 Vshay Slconx RECOMMENDED MINIMUM PDS FOR SO-8.72 (4.369).28 (.7) PPLICTION NOTE.47 (.94).246 (6.248).52 (3.86).22 (.559).5 (.27) Recommended Mnmum Pads Dmensons n Inches/(mm) Retun to Index Retun to Index Document Numbe: Revson: 2-Jan-8

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