E Series Power MOSFET

Transcription

1 E Series Power MOSFET SiHB33N6E PRODUCT SUMMRY (V) at T J max. 6 R DS(on) max. () at 2 C V GS = V.99 Q g max. (nc) Q gs (nc) 24 Q gd (nc) 42 Configuration Single D D 2 PK (TO263) G G D S S NChannel MOSFET ORDERING INFORMTION Package Lead (Pb)free Lead (Pb)free and Halogenfree FETURES Low figureofmerit (FOM): R on x Q g Low input capacitance (C iss ) Reduced switching and conduction losses Ultra low gate charge (Q g ) valanche energy rated (UIS) Material categorization: for definitions of compliance please see PPLICTIONS Server and telecom power supplies Switch mode power supplies (SMPS) Power factor correction power supplies (PFC) Lighting Highintensity discharge (HID) Fluorescent ballast lighting Industrial Welding Induction heating Motor drives Battery chargers Renewable energy Solar (PV inverters) D 2 PK (TO263) SiHB33N6EE3 SiHB33N6EGE3 SiHB33N6ETGE3 SiHB33N6ETGE3 vailable BSOLUTE MXIMUM RTINGS (T C = 2 C, unless otherwise noted) PRMETER SYMBOL LIMIT UNIT DrainSource Voltage 6 GateSource Voltage V GS ± 3 V Continuous Drain Current (T J = C) V GS at V T C = 2 C 33 I D T C = C 2 Pulsed Drain Current a I DM 88 Linear Derating Factor 2.2 W/ C Single Pulse valanche Energy b E S 793 mj Maximum Power Dissipation P D 278 W Operating Junction and Storage Temperature Range T J, T stg to C DrainSource Voltage Slope = V to 8 % 7 dv/dt Reverse Diode dv/dt d 2 V/ns Soldering Recommendations (Peak temperature) c for s 3 C Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. V DD = V, starting T J = 2 C, L = 28.2 mh, R g = 2, I S = 7.. c..6 mm from case. d. I SD I D, di/dt = /μs, starting T J = 2 C. S6799Rev. H, 2May6 Document Number: 924

2 SiHB33N6E THERML RESISTNCE RTINGS PRMETER SYMBOL TYP. MX. UNIT Maximum Junctiontombient R thj 62 Maximum JunctiontoCase (Drain) R thjc.4 C/W SPECIFICTIONS (T J = 2 C, unless otherwise noted) PRMETER SYMBOL TEST CONDITIONS MIN. TYP. MX. UNIT Static DrainSource Breakdown Voltage V GS = V, I D = 2 μ 6 V Temperature Coefficient /T J Reference to 2 C, I D = m.7 V/ C GateSource Threshold Voltage (N) V GS(th) = V GS, I D = 2 μ V GateSource Leakage I GSS V GS = ± V ± n V GS = ± 3 V ± μ = 6 V, V GS = V Zero Gate Voltage Drain Current I DSS = 48 V, V GS = V, T J = 2 C μ DrainSource OnState Resistance R DS(on) V GS = V I D = Forward Transconductance a g fs = 3 V, I D = 6. S Dynamic Input Capacitance C iss V GS = V, 38 Output Capacitance C oss = V, 6 Reverse Transfer Capacitance C rss f = MHz 6 Effective Output Capacitance, Energy pf Related b C o(er) 36 V GS = V, = V to 48 V Effective Output Capacitance, Time Related c C o(tr) 468 Total Gate Charge Q g GateSource Charge Q gs V GS = V I D = 6., = 48 V 24 nc GateDrain Charge Q gd 42 TurnOn Delay Time t d(on) 28 6 Rise Time t r V DD = 48 V, I D = TurnOff Delay Time t d(off) R g = 9., V GS = V 99 ns Fall Time t f 4 8 Gate Input Resistance R g f = MHz, open drain.2.7. DrainSource Body Diode Characteristics MOSFET symbol D Continuous SourceDrain Diode Current I S 33 showing the G integral reverse Pulsed Diode Forward Current I SM S 88 p n junction diode Diode Forward Voltage V SD T J = 2 C, I S = 6., V GS = V.9.2 V Reverse Recovery Time t rr 3 6 ns Reverse Recovery Charge Q rr T J = 2 C, I F = I S, di/dt = /μs, V R = V 8. 7 μc Reverse Recovery Current I RRM 26 Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. C oss(er) is a fixed capacitance that gives the same energy as C oss while is rising from % to 8 % S. c. C oss(tr) is a fixed capacitance that gives the charging time as C oss while is rising from % to 8 % S. S6799Rev. H, 2May6 2 Document Number: 924

3 SiHB33N6E TYPICL CHRCTERISTICS (2 C, unless otherwise noted) I D Drain Current () TOP V 4 V 3 V 2 V V V 9. V 8. V 7. V BOTTOM 6. V T J = 2 C R DS(on) OnResistance (Normalized) I D = 6.. V 2 3 DraintoSource Voltage (V) Fig. Typical Output Characteristics. V GS = V T J Junction Temperature ( C) Fig. 4 Normalized OnResistance vs. Temperature I D Drain Current () TOP V 4 V 3 V 2 V V V 9. V 8. V 7. V BOTTOM 6. V T J = C. V 2 3 DraintoSource Voltage (V) Fig. 2 Typical Output Characteristics C Capacitance (pf) C iss C rss V GS = V, f = MHz C iss = C gs C gd x C ds shorted C rss = C gd C oss = C ds C gd DraintoSource Voltage (V) C oss Fig. Typical Capacitance vs. DraintoSource Voltage 2 I D, DraintoSource Current () T J = C T J = 2 C 2 V GS, GatetoSource Voltage (V) Fig. 3 Typical Transfer Characteristics C oss (pf) C oss E oss Fig. 6 C OSS and E OSS vs. E oss (μj) S6799Rev. H, 2May6 3 Document Number: 924

4 SiHB33N6E 24 3 V GS GatetoSource Voltage (V) = V = 3 V = 48 V I D, Drain Current () Q g Total Gate Charge (nc) Fig. 7 Typical Gate Charge vs. GatetoSource Voltage T C Temperature( C) Fig. Maximum Drain Current vs. Case Temperature 7 I S Source Current () T J = C T J = 2 C. V GS = V V SD SourcetoDrain Voltage (V) Fig. 8 Typical SourceDrain Diode Forward Voltage, Drain to Source Breakdown Voltage (V) T J,Temperature ( C) Fig. Typical DraintoSource Voltage vs. Temperature Operation in this area limited by R DS(on) * I DM Limited I D, Drain Current () Limited by R D (on) * T C = 2 C ms T J = C Single Pulse. BVDSS Limited DraintoSource Voltage (V) * V GS > minimum V GS at which R DS(on) is specified Fig. 9 Maximum Safe Operating rea µs ms S6799Rev. H, 2May6 4 Document Number: 924

5 SiHB33N6E Normalized Effective Transient Thermal Impedance. Duty Cycle = Single Pulse..... Square Wave Pulse Duration (s) Fig. 2 Normalized Thermal Transient Impedance, JunctiontoCase R D t p V GS D.U.T. V DD R G V DD V Pulse width µs Duty factor. % I S Fig. 3 Switching Time Test Circuit Fig. 6 Unclamped Inductive Waveforms 9 % V Q G Q GS Q GD % V GS t d(on) t r t d(off) t f V G Fig. 4 Switching Time Waveforms Charge Fig. 7 Basic Gate Charge Waveform L Current regulator Same type as D.U.T. Vary t p to obtain required I S R G I S D.U.T V DD 2 V.2 µf kω.3 µf D.U.T. V DS V t p. Ω V GS 3 m Fig. Unclamped Inductive Test Circuit Fig. 8 Gate Charge Test Circuit I G I D Current sampling resistors S6799Rev. H, 2May6 Document Number: 924

6 SiHB33N6E Peak Diode Recovery dv/dt Test Circuit D.U.T. Circuit layout considerations Low stray inductance Ground plane Low leakage inductance current transformer R g dv/dt controlled by R g Driver same type as D.U.T. I SD controlled by duty factor D D.U.T. device under test V DD Driver gate drive P.W. Period D = P.W. Period V GS = V a D.U.T. l SD waveform Reverse recovery current Body diode forward current di/dt D.U.T. waveform Diode recovery dv/dt V DD Reapplied voltage Inductor current Body diode forward drop Ripple % I SD Note a. V GS = V for logic level devices Fig. 9 For NChannel maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see S6799Rev. H, 2May6 6 Document Number: 924

7 Package Information TO263B (HIGH VOLTGE) (Datum ) 3 4 E 4 L 4 D H 2 C 3 C L2 B B Detail c2 B Gauge plane to 8 L3 L L4 Detail Rotated 9 CW scale 8: H B Seating plane 2 x b2 2 x e 2 x b. M M B Plating b, b3 c ±.4 M B Base metal E D 4 (c) c Lead tip (b, b2) Section B B and C C Scale: none E View 4 MILLIMETERS INCHES MILLIMETERS INCHES DIM. MIN. MX. MIN. MX. DIM. MIN. MX. MIN. MX D E b E b e 2.4 BSC. BSC b H b L c L.6.66 c L c L3.2 BSC. BSC D L ECN: S82Rev., Sep8 DWG: 97 Notes. Dimensioning and tolerancing per SME Y4.M Dimensions are shown in millimeters (inches). 3. Dimension D and E do not include mold flash. Mold flash shall not exceed.27 mm (.") per side. These dimensions are measured at the outmost extremes of the plastic body at datum. 4. Thermal PD contour optional within dimension E, L, D and E.. Dimension b and c apply to base metal only. 6. Datum and B to be determined at datum plane H. 7. Outline conforms to JEDEC outline to TO263B. Document Number: Revision: Sep8

8 N826 RECOMMENDED MINIMUM PDS FOR D 2 PK: 3Lead.4 (.668).63 (6.29).3 (9.7).4 (3.683).3 (3.429). (.8). (.27) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Document Number: pr

9 Legal Disclaimer Notice Vishay Disclaimer LL PRODUCT, PRODUCT SPECIFICTIONS ND DT RE SUBJECT TO CHNGE WITHOUT NOTICE TO IMPROVE RELIBILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, Vishay ), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, noninfringement and merchantability. Statements regarding the suitability of products for certain types of applications are based on Vishay s knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over time. ll operating parameters, including typical parameters, must be validated for each customer application by the customer s technical experts. Product specifications do not expand or otherwise modify Vishay s terms and conditions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicated in writing, Vishay products are not designed for use in medical, lifesaving, or lifesustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. 7 VISHY INTERTECHNOLOGY, INC. LL RIGHTS RESERVED Revision: 8Feb7 Document Number: 9