POSWD0SWO POKBD0ROW0A GND POSDIO0D3 POLCD0NOE

Transcription

1 L_LIGHT = P = TIM_H L_SX = P = FSM_NE L_TINS = P = FSM_0 LE_RE = P = TIM_H LE_GREEN = P = TIM_H LE_LUE = P0 = TIM_H POK0ROW0 K_ROW_ PIU0 POK0ROW0PIU0 K_ROW_ PIU0 POK0ROW0E K_ROW_E PIU0 POK0ROW0F K_ROW_F PIU0 POK0ROW0G K_ROW_G PIU0 PIU0 PIU0 POOS0INPIU0 OS_IN PIU0 POOS0OUT OS_OUT PIU0 0 PIU00.V PIU0 POOSIN OSIN PIU0 POOSOUT OSOUT PIU0 PONRST PIU0 POK0OL0 K_OL_ PIU0 POK0OL0PIU0 K_OL_ PIU0 POK0OL0 K_OL_ PIU0 POK0OL0PIU0 K_OL_ PIU0.V PIU0 0 PIU00 PIU0.V PIU0 POT0HRGPIU0 T_HRG PIU0 POVT0SNS VT_SNS PIU0 POL0 L_ PIU0 Power supply POVP0 VP_ POVP0 VP_ MU PI0PI0 PI0PI0 O PI0. μf O PI0. μf POK0ROW0 POK0ROW0 POS0POW0EN.V PE PE PE PE PE VT P P P V OSIN OSOUT NRST P0 P P P V VREF+ V P0 P P K_ROW_ K_ROW_ OOT V PE PE0 P P OOT0 P P P P P P P P P P P P P0 P P P0 P P P V P P P P P P P0 P P PE PE PE PE0 PE PE PE PE PE P0 VP_ V PIU0 PIU0 PIU0 PIU0 PIU00 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 PIU00 PIU0 PIU0 PIU0 PIU0 PIU0 PIU00 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 POL0 POSPI0LK POSPI0MOSI POK0OL0 POLE0GREEN POK0ROW0H POL0RESET POL0 POL00 POL0 POVP0.V.V POL0 POK0OL0 POSPI0MISO POLE0LUE POQUSPI0LK POK0ROW0I POL0 POL0 POL0 POL0TE L_ L_ S_POW_EN SPI_LK SPI_MISO POOOT0 SPI_MOSI K_OL_ POSIO0 POSW0SWO POQUSPI0NS POSIO00 POL0SX QUSPI_NS K_OL_ SIO_ LE_LUE SIO_0 LE_GREEN SW_SWO QUSPI_LK L_SX PIU000 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 PIU00 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 PIU00 PIU0 PIU0 PIU0 PIU0 K_ROW_H K_ROW_I POL0NOE POL0NWE L_NWE L_RESET L_NOE L_ L_ POSIO0M POL0 POUSRT0RX POL0 POUSRT0LK POSIO0 SIO_M L_ L_ L_0 L_ L_ USRT_LK L_ USRT_RX L_TE SIO_ VP_ POSW0SWLK SW_SWLK OU STMFVGT V PIU0.V PIU0 VP_ PIU0POVP0 VP_ P PIU0 POSW0SWIO SW_SWIO P PIU0 POUS00 US_+ P PIU00 0 POUS00 US_- P0 PIU0POUS0IPOUS0I US_I P PIU0 VUS P PIU0POSIO0POSIO0 SIO_ P PIU0 POQUSPI0IO0 QUSPI_IO0 P PIU0POQUSPI0IOPOQUSPI0IO QUSPI_IO P PIU0 POLE0RE LE_RE P PIU0POL0LIGHTPOL0LIGHT L_LIGHT P PIU0 POL0 L_ P PIU0 POL00 L_0 0 P PIU00 POQUSPI0IO QUSPI_IO P PIU0POQUSPI0IOPOQUSPI0IO QUSPI_IO P PIU0 L_T_INS P0 PIU0POL0POL0 POL0T0INS L_ P PIU0 POL0 L_ P PIU0POUSRT0TXPOUSRT0TX USRT_TX P PIU0 POSIO0LK SIO_LK P PIU0POL0POW0ENPOL0POW0EN L_POW_EN P PIU0 POL0EXT L_EXT P PIU0 POL0 L_.V PI0 O PI0 O PI0 O PI0 O PI0 O PI0 O PI0 O PI0 O PI0 00 nf PI0 00 nf PI0 00 nf PI0 00 nf PI0 00 nf PI0. μf PI0 00 nf PI0 μf ecoupling Each V/ pair must be decoupled with a 00nF cap, placed close to the pins. nother single. uf cap is needed between V and. The V/ pair must be decoupled with a 00nF and uf cap. POOSIN OSIN POOSOUT OSOUT POOOT0 OOT0 = 0 oot from flash memory OOT0 = oot from FU bootloader OR PIR0 PIR0 0 Ω oot mode Reset PONRST NRST has a built-in pull up resistor of 0 kohms. Req = ohms. R time constant = 0.ms. High-speed oscillator PIX0 PIX0 VUS PIR0 PIR0 0 O0 PI00PI00 PI00 pf OX MHz PIX0 PIX0 PI0PI0 O PI0 pf OR 0 kω.v PIR0 OR 0 kω PIR0 PI0 PI0 O 00 nf Voltage regulator requires a. uf capacitance on VP. On packages with VP pins, that value is evenly split. Size: MaU Number: ate: //0 Time: 0:: M Revision: Sheet of

2 Matrix keyboard POK0OL0 POK0OL0 POK0OL0 POK0OL0 POK0OL0 POK0OL0 K_OL_ K_OL_ K_OL_ K_OL_ K_OL_ K_OL_ L panel POK0ROW0 K_ROW_ POK0ROW0 K_ROW_ POK0ROW0 K_ROW_ POK0ROW0 K_ROW_ POK0ROW0E K_ROW_E POK0ROW0F K_ROW_F OSW0 SW_ OSW0 SW_ OSW0 SW_ OSW0 SW_ OSW0 SW_ OSW0 SW_ PISW000 PISW00 PISW000 PISW00 PISW000 PISW00 PISW000 PISW00 PISW000 PISW00 PISW000 PISW00 OSW0 SW_ OSW0 SW_ PISW000 PISW00 PISW000 PISW00 OSW0 SW_ OSW0 SW_ OSW0 SW_ OSW0 SW_ OSW0 SW_ OSW0 SW_ PISW000 PISW00 PISW000 PISW00 PISW000 PISW00 PISW000 PISW00 PISW000 PISW00 PISW000 PISW00 OSW0 SW_ OSW0 SW_ OSW0 SW_ OSW0 SW_ OSW0 SW_ OSW0 SW_ PISW000 PISW00 PISW000 PISW00 PISW000 PISW00 PISW000 PISW00 PISW000 PISW00 PISW000 PISW00 OSW0E SW_E OSW0E SW_E OSW0E SW_E OSW0E SW_E OSW0E SW_E OSW0E SW_E PISW0E00 PISW0E0 PISW0E00 PISW0E0 PISW0E00 PISW0E0 PISW0E00 PISW0E0 PISW0E00 PISW0E0 PISW0E00 PISW0E0 OSW0F SW_F OSW0F SW_F OSW0F SW_F OSW0F SW_F OSW0F SW_F PISW0F00 PISW0F0 PISW0F00 PISW0F0 PISW0F00 PISW0F0 PISW0F00 PISW0F0 PISW0F00 PISW0F0 OSW0G SW_G OSW0G SW_G OSW0G SW_G OSW0G SW_G OSW0G SW_G STV draws a max intensity of m, and STM can provide up to 0 m per pin. Thatas why weare powering the L controller directly from the MU. POL0POW0EN L_POW_EN PIJ0 V POL0EXT L_EXT PIJ0 EXT POL0RESETPIJ0 L_RESET PIJ0 RESX POL0SX L_SX PIJ0 SX POL0T0INSPIJ0 L_T_INS PIJ0 X POL0NWE L_NWE PIJ0 WRX POL0NOEPIJ0 L_NOE PIJ0 RX POL0TE L_TE PIJ0 TE POL0LE0 L_LE_ PIJ0 LE_ POL0LE0K L_LE_K PIJ0 LE_K POL0LE0K L_LE_K PIJ0 LE_K POL0LE0KPIJ0 L_LE_K PIJ0 LE_K POL0LE0K L_LE_K PIJ0 LE_K PIJ00 0 PIJ00 0 OJ L_NW0 0 PIJ0 POL00 L_0 PIJ0 POL0 L_ PIJ00POL0POL0 L_ PIJ0 POL0 L_ PIJ0POL0 POL0 L_ PIJ0 POL0 L_ PIJ0POL0POL0 L_ PIJ0 POL0 L_ PIJ0POL0POL0 L_ PIJ0 POL0 L_ 0 PIJ0 POL00 L_0 PIJ0 POL0 L_ PIJ00POL0POL0 L_ PIJ0 POL0 L_ PIJ0POL0POL0 L_ PIJ0 POL0 L_ POK0ROW0G K_ROW_G PISW0G00 PISW0G0 PISW0G00 PISW0G0 PISW0G00 PISW0G0 PISW0G00 PISW0G0 PISW0G00 PISW0G0 OSW0H SW_H OSW0H SW_H OSW0H SW_H OSW0H SW_H OSW0H SW_H POK0ROW0H K_ROW_H PISW0H00 PISW0H0 PISW0H00 PISW0H0 PISW0H00 PISW0H0 PISW0H00 PISW0H0 PISW0H00 PISW0H0 OSW0I SW_I OSW0I SW_I OSW0I SW_I OSW0I SW_I OSW0I SW_I POK0ROW0I K_ROW_I PISW0I00 PISW0I0 PISW0I00 PISW0I0 PISW0I00 PISW0I0 PISW0I00 PISW0I0 PISW0I00 PISW0I0 UI Size: Number: Revision: * ate: //0 Time: 0:: M Sheet of

3 RG LE POLE0RE LE_RE POLE0GREEN LE_GREEN POLE0LUE LE_LUE PIR0 PIR0 PIR0 PIR0 PIR00 PIR00 OR MΩ OR MΩ OR0 MΩ PIQ0 PIQ0 PIQ0 PIQ0 PIQ0 PIQ0 PIQ0 PIQ0 PIQ0 OQ SOT- O OQ SOT- O OQ SOT- O OR 00 Ω PIR0 PIR0 OR PIR0 PIR0 Ω OR PIR0 Ω OU R PIU0 PIU0 G PIR0PIU0PIU0 LTST-S0FKT VT PIU0 t 0m, the forward voltage for the lue and Green LE is.v, and for the Red LE it is.v. Since VT will be at most.v, that means that at 0 m the ballast resistor should drop.v for Green and lue and.v for Red. That equates to values of ohms and 0 ohms respectively. In the worst case when VT is very low abelow.v), those values let m for Green and lue, and 0 m for Red. Rr=00 ohms, Rg = Rb = ohms. POPOW0EN POW_EN Reset button VT PIR0 PIR0 PISW0RESET0 PISW0RESET0 OR 0 kω SW_RESET OSW0RESET UTTON US port ortex debug port POUS00 US_- VUS POUS00 US_+ OU PIU0 PIU0 PIU0 PIU0 PIU0 USL-S PIU0 VUS OJ PIJ0 VUS PIJ0 - PIJ0 + PIJ0 I PIJ0 US OJ.V POSW0SWLK SW_SWLK PIJ0 SWLK/TK V PIJ0 POSW0SWIOPIJ0 SW_SWIO PIJ0 SWIO/TMS NRST PIJ00PONRSTPONRST POSW0SWO SW_SWO PIJ0 SWO/TO ETET PIJ0 PIJ0 N/TI PIJ0 ORTEX_EUG PIJ0 We are a US device, therefore we leave the I pin floating. Peripherals Size: Number: Revision: * ate: //0 Time: 0:: M Sheet of

4 attery attery voltage measurement LiPo US charger VT PIJ0 PIJ0 OJ T_LIPO VT PIR0 OR MΩ PIR0 POVT0SNS VT_SNS PIR0 OR MΩ PIR0 PI0 PI0 O 00 nf VUS PI0 PI0 O μf PI0 PI0 O 0 μf PIR0 OR kω PIR0 OU PIU0 VIN TT PIU0 ISET HG_S PIU0 IMIN PIR0 OR RTGE 0 kω PIR0 PIU0 PIU0 POT0HRG T_HRG PIU0 VT O PI0 μf PI0 VT being around.v, the divider will waste u. Which would take years to deplete a 00 mh battery. Riset sets the charge current. Iam) = 0/Riset. Rimin sets the end-of-charge current. Iam) = 0/Rimin. Riset =. kohms, Iset = 00 m Rimin = kohms, Imin = m. L backlight power supply Logic power supply VT PI00 PI00 O0 0. μf POL0LE0 L_LE_ POL0LIGHT L_LIGHT PI0 PI0 O μf PIU0 PIU0 PIU0 PIU0 VIN EN VOUT VNG O μf P N P P O μf PIU0 PIU0 PIU0 PIU0 PI0PI0 PI0 PI0PI0 PI0 PIU0 PIU0 PIU0 N OU RTGQW LE PIU0 POL0LE0K L_LE_K LE PIU0 POL0LE0K L_LE_K LE PIU0POL0LE0KPOL0LE0K L_LE_K 0 LE PIU00 POL0LE0K L_LE_K LE PIU0POL0LE0 L_LE_ VT OU PIU0 VIN VOUT POPOW0EN POW_EN PIU0 EN SNS PIU0 RT0.V PIU0 PIU0 Power Size: Number: Revision: * ate: //0 Time: 0:: M Sheet of

5 * * Extras * * //0 0:: M Size: Number: ate: Revision: Sheet of Time: SPI USRT SX IO IO IO0 SK IO V U TSF.V QUSPI_IO0 QUSPI_IO QUSPI_IO QUSPI_IO QUSPI_NS QUSPI_LK T T M V LK T0 T U MIRO_S SIO_ SIO_ SIO_M SIO_0 SIO_ SIO_LK.V SOT- O0 Q S_POW_EN S 0 kω R SLK MOSI MISO J SPI_ONNETOR SPI_LK SPI_MOSI SPI_MISO TX RX J URT_ONNETOR USRT_RX USRT_TX PIJ0 PIJ0 PIJ0 PIJ0 OJ PIJ0 PIJ0 PIJ0 OJ PIQ0 PIQ0 PIQ0 OQ PIR0 PIR0 OR PIS0 PIS0 OS PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 OU PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 OU PIQ0 PIR0 PIS0 PIU0 PIJ0 PIJ0 PIU0 PIU00 PIU0 PIQ0 PIS0 PIU0 POQUSPI0LK PIU0 PIU0 POQUSPI0IO0 POQUSPI0IOPIU0 PIU0 POQUSPI0IO POQUSPI0IOPIU0 PIU0 POQUSPI0NS PIQ0 PIR0 POS0POW0EN PIU0 POSIO0LK POSIO0MPIU0 PIU0 POSIO00 POSIO0PIU0 PIU0 POSIO0 POSIO0 PIU0 PIJ0 POSPI0LK PIJ0 POSPI0MISO POSPI0MOSIPIJ0 POUSRT0RXPIJ0 PIJ0 POUSRT0TX POQUSPI0LK POQUSPI0IO0 POQUSPI0IO POQUSPI0IO POQUSPI0IO POQUSPI0NS POS0POW0EN POSIO0LK POSIO0M POSIO00 POSIO0 POSIO0 POSIO0 POSPI0LK POSPI0MISO POSPI0MOSI POUSRT0RX POUSRT0TX