EE241 - Spring 2005 Advanced Digital Integrated Circuits. Clock Generation. Lecture 22: Adders. Delay-Locked Loop (Delay Line Based) f REF Phase Det

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1 EE24 - Srng 2005 dvanced Dgtal Integrated Crcuts Lecture 22: dders Clock Generaton Delay-Locked Loo (Delay Lne Based) f REF Phase Det U D Charge Pum Flter DL f O Phase-Locked Loo (VCO-Based) f REF U N PD D CP VCO Flter f O 2

2 Phase-Locked Loo Based Clock Generator U Down Reference clock Phase detector U Charge um Loo flter V contr VCO Local clock Down Clock decode & buffer Dvde by N φ φ 2... cts also as Clock Multler Loo Comonents Phase Comarator Produces UP/DN ulses corresondng to hase dfference Charge Pum Sources/snks current for duraton of UP/DN ulses Loo Flter Integrates current to roduce control voltage Voltage-Controlled Delay Lne Changes delay roortonally to voltage Voltage-Controlled Oscllator Generates frequency roortonal to control voltage 4 2

3 PLL Jtter 5 DLL Lockng Courtesy of IEEE Press, New York

4 Clock Deskewng Two clock snes, two DLLs, and a PD that controls them Geannooulos, ISSCC 98 7 Clock Rng Clocks routed n arallel, ooste drectons LCG algns to the mddle Shbayama, ISSCC

5 Synchronous Dstrbuted Oscllators VCOs # of nearest neghbors Mzuno, ISSCC 98 9 Dstrbuted PLLs Gutnk, ISSCC

6 Intel Itanum TM Rusu, ISSCC 2000 Intel Itanum TM 2 6

7 EE24 - Srng 2005 dvanced Dgtal Integrated Crcuts rthmetc rthmetc Crcuts Chater, Rabaey, 2 nd ed. Selected journal ublcatons Books: K. Hwang, "Comuter rthmetc : Prncles, rchtecture and Desgn", John Wley and Sons, 979. E. E. Swartzlander, Comuter rthmetc Vol. & 2, IEEE Comuter Socety Press, 990. S.Waser, M.Flynn, Introducton to rthmetc for Dgtal Systems Desgners, Holt, Rnehart and Wnston 982. I. Koren, Comuter rthmetc lgorthms, Brooksde 998. B. Parham, Comuter rthmetc, Oxford Hgh-Seed VLSI rthmetc Unts: dders and Multlers, by V. Oklobdzja n Chandrakasan et al. 4 7

8 Full dder B Cn Full adder Sum Cout 5 The Rle-Carry dder 0 B 0 B 2 B 2 B C,0 C o,0 C o, C o,2 F F F F (= C, ) C o, S 0 S S 2 S Worst case delay lnear wth the number of bts t d = O(N) t adder ( N )t carry t sum Goal: Make the fastest ossble carry ath crcut 6 8

9 The Mrror dder V DD V DD V DD "0"-Proagate C B B Kll C o B C B C S ""-Proagate B B Generate B C C B Mnmze nversons 7 Mrror dder Cell V DD B C B C C o C B C o S GND 8 9

10 Szng Mrror dder V DD V DD V DD 6 0-Proagate B B 2 4 Kll C o B C 6 B 6 C C C 4 S Proagate Generate 6 6 B 2 B B C Fanout (effectve) ~2 B 9 Full dder Imlementaton Standard CMOS Multlexer-based Courtesy of IEEE Press, New York

11 TG-Based Full dder V DD P V DD C B P B C P S Sum generaton V DD P P V DD C C P C o Carry generaton C P 2 Full dder n DPL 22

12 Manchester Carry Chan Statc Dynamc V DD P V DD P φ C G C o C C o G K P φ 2 Manchester Carry Chan Imlement P wth ass-transstors Imlement G wth ull-u, kll (delete) wth ull-down Use dynamc logc to reduce the comlexty and seed u φ V DD P 0 P P 2 P C C,0 G 0 G G 2 G φ C 0 C C 2 C Klburn, et al, IEE Proc,

13 Szng Manchester Carry Chan Dscharge Transstor R R 2 R R 4 R R 6 Out M C C M 0 M C M 2 C 2 M C M 4 C 4 5 C 6 Taerng? Seed t = N 0.69 C R j = j = k Seed (normalzed by 0.69RC) rea k rea (n mnmum sze devces) 25 Szng Manchester Carry Chan Delay equaton Delay s quadratc wth N t N N = 0.69 C R j = 0.69 = j= Progressve szng should hel? ( N ) RC 2 26

14 Szng Manchester Carry Chan Stck Dagram Proagate/Generate Row V DD C fx fxed caactance at the node ( ull-down, ull-u dffusons, metal, nverter ~5fF C ~ 2fF/µm R ~ 0kΩ µm When CW > C fx small mrovements wth szng, Loadng of the nut stage P G φ P G φ C C - C GND Inverter/Sum Row N t = 0.69 ( N ) N( N ) R RC = 0.69 ( C C W ) 2 2 W fx 27 Manchester Carry Chan Length of chan s lmted to k = 4-8 Standard soluton add nverters The overall N-bt adder delay s a sum of N/k segments (lnear) 28 4

15 Carry-Sk dder P 0 G P 0 G P 2 G 2 P G C,0 C o,0 C o, C o,2 F F F F C o, P 0 G P 0 G P 2 G 2 P G BP=P o P P 2 P C,0 C o,0 C o, C o,2 F F F F Multlexer C o, Byass (Sk) Idea: If (P0 and P and P2 and P = ) then C o = C 0, else kll or generate. MacSorley, Proc IRE /6 Lehman, Burla, IRE Trans on Com, 2/6 29 Carry-Sk dder Bt 0- Bt 4-7 Bt 8- Bt 2-5 Setu Setu Setu Setu C,0 Carry Proagaton Carry Proagaton Carry Proagaton Carry Proagaton Sum Sum Sum Sum Crtcal Path For N-bt adder wth k-bt grous N t d = k ( k ) t RC 2 t SKIP ( k ) t RC 0 5

16 Carry-Sk dder Courtesy of IEEE Press, New York Carry-Sk dder Crtcal ath delay wth constant grous td N = 2 2 k ( k ) trc tskip t rle adder byass adder 4..8 N 2 6

17 Carry-Sk dder Varable Grou Length t d = c c2n c Oklobdzja, Barnes, rth 85 Carry-Sk dder Courtesy of IEEE Press, New York

18 Carry-Sk dder Varable Block Lengths Oklobdzja, Barnes, rth 85 5 Manchester Chan wth Carry-Sk P 0 C,0 P G 0 G P 2 G 2 P G BP C o, BP Delay model: 6 8

19 Carry-Select dder Setu P,G "0" "0" Carry Proagaton "" "" Carry Proagaton C o,k- Multlexer Co,k Carry Vector Sum Generaton 7 Carry Select dder: Crtcal Path Bt 0- Bt 4-7 Bt 8- Bt 2-5 Setu Setu Setu Setu "0" "0" Carry "0" "0" Carry "0" "0" Carry "0" "0" Carry "" "" Carry "" "" Carry "" "" Carry "" "" Carry Multlexer Multlexer Multlexer Multlexer C,0 C o, C o,7 C o, C o,5 Sum Generaton Sum Generaton Sum Generaton Sum Generaton S 0- S 4-7 S 8- S

20 Lnear Carry Select Bt 0- Bt 4-7 Bt 8- Bt 2-5 Setu Setu Setu Setu () "0" () "0" Carry "0" "0" Carry "0" "0" Carry "0" "0" Carry "" Carry "" (5) (5) Multlexer C,0 "" Carry "" Carry "" Carry "" "" "" (5) (5) (5) (6) (7) (8) Multlexer Multlexer Multlexer (9) Sum Generaton Sum Generaton Sum Generaton Sum Generaton S 0- S 4-7 S 8- S 2-5 (0) 9 Square Root Carry Select Bt 0- Bt 2-4 Bt 5-8 Bt 9- Bt 4-9 Setu Setu Setu Setu () "0" "0" Carry "0" "0" Carry "0" "0" Carry "0" "0" Carry () "" "" Carry "" "" Carry "" "" Carry "" "" Carry () () (4) (5) (6) (4) (5) (6) (7) Multlexer Multlexer Multlexer Multlexer C,0 Sum Generaton Sum Generaton Sum Generaton Sum Generaton S 0- S 2-4 S 5-8 S 9- (7) Mux (8) Sum S 4-9 (9) 40 20

21 4 Condtonal Sum dders 0 s = x y s = x y 0 c = x y c = x y Sklansky, Trans on Com 6/

22 Two Level Carry-Select dder 4 Condtonal Sum dders 44 22

23 TG Condtonal Sum Condtonal Sum dder Condtonal Cell 2-way MUXes Rothermel, JSSC TG Condtonal Sum Seral connecton of transmsson gates Chan length = log 2 n Sgnal roagaton 46 2

24 DPL Condtonal Sum CL Condtonal carry select 47 Carry-Lookahead dders dder trees Radx of a tree Mnmum deth trees Sarse trees Logc manulatons Conventonal vs. Lng Stack heght lmtng 48 24

25 Proagate and Generate Sgnals Defne new varables that ONLY deend on a, b Generate (g ) = a b Proagate ( ) = a b (could be XOR as well) Delete = a b c out ( g, ) s( g, ) = g = g c c n n Can also derve exressons for s and c out based on d and 49 Carry Lookahead dder 0,B 0,B N-,B N-... C,0 P0 C, P C,N- P N-... Wenberger, Smth,

26 Lookahead dder Looakahead Equatons Poston : Poston : c c = g c = g = g = g ( g c ) g c c Carry exsts f: - generated n stage - generated n stage and roagated through - roagated through both and 5 Lookahead dder Unrollng of carry recurrence can be contnued If unrolled to level k, resultng n two-level ND-OR structure ND Fan-In = k, OR Fan-In = k k transstors n the MOS stack Lmts k to 2 4 Later referred to as a radx of an adder 52 26

27 27 5 Lookahead dder VDD P P2 P P0 G G2 G G0 C,0 Co, Mrror Imlementaton 54 Block Lookahead = c g g g g c Fourth bt carry: g g g g G 2 2 2, = P 2, =,, 4 = c P G c Block generate and block roagate:

28 Block Lookahead Can create grous of grous, or suer-grous : * G j : j = G j Pj G j 2 Pj Pj 2G j Pj Pj 2Pj * Pj : j = Pj Pj 2Pj j G j Delay s t d = c log N 55 Block Lookahead From Oklobdzja 56 28

29 Carry Lookahead Trees C o0, = G 0 P 0 C, 0 C o, = G P G 0 P P 0 C, 0 C o2 = G, 2 P 2 G P 2 P G 0 P 2 P P 0 C, 0 = ( G 2 P 2 G ) ( P 2 P )( G 0 P 0 C 0 ) = G 2: P 2: C o0 Can contnue buldng the tree herarchcally.,, 57 Tree dders P G G G = = g m m l m g l m more sgnfcant l less sgnfcant Start from the nut P, G, and contnue u the tree 2-bt grous, then 4-bt grous, ( g, ) ( g, ) = ( g g ) ( g, ) =, m m l l m m l m l Kogge, Stone, Trans on Com, 7 Radx

30 Tree dders: Radx 2 ( 0, B 0 ) (, B ) ( 2, B 2 ) (, B ) ( 4, B 4 ) ( 5, B 5 ) ( 6, B 6 ) ( 7, B 7 ) ( 8, B 8 ) ( 9, B 9 ) ( 0, B 0 ) (, B ) ( 2, B 2 ) (, B ) ( 4, B 4 ) ( 5, B 5 ) S 0 S S 2 S S 4 S 5 S 6 S 7 S 8 S 9 S 0 S S 2 S S 4 S 5 6-bt radx-2 Kogge-Stone Tree 59 Tree dders: Radx 4 (a 0, b 0 ) (a, b ) (a 2, b 2 ) (a, b ) (a 4, b 4 ) (a 5, b 5 ) (a 6, b 6 ) (a 7, b 7 ) (a 8, b 8 ) (a 9, b 9 ) (a 0, b 0 ) (a, b ) (a 2, b 2 ) (a, b ) (a 4, b 4 ) (a 5, b 5 ) S 0 S S 2 S S 4 S 5 S 6 S 7 S 8 S 9 S 0 S S 2 S S 4 S 5 6-bt radx-4 Kogge-Stone Tree 60 0

31 Sarse Trees (a 0, b 0 ) (a, b ) (a 2, b 2 ) (a, b ) (a 4, b 4 ) (a 5, b 5 ) (a 6, b 6 ) (a 7, b 7 ) (a 8, b 8 ) (a 9, b 9 ) (a 0, b 0 ) (a, b ) (a 2, b 2 ) (a, b ) (a 4, b 4 ) (a 5, b 5 ) S 0 S S 2 S S 4 S 5 S 6 S 7 S 8 S 9 S 0 S S 2 S S 4 S 5 6-bt radx-2 sarse tree wth sarseness of 2 (Han-Carlson) 6 Full vs. Sarse Trees Sarse trees have less transstors, wres Less ower Less nut loadng Recoverng mssng carres Rle (extra gate delay) Precomute (extra fanout) Comlex recomute can get nto the crtcal ath Total Transstor Wdth [unt wdth/bt] Radx-4 Kogge-Stone Radx-4 2-Sarse Radx-4 4-Sarse -2.% dder Delay [FO4] 62

32 Tree dders: Other Trees Ladner-Fscher ( 0, B 0 ) (, B ) ( 2, B 2 ) (, B ) ( 4, B 4 ) ( 5, B 5 ) ( 6, B 6 ) ( 7, B 7 ) ( 8, B 8 ) ( 9, B 9 ) ( 0, B 0 ) (, B ) ( 2, B 2 ) (, B ) ( 4, B 4 ) ( 5, B 5 ) S 0 S S 2 S S 4 S 5 S 6 S 7 S 8 S 9 S 0 S S 2 S S 4 S 5 6 Lng dder Varaton of CL g = a = a b b Lng s equatons t = a b g = a b G S = g G = G H S = g t H = t H gt H Lng, IBM J. Res. Dev, 5/8 64 2

33 Lng dder Conventonal CL: G = g G lso: Lng s equaton shfts the ndex of seudo carry G H = g t G = g t G Proagates nformaton on two bts Doran, Trans on Com 9/88 65 Lng dder Conventonal radx-4 G = g tg2 tt2g tt2tg 0 Lng radx-4 H = g = g g t 2 2 t g 2 2 g t t t 2 t g 2 g t 0 t t 2 0 Reduces the stack heght (or wdth) Reduces nut loadng g 0 66

34 Lng vs. CL Energy [J] R2 Lng R2 CL R4 Lng R4 CL Delay [FO4] R. Zlatanovc, ESSCIRC 0 67 Statc vs. Dynamc 8 Comound Domno R2 Domno R2 Domno R4 Statc R2 Energy [J] Delay [FO4] 68 4

35 Stack Heght Lmtng Transform conventonal G, P Park, VLSI Crc HP dder 4 = 2 0 Naffzger, ISSCC

36 HP dder Dfferental Domno Carry rle Sum select 7 Hybrd dders Dobberuhl, JSSC /92 DEC lha

37 DEC dder Combnaton: 8-bt taered re-dscharged Manchester carry chans, wth C n = 0 and C n = 2-bt LSB carry-lookahead 2-bt MSB condtonal sum adder Carry-select on most sgnfcant bts Latch-based tmng 7 7