Department of Electrical & Electronic Engineeing Imperial College London. E4.20 Digital IC Design. Median Filter Project Specification

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1 Desgn Project Specfcaton Medan Flter Department of Electrcal & Electronc Engneeng Imperal College London E4.20 Dgtal IC Desgn Medan Flter Project Specfcaton A medan flter s used to remove nose from a sampled sgnal. It behaves n a smlar way to a low-pass flter but s more effectve at removng nose that s mpulsve n nature. An example of mpulsve nose s that generated from a car gnton system: each spark radates a bref pulse of hgh energy that wll only affect one or two sgnal samples leavng the remander unchanged. A low-pass flter would smear out the nose pulse but a medan flter wll excse t almost perfectly. In ths project, you wll desgn a medan flter of order fve. In the flter, each output sample s the thrd hghest (= medan) of fve consecutve nput samples. The flter ntroduces a delay and so the medan of samples 1 to 5 s not n fact output untl sample tme 8.5. The nput and output of the flter wll be 4-bt sgned numbers n the range -8 to +7. The flter s mplemented as a systolc array,.e. a regular grd of smple processng elements (or cells) havng only local nterconnectons. The array contans four dfferent types of cell: these are labelled D, P, Q and R; ther functons are defned below. Each cell ntroduces a half-clock delay: that s the cell s outputs change half a clock cycle later than ts nputs. If you magne the cells coloured lke a chessboard, the outputs from all the whte cells wll change state together, whle the outputs from all the black cells wll change state half a clock cycle later. The cells marked D are merely half cycle delays. The names of the nputs and outputs of the other cell types are ndcated above; the outputs are defned as follows: Input samples are appled to the X n nput of cell P1; n the descrpton below, the th nput sample s denoted u. To understand how the crcut works, you need to follow the path between the nput sgnal and the output. Input samples frst travel from left to rght along the top row (P cells: Xn/Xout) and then turn around and travel rght to left along the mddle row (Q cells: Xn/Xout). Fnally they reverse drecton agan and travel left to rght along the bottom PYKC verson 1.1 Jan

2 Desgn Project Specfcaton Medan Flter row (R cells Qn/Qout). Snce each cell adds a half-sample delay, ths whole procedure takes 7.5 sample. The only varaton arses because the R cells act as swtches and can f they wsh connect Qout to Xn nstead of to Qn. If R3 does ths, for example, the sgnal can jump from the output of Q3 to the nput of R3 thus elmnatng four half-sample delays: Q2, Q1, R1 and R2. Thus f R1, R2, R3, R4 or R5 choose to swtch, the nput-to-output delay wll be 7.5, 6.5, 5.5, 4.3, or 3.5 samples respectvely. The output can therefore be any one of fve consecutve samples as would be expected for a medan flter. In addton to formng the nput of Q4, the Xout sgnal from P4 s delayed and then sent back along the top row as Yn/Yout. By countng half-sample delays, t s easy to see that u wll meet samples u -4, u -3, u -2, u -1 n cells Pl, P2, P3 and P4 respectvely. In each case, f u s lower n value, Nout wll be set to Nn+l. Thus as the sgnal N travels from left to rght, t s ncremented by one each tme u s less than one of the four prevous samples. When u emerges from P4:Xout, the number at P4:Nout has counted how many of the prevous four samples are greater than or equal to u. Snce P1:Nn s ntalsed to -2, t wll have been ncremented up to 0 f and only f u s less than two of the prevous four samples and greater than or equal to the other two. If ths s the case, u must be the medan; cell R5 wll swtch and cause u to be emtted after a further 1.5 samples. The outputs from P4 are delayed by one sample and then sent back nto Q4 as Xn and Nn. Here u s agan compared wth sample u -4 and the comparson wll yeld the same result as t dd n cell P1. Snce Nn wll be decremented n Q4 f and only f t was ncremented n P1, Q4 exactly undoes the effect of P1. Half a sample earler however, u was also beng compared to sample u +1 n cell P4 and the result of ths comparson s sent to Q4 as the An nput. Ths causes Nn to be ncremented f u s less than or equal to u +1.Thus Nout from Q4 s the result of comparng u wth u -3, u -2, u -1 and u +1. As before, the result wll be 0 f u s the medan and f ths s the case, R4 wll swtch and u wll be output at the approprate tme. In a smlar way Q3, Q2 and Q1 respectvely detect when the medan s the thrd, second or frst of a group of fve and cause the correspondng R cell to swtch. Implementaton Consderatons You need to decde on the wdths of the varous sgnal paths. All the X, Y and Q sgnal must be 4 bts wde so that they can cope wth nput sgnals n the range -8 to +7. You wll need to work out the requred wdth for the N sgnals by workng out the range of possble values that t can take at each pont n the crcut; note that ths range vares from place to place n the crcut. Although the dagram on the prevous page has an elegant symmetry, there are several economes that can be made: 1) The sgnals Yout from P3 and Xout from 44 are dentcal and need only be generated once. Note that whle ths saves you four latches, t wll complcate the wrng requred. Smlar economes can be made for the other P and Q cells. 2) Snce one of the R1 nputs s Don t Care, the entre cell can be replaced by a delay. Ths can n turn be merged wth the D cell above whch acts on the same sgnal. The Nout output from Q1 s now redundant as s the Yout output from Q4. Admnstratve Matters Deadlne for completon: Frst day of Sprng term (3 Jan 08) Deadlne for report: Second Monday of Sprng term (7 Jan 08) Report (one per group) should both be n both paper and electronc forms, and nclude: descrpton of crcut desgned (full schematc and layout) block dagram showng dfferent modules n the chp plot of the entre chp evdence that t works (from smulaton plots) test strategy and testbench a descrpton of contrbuton from each member, sgned by all! PYKC verson 1.1 Jan

3 E4.20 Dgtal IC Desgn Course Work To desgn a Bquadratc Dgtal Flter based on dstrbuted arthmetcs as a full custom chp To test the desgn usng Electrc You wll fnd the followng references useful: Peled and B. Lu, A New Hardware Realzaton of Dgtal Flters, IEEE Trans. on Acoust., Speech, Sgnal Processng, vol. ASSP-22, pp , Dec S. A. Whte, ``Applcatons of Dstrbuted Arthmetc to Dgtal Sgnal Processng'', IEEE ASSP Magazne, Vol. 6(3), pp. 4-19, July The Role of Dstrbuted Arthmetc n FPGA-based Sgnal Processng, Imperal College Dgtal IC Desgn 1 What s a Dgtal Bquad Flter? Transfer functon: Ths can be rearranged as a dfference equaton:- Ths can be generalsed to an nner-product calculaton: Imperal College Dgtal IC Desgn 2

4 Dstrbuted Arthmetc (1) Let us express x k n ts 2 s complement bnary form: Then: Imperal College Dgtal IC Desgn 3 Dstrbuted Arthmetc (2) Let us expand ths to: MSB of x N LSB of x1 LSB of xn Imperal College Dgtal IC Desgn 4

5 Use ROM as table lookup We can avod any multplcaton by table lookup: Use (x 1, x 2, x 3,... x N ) as address to a ROM Store pre-calculated partal product for each lne n ROM: We can calculate y three operatons: ROM lookup, shft, add/subtract: ROM lookup Add/Sub Shftng Imperal College Dgtal IC Desgn 5 Implementaton of Bquad x n PISO SR1 x n R E G y n SR2 x n-1 x n-2 y n-1 y n-2 A 0 A 1 A 2 A 3 32 x M ROM +/- R E G SR1 y n-1 A 4 shfter SR1 SR3 y n-2 Imperal College Dgtal IC Desgn 6

6 Testng your desgn You should desgn a notch flter wth the followng polezero locatons n the z-plan: Imperal College Dgtal IC Desgn 7