PLL Arrays First Slides

Transcription

1 Space ad Naval Warfare Systems Commad PLL Arrays First Slides Prof. obert A. YOK James D. BUCKWALTE Paolo F. MACCAINI Uiversity of Califoria, Sata Barbara

2 Outlie Dave, here you will fid: he Theoretical Calculatio for the Phase elatioship we are Lockig For The Desig ad Simulatio esults for the L Array (.6 GHz) The Picture of the 2.45 GHz Uit PLL Cell for the Array (Some meas. Still eed to be performed) The Picture ad Meas. of the 75 MHz PLL

3 Coupled Oscillator Arrays Ijectio Lockig Model Ijectio-Locked Oscillator: Ijectio port Aij cos( ω ijt +ψ ) Tuig port (adjust ω ) VCO Adler s equatio: dφ dt = m Output port Acos t ( ω +φ ) ω ω ij + ω si( ψ φ ) Lockig rage ω ω m = 2Q A ij A g rees e,d φ) φ) (ψ ce re D ife e P has elative Ijected Frequecy, (ω -ω)/ ω ij m ψ φ = si ω ij ω ωm

4 Phase-Locked Loop Arrays Sigle Elemet Desig Voltage Cotrolled Oscillator ~ VCos V C DC Offset Tuig ( ω t θ ) O O O B Output Sigal I-Phase Power Divider A Double Balaced Mixer Variable Gai Amplifier Loop Equatios: VC = VOCos( ωot + θo) VIjCos( ωijt + θij ) A+ B 4 ω = ω + K V O O C Ijectio Sigal AβV V Cos ω ω + θ θ 2 2 V Cos ( ) t ( ) O Ij O Ij O Ij Phase Differece i adias.8.6 ( ω t θ ) Ij Ij Ij Steady State Equatios: Lockig age SS Frequecy VV O Ij ωo = ωij = ωo + K VC = ( ω ) ( ) SS O + K B + K A Cos θo θij ωij ωo VC = AV ( ) SS OVIjCos θo θij + B θo θij = ArcCos B 2 A VV O Ij K For Ijectio at the tuig ceter ωij = ωo : π AVOVIj θo θij = ± B = ad θo θij = B = Same phase dyamics as Coupled-Oscillator System B

5 PLL System Modelig: d φ = β dt dy = ωfy dt + C [ y 2y y ] + ω f C + 2 Phase-Locked Loop Arrays Theoretical esults for the Array Implemetatio si ( φ ), where φ = φ C = VCO tuig sesitivity C 2 = Coversio loss φ = Phase gradiet β = Frequecy gradiet φ atea i = N The free ruig frequecies satisfy > β = C ω [ si( φ ) si( φ ) + si( )] C φ+ Thus: φ mixer φ φ 2 φ N- φ N Couplig stregth > C C 2 (loop gai) > ehaced lockig rage Also with ijectio > ω lock > ω Thus -> ω lock Σ + - sca cotrol x LPF y Σ two-way combier x 2 LPF VCO y Σ Σ x N LPF y N Same phase dyamics as Coupled-Oscillator System Less amplitude fluctuatio Larger Lockig rage Σ + sca cotrol

6 .6 GHz PLL Schematics Bias = TOhm VtStep BiasPos Vlow= V Vhigh=5 V Delay=. sec ise=. sec VtStep GaiCtrl Vlow= V Vhigh=. V Delay=.4 sec ise=. sec VGai <.5 Tra StartupToLock StopTime=2 sec MaxTimeStep=. sec VtSie FSource Amplitude=.22 V Freq=575 MHz Delay=.5 sec Phase= VtS tep FreqCtrl Vlow= V Vhigh= V Delay=.9 sec ise=. sec PwrSplit2 P owerdivider VMult Mixer AmplifierVC VariableG aiamplifier Gai=(+4*_v3) out=5 Ohm TrasitioAalyzer =5 Ohm I2 =5 kohm I = kohm Fb =5 kohm OpAmpIdeal GaiOffsetSummer Gai= Freq3db=5 MHz TrasitioAalyzer2 =5 Ohm VCO VoltageCotrolledOs cilla tor Kv=7 MHz Freq=575 MHz P=-j*dbmtow() Delay= times tep P wrs plit2 PowerDivider3 P wrs plit2 PowerDivider2 SpectrumAalyzer =5 Ohm Output Sigal Voltage Cotrolled Oscillator Double Balaced Mixer ~ V C DC Offset Tuig B I-Phase Power Divider A Variable Gai Amplifier Ijectio F Sigal

7 .6 GHz PLL Simulatio ( ) 2 Lock Aalysis (FLo=475Mhz, Phase Diff. = ) Lockig f & Lo [m V] Frequecy & Feedback [V] Locked f & Lo [mv]

8 .6 GHz PLL Simulatio (9 ) 2 Lock Aalysis (FLo=Ff=575Mhz, Phase Diff. = 9 ) Lockig f & Lo [m V] Frequecy & Feedback [V] Locked f & Lo [mv]

9 .6 GHz PLL Simulatio (8 ) 2 Lock Aalysis (FLo=675Mhz, Phase Diff. = 8 ) Lockig f & Lo [m V] Frequecy & Feedback [V] Locked f & Lo [mv]

10 2.45 GHz PLL Uit Cell Goal: PLL Array Large Lockig/capture age Adjustable Ceter Frequecy Multiple F Iputs F F IF Summig Juctio i Feedback for Mutual Couplig PLL LF PLL LF PLL F Out (to ext PLL) To Calibratio To Atea X F i (from eighborig)pll F F2 Tuig Ports FN 4-way Splitter VCA Gai Adjust VCO ~ Σ LF Out LF I LF I Top View DC Voff (frequecy tuig)

11 2.45 GHz PLL Uit Cell Ijectio OUT Power Dividers Mixer Ijectio IN F2 Out VCO F Out Low Frequecy Feedback Bias Module 2 MHz Lockig age i Closed Loop versus Few KHz i Ope Phase varies from to 8 Degrees (Capture age to be Measured)

12 75 MHz PLL Mixer Out Low Frequecy Feedback Mixer VCO Ijectio IN F Out

13 75 MHz PLL 78 Measured Lockig ad Capture age MHz] 77 F OUT [MHz] Ope Loop Close Loop F Ijectio [MHz] 25 MHz Lockig age i Closed Loop versus Few KHz i Ope 5. MHz Capture age