1. pn junction under bias 2. I-Vcharacteristics

Transcription

1 Lecture 10 The p Juctio (II) 1

2 Cotets 1. p juctio uder bias 2. I-Vcharacteristics 2

3 Key questios Why does the p juctio diode exhibit curret rectificatio? Why does the juctio curret i forward bias icrease ~ exp qv kt What are the leadig depedeces of the saturatio curret (the factor i frot of the expoetial)? 3

4 1. PN juctio uder bias Upo applicatio of voltage: Electrostatics upset: depletio regio wides or shriks Curret flows (with rectifyig behavior) Carrier charge storage 4

5 Fig PN juctio ad its associated eergy bad diagram for (a) zero bias, (b) reverse bias, ad (c) forward bias 5 If we apply a potetial betwee the p ad regios, we will o loger be i a equilibrium coditio-the Fermi eergy level will o loger he costat through the system.

6 6 Fig. Eergy-bad diagram of a p juctio uder reverse bias The differece betwee the two is equal to the applied voltage i uits of eergy EFp EF = evr = qvd Uder reverse bias of applied voltage V R, the p juctio is ot i thermal equilibrium. The quasi-fermi eergy levels for electros ad holes are E E kt + δ 0 F Fi = l i E E kt 0 p Fp Fi = l i p + δ The total potetial barrier is V = φ + φ + V total F Fp R Vtotal = Vbi + VR

7 Assume: No Curret Flows - Due to small leakage curret φ = φ V ( V < 0) Substitute j B D x = x + x d0 p0 o D = ( V )( N N ) 2ε s φ B D a + d qn N a d 7

8 Characteristics I D =0 Reverse Bias Forward Bias I D >0 V D >0.7 V Breakdow I D <0 V D <V BD 8

9 ID = I e ( VD/ VT 1) 0 To model IV characteristics we eed 2 cocepts The Law of the Juctio Steady State Diffusio 9

10 Carrier profiles i thermal equilibrium: Iside SCR i thermal equilibrium: dyamic balace betwee drift ad diffusio for electros ad holes. J drift = J diff 10

11 Carrier cocetratios i p juctio uder bias: Forward bias for V > φ V E J 0, B SCR drift E 0 = 2qφ N N B a d ε ( N + N ) s a d J p drift = qpµ pe J drift = qµ E 11

12 Curret balace i SCR broke: J drift < J diff Net diffusio curret i SCR miority carrier ijectio ito QNR S excess miority carrier cocetratios i QNR S Lots of majority carriers i QNR s curret ca be high 12

13 Reverse bias for V < φ V E J 0, B SCR drift Curret balace i SCR broke: J drift > J diff Net drift curret i SCR => miority carrier extractio from QNR s deficit of miority carrier cocetratios i QNR s 13 Few miority carriers i QNR s =>curret small.

14 What happes if miority carrier cocetratios i QNR chage from equilibrium? =>Balace betwee geeratio ad recombiatio broke I thermal equilibrium: rate of break up of Si-Si bods balaced by rate of formatio of bods If miority carrier ijectio: => carrier cocetratio above equilibrium => recombiatio prevails If miority carrier extractio: => carrier cocetratios below equilibrium => geeratio prevails 14

15 Where does geeratio ad recombiatio take place? 1. Semicoductor bulk 2. Semicoductor surfaces & cotacts I moder devices, recombiatio ad geeratio maily takes place at surfaces: perfect crystallie periodicity broke at a surface =>lots of broke bods: geeratio ad recombiatio ceters moder devices are very small high area to volume ratio. 15 High geeratio ad recombiatio activity at surfaces => carrier cocetratios caot deviate much from equilibrium values: ( s), p( s) p 0 0

16 Complete physical picture for p diode uder bias: Forward bias: ijected miority carriers diffuse through QNR => recombie at semicoductor surface At semicoductor surface: carrier cocetratio uchaged from equilibrium. 16

17 Reverse bias: miority carriers extracted by SCR => geerated at surface ad diffuse through QNR At semicoductor surface: carrier cocetratio uchaged from equilibrium. 17

18 18 The curret view: Forward bias:

19 19 Reverse bias:

20 20 What limits the magitude of the diode curret? ot geeratio or recombiatio rate at surfaces ot ijectio or extractio rates through SCR diffusio rate through QNR s

21 The "Short" Diode 2. I-V characteristics --the width of P ad N regios W ad W p are smaller tha the miority carrier diffusio legth L ad L p. --the miority carrier cocetratio becomes a liear fuctio of distace The log" Diode --the width of P ad N regios W ad W p are loger tha the miority carrier diffusio legth L ad L p. --the miority carrier cocetratio is a expoetial fuctio of distace 21

22 "Short" Diode Developmet of aalytical curret model: 1. Calculate cocetratio of miority carriers at edges of SCR, p(x ) ad ( x p ) 2. Calculate miority carrier diffusio curret i each QNR, I ad I p 3. Sum electro ad hole diffusio currets, I = I + I p 22

23 Step 1: computatio of miority carrier boudary coditios at edges of SCR I thermal equilibrium i SCR, Jdrift = Jdiff Defie Recall Rewrite p = / N ad = / N i d p0 i a kt NaN d φ B = l 2 q i φ N d N a = V l ad φ = V l po o B th B th V th = kt q 23

24 Solvig for the equilibrium miority carrier cocetratios i terms of the built i potetial, φ B Vth p = N e ad = N e o a po d φb V This result relates the miority carrier cocetratio o oe side of the juctio to the majority carrier cocetratio o the other side of the juctio. th φ B pp p 0 0 = (60 mv)log = (60 mv)log 0 p0 24 Special case of Boltzma statics. φ (60 mv) log o i

25 The ew potetial barrier φ j = (φ B - V D ) is substituted for the thermal equilibrium barrier to fid the ew miority carrier cocetratios at the SCR edges. Uder bias i SCR, J But if differece small with respect to absolute values of curret: This is called quasi-equilibrium. I quasi-equilibrium drift J diff x p x = x p x 2 ( 1) ( 1) ( 2) ( 2) i 25

26 At edges of SCR, the: q[ ( x ) φ ( x )] φ ( x ) p q( B V) exp = exp ( x ) kt kt p p( x ) q[ ( ) ( )] p ( B ) exp φ x φ x q V exp φ = p( x ) kt kt p Charge eutral at each side: p ( x ) ( x ) N = 0 p p p p a Sice p( xp) << pp0 p ( x ) N ad ( x ) N p p a d This is the low-level ijectio approximatio 26

27 ad Law of the Juctio φb VD VD Vth Vth Vth p p d po ( x ) = N e e = e φb VD VD ( ) V th V th th V = a = o p x N e e p e where po = ad = N 2 2 i i po a Nd 27

28 The miority carrier cocetratio at the SCR is a expoetial fuctio of applied bias. It chages oe decade for every 60mV chage i V D. p ( x ) = p e 0 V / V D th ( ) log e VD/ Vth VD/60mv 010 p010 = p = Law of the Juctio is valid if miority carrier cocetratio is less tha equilibrium majority cocetratio. This coditio is called Low Level Ijectio. p < ad < p o p po 28

29 Voltage depedece: Equilibrium (V = 0): ( xp) = ( ) = N Forward (V >0): 2 2 i i p x a Nd VD V V th = p ( x ) = p e th ( x ) e p p po ( xp) >> ( ) >> N 2 2 i i p x a Nd Lots of carriers available for ijectio: => V icreasig, cocetratio of ijected carriers icreases => forward curret ca be high ad icreases with V. o VD 29

30 Reverse (V <0): ( xp) << 0 ( ) 0 N << 2 2 i i p x a Nd Few carriers available for extractio: => reverse curret is small. Miority carrier cocetratio becomes vaishigly small: => reverse curret saturates. Rectificatio property of p diode arises from miority carrier boudary coditios at edges of SCR. 30

31 Step 2: Diffusio curret i QNR: Diffusio equatio (for electros i p-qnr): Iside p-qnr, electros diffuse to reach ad recombie at cotact =>J costat i p-qnr => (x) liear. Forward bias Boudary coditios: i ( x = Wp) = 0 = N 2 i qv ( xp) = exp N kt a 2 a 31 Electro profile: p( xp) p( Wp) p( x) = p( xp) + ( x + xp) x + W p p

32 excess miority carrier cocetratio =excess majority carrier cocetratio Similarly p x p x p ( x ) p x x 0 ( ) = ( ) ( ) W x 32 Sice QNR regio remais charge eutral, p ( x) = N + ( x) p a p ( x) = N + p ( x) d The majority carrier cocetratio must icrease by the same amout as the ijected miority carrier cocetratio

33 Electro curret desity: d p( xp) p( Wp) J = qd = qd dx W x = qd p qv exp Na kt N W x 2 2 i i 2 i D qv J = q exp 1 N W x kt a p p Similarly for hole flow i -QNR: p p p a Sice the curret is cotiuous, the total curret desity J caot vary with positio. I depletio regio, drift curret ad diffusio curret early cacel. => The total curret desity is the sum of the miority carrier diffusio curret desity at the edge of the depletio regio. 2 D i p qv J p = q exp 1 N W x kt d 33

34 Step 3: sum both curret compoets: 2 1 D 1 D p qv J = J + J p = qi + exp 1 Na Wp xp Nd W x kt 2 1 D 1 D p qv I = qai + exp 1 N W x N W x a p p d kt ofte writte as: with qv I = I0 exp 1 kt I0 saturatio curret [ A] 34

35 Reverse bias p ( x ) = p e << p 0 for V < 0.1 V V D/ V th 0 0 D 35 ( x ) = e << 0 for V < 0.1 V V D/ V th p p p0 p0 D

36 The total curret desity: p ( ) 0 0 p( p) W W J = qdp + qd W x Wp x p D p D q + W Wp The total curret p 0 p0 D 2 p I = qai + = I 0 NdW NaW p D Aalyze curret compoets i reverse bias: The miority diffusio currets are extracted ad become the majority carrier curret o the other side of the juctio. 36

37 37 The secod method The ambipolar trasport equatio for excess miority carrier holes i a regio ( ) ( ) ( ) D E g 2 δ p δ p ' δ p δ p p µ 2 p + = x x τ p0 t assume that the electric field is zero i both the quasi-eutral p ad regios ad steady state d 2 ( δ p ) δ p = 0 ( x > x ) 2 2 dx L A ohmic cotact exists at x = (x + W ), implyig a ifiite surface recombiatio velocity. => a excess miority carrier cocetratio is zero p ( x = x + W ) = p 0 Here, W is the width of -QNR p eva p( x) = p0 exp kt

38 The solutio is ev sih ( )/ a x + W x L p δ p( x) = p0 exp 1 kt sih( W / Lp) If W << Lp. we ca approximate the hyperbolic sie terms by ( x + W x) ( x + W x) L p L p sih eva x + W x δ p( x) = p0 exp 1 kt W W W sih L p L p The miority carrier cocetratio becomes a liear fuctio of distace d( δ p( x)) J p = edp dx Compare with the first method 38 J x ed p ev p 0 a p( ) = exp 1 W kt W W x 2 D i p ev J p = q exp 1 N W x kt d

39 Log" Diode Step 1 Miority Carrier Distributio Step 2 Diffusio curret i QNR Step 3 PN juctio curret Log p juctio W >>L p ad W p >>L 39

40 40 Step 1 Miority Carrier Distributio the ambipolar trasport equatio for excess miority carrier holes i a regio ( ) ( ) ( ) D E g p 2 δ p δ p ' δ p δ p µ 2 p + = x x τ p0 t assume that the electric field is zero i both the quasi-eutral p ad regios ad steady state 2 d ( δ p) δ p 2 2 dx Lp where the diffusio legth = 0 ( x > x ) L Similarly, the excess miority carrier electro cocetratio i the p regio is determied from 2 d ( δp) δp 2 2 dx L = D τ 2 p p p0 = 0 ( x < x ) p

41 The geeral solutios are x/ Lp x/ Lp = 0 = + δ p ( x) p ( x) p Ae Be ( x x ) δ x x Ce De x x x/ L x/ L p( ) = p( ) p0 = + ( p) 41 The boudary coditios for the total miority carrier cocetratios are The miority carrier cocetratio eva evbi p( x) = p0exp p0 = 0 exp kt kt eva P( x p) = p 0exp kt p ( x + ) = p N 0 0 d ( x ) = p p0 p0 N eva x + x δ p( x) = p( x) p0 = p0 exp 1 exp kt L p ev x a p + x δp( x) = p( x) p0 = p0 exp 1 exp kt L 2 i d

42 Step 2 Diffusio curret i QNR Electro ad hole curret desities through the space charge regio of a p juctio 42

43 Sice the electro ad hole currets are cotiuous fuctios through the p juctio, the total p juctio curret will be the miority carrier hole diffusio curret at x = x, plus the miority carrier electro diffusio curret at x = -x p. dp( x) J p( x) = edp dx x= x Sice we are assumig uiformly doped regios, the thermalequilibrium carrier cocetratio is a costat J ( x ) = ed p p J x ed p d ( δ p ( x) ) dx ev x= x p 0 a p( ) = exp( ) 1 L p kt 43 Similarly J ed ev p0 a ( xp) = exp( ) 1 L kt

44 Step 3 PN juctio curret The total curret desity i the p juctio is edp p0 ed p0 eva J = J p( x) + J( xp) = + exp( ) 1 Lp L kt J S edp p0 ed p0 eva = + = S exp( ) 1 Lp L kt If V a is more tha a few kt/ev, the forward-bias curret is a expoetial fuctio of the forward-bias voltage. J J 44

45 Ideal electro ad hole curret compoets through a p juctio uder forward bias. 45 The miority carrier diffusio curret desities decay expoetially i each regio. However, the total curret through the p juctio is costat. The differece betwee total curret ad miority carrier diffusio curret is a majority carrier curret.

46 Key coclusios Applicatio of voltage to p juctio results i disruptio of balace betwee drift ad diffusio i SCR: i forward bias, miority carriers are ijected ito quasi-eutral regios i reverse bias, miority carriers are extracted from quasi-eutral regios I forward bias, ijected miority carriers recombie at surface. I reverse bias, extracted miority carriers are geerated at surface. 46

47 Computatio of boudary coditios across SCR exploits quasi-equilibrium: balace betwee diffusio ad drift i SCR disturbed very little. Rate limitig step to curret flow: diffusio through quasi-eutral regios. I-V characteristics of p- diode: I qv = I0 (exp 1) kt 47

48 Example Give a diode with the p-regio doped with N a =10 18 cm -3 ad the -regio doped with N d =10 16 cm -3,calculate the miority carrier cocetratios at the edge of the depletio regio as the fuctio of the applied voltage V D =0.6Vad V D =-0.6V respectively. 48

49 Solutio: we begi by fidig the miority carrier cocetratios i thermal equilibrium: p 10 = = = 10 cm 2 20 i 0 16 Nd Accordig to the law of the juctio 10 = = = 10 cm 2 20 i p0 18 Na 10 V 14 3 D 10 cm for V 0.6V 60mV D ( ) = p010 = 6 3 VD = p x = 10 cm for 0.6V 2 3 V 12 3 D 10 cm for V 0.6V 60mV D p( p) = p010 = 8 3 VD = x = 10 cm for 0.6V 49

50 Homework1 Cosider a p juctio with dopig N a =10 16 cm -3,ad N d =10 18 cm -3. what the applied voltage is required for X d =1.5 um. Note: ε = Fcm 10 3 i = 10 /cm

51 Homework2 A IC diode is desiged to have a room-temperature saturatio. curret of I 0 = Afor a particular applicatio. The fabricatio process results i the device dimesios ad physical parameters are listed below Dimesios Dopig Diffusio coefficiet Wp=0.5 um Na= cm -3 D=14cm 2 s -1 W=1.0um Nd= cm -3 Dp=10cm 2 s -1 a) What diode area A is required for I 0? b) Fid the curret ad miority carrier cocetratios at the edges of the depletio regio for a forward bias V D =720 mv. c) Plot the carrier cocetratio distributio alog the diode. 51