ECE606: Solid State Devices Lecture 19 Bipolar Transistors Design
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1 606: Solid State Devices Lecture 9 ipolar Trasistors Desig Gerhard Klimeck gekco@purdue.edu Outlie ) urret gai i JTs ) osideratios for base dopig 3) osideratios for collector dopig 4) termediate Summary 5) Problems of classical trasistor 6) Poly-Si emitter 7) Short base trasport 8) High frequecy respose 9) oclusios RF: SDF, hapter 0
2 Moder MOSFT - Fudametal Limit looks similar to JT S Metal Oide p Vg D + + log d Threshold Vg S 60 mv/dec 0 V dd V g Moder MOSFT - Fudametal Limit looks similar to JT Vg S D Metal Oide p + + log d Threshold DOS(), log f() f ` Vg 0 S 60 mv/dec V dd V g
3 urret flow with ias put small amout of holes results i large amout of electro output V -F, F p, - V -F, 5 Gummel Plot ad Output haracteristics β D β D ommo emitter urret Gai V D W i, βd W Dp i, 6
4 How to make a Good Silico Trasistor For a give mitter legth β D D W W D i, p i, ~, same material primarily determied by badgap Make-ase short (few mm i 950s, 00 A ow) Wat high gradiet of carrier desity mitter dopig higher tha ase dopig ase dopig hard to cotrol mitter dopig easier 7 lectrostatics i quilibrium p, ε q k s 0 ( + ) V p, k s ε 0 ( + ) q V, k s ε0 ( + ) q V, ε q k s 0 ( + ) V mitter ase ollector Two back to back p- juctio 8
5 lectrostatics i quilibrium ε V V k s 0 p, q ( ) ( ) + k s ε 0 p, q V V ( ) ( ) + ε V V k s 0, q ( ) ( ) + ε V V k s 0, q ( ) ( ) + mitter ase ollector V Assume curret flow is small fermi level is flat V 9 Problem of Low ase Dopig: Puch-through + k s ε0 p, q V V ( ) ( ) + V is positive (forward as) k s ε0 p, q V V Low base dopig is ot a good idea! ( ) ( ) + V is egative (reverse as) > p, grows 0
6 β D Problem of low ase-dopig: ase Width Modulatio lectrical base regio is smaller tha the metallurgical regio! D W i, p, p, c p i, W D ε V V k s 0 p, q ( ) ( ) + + P ε V V k s 0 p, q ( ) ( ) + Gai depeds o collector voltage (bad) Depletio regio width modulatio The arly Voltage Device Pioeer Jim arly practice deally V A The collector curret depeds o V : For a fied value of V, as V icreases, the reverse as o the collector-base juctio icreases, hece the width of the depletio regio icreases. The quasi-eutral base width decreases collector curret icreases. collector curret icreases with icreasig V, for a fied value of V. V Gai depeds o collector voltage (bad) Depletio regio width modulatio V about V V A ideally ifiity
7 The arly Voltage Device Pioeer Jim arly practice deally V A V V about V V A ideally ifiity The arly voltage is obtaied by drawig a lie tagetial to the trasistor -V characteristic at the poit of iterest. The arly voltage equals the horizotal distace betwee the poit chose o the -V characteristics ad the itersectio betwee the tagetial lie ad the horizotal ais. arly voltage is idicated o the figure by the horizotal dotted lie 3 Problem of Low ase-dopig: arly Voltage Device Pioeer Jim arly practice deally V A d dv V + V V β A A D D W W D i, p. p. p i, V V about V V A ideally ifiity qd i, ( qv / kt ) qd i, ( qv / kt ), ( e ) ( e ) W ' + W '
8 Puch-through ad arly Voltage d dv V + V V A A d d d dv d q W dv ( ) ( q W ) d dq q dw dv q W q W V A qw VA eed higher ad W or + qd i, qd i, qv e e W W ξ qv β β ( ) ( ) W d d ξ ζ dw dw W W W 5 Outlie ) urret gai i JTs ) osideratios for base dopig 3) osideratios for collector dopig 4) termediate Summary 5) Problems of classical trasistor 6) Poly-Si emitter 7) Short base trasport 8) High frequecy respose 9) oclusios RF: SDF, hapter 0 6
9 ollector Dopig β W D D W i, p, p, p i, + P V A qw ase-ollector i reverse as Majority carriers oly o diffusio capacitace Reduce capacitace crease κ sε 0 +, p, f you wat low base dopig the reduce collector dopig eve more to icrease ollector depletio.. 7 but (!) Kirk ffect ad ase Pushout Space-harge Desity p-ase -ollector + W - c + W q V V + κ sε 0 Space-harge Desity p-ase -ollector + W c W ( + ) ' ( ) ' q ( + ) ' + ( ) V V ' κ sε0 J + + ' qυ sat J qυ J sat qυ sat Additioal charge! a be large compared to low dopig 8
10 Kirk ffect ad ase Pushout + emitter p base collector + Space-harge Desity p-ase -ollector + c W W Space-harge p-ase -ollector c W W + Space-harge p-ase -ollector + W W W c-c WS crease as & curret Juctio lost High curret domiates collector dopig 9 Kirk ffect ad ase Pushout ' J + qυ sat J qυ sat J qυ J, crit sat K a ot reduce collector dopig artrarily without causig base pushout 0
11 Kirk ffect The Kirk effect occurs at high curret desities i a polar trasistor. The effect is due to the charge desity associated with the curret passig through the base-collector regio. As this charge desity eceeds the charge desity i the depletio regio the depletio regio ceases to eist. stead, there will be a build-up of majority carriers from the base i the base-collector depletio regio. The dipole formed by the positively ad egatively charged ioized doors ad acceptors is pushed ito the collector ad replaced by positively charged ioized doors ad a egatively charged electro accumulatio layer, which is referred to as base push out. This effect occurs if the charge desity associated with the curret is larger tha the ioized impurity desity i the base-collector depletio regio. Assumig full ioizatio, this traslates ito the followig coditio o the collector curret desity. Key poit : Uder high curret ad low collector dopig the depletio approimatio is ivalid i the - juctio! Perhaps High Dopig i mitter? D W β W D i, p i, g, / kt W V e g, / kt p V D W D e e g / kt Very high dopig ca arrow the badgap of a semicoductor! f the emitter is etremely highly doped, the the badgap i the emitter may be smaller tha the base > Reductio i gai ad-gap arrowig reduces gai sigificatly
12 Perhaps High Dopig i mitter? (aski-like) Tuelig cause loss of base cotrol 3 While basic trasistor operatio is simple, its optimum desig is ot. termediate Summary geeral, good trasistor gai requires that the emitter dopig be larger tha base dopig, which i tur should be larger tha collector dopig. f the base dopig is too low, however, the trasistor suffers from curret crowdig, arly effects. f the collector dopig is too low, the we have Kirk effect (base push out) with reduced high-frequecy operatio ad if the emitter dopig is too high the the gai is reduced. 4
13 Outlie ) urret gai i JTs ) osideratios for base dopig 3) osideratios for collector dopig 4) termediate Summary 5) Problems of classical trasistor 6) Poly-Si emitter 7) Short base trasport 8) High frequecy respose 9) oclusios RF: SDF, hapter 0 5 Dopig for Gai β dc D W W D i, p i, mitter dopig: As high as possible without bad gap arrowig ase dopig: As low as possible, without curret crowdig, arly effect ollector dopig: Lower tha base dopig without Kirk ffect ase Width: As thi as possible without puch through 6
14 How to make better Trasistor D W β W D i, p i, Graded ase trasport Polysilico mitter lassical Shockley Trasistor Hetero-juctio ipolar Trasistor 7 Poly-silico mitter P- ase mitter SiGe itrisic base ollector P+ + Dielectric trech emitter + P Poly-silico 8
15 Poly-silico mitter poly e qd i, qv, W β ( ) + P v s fiite at metal Fiite at poly p p D υ p W p,, poly q p q s p p p D W D W + υ p s v s p p W 9 cotact. t blocks the easy passage of holes but lets electros υs D qυ p qp D W p,, poly s ( Dp ) q W p p,, si p,, poly p,, si D p υs W + υ s p p W + υ Questio: Why does poly oly suppress the hole curret, ot electro curret? As. Polysilico is ot a ohmic cotact ad acts as rectifyig pass through s Gai i Poly-silico Trasistor υ D W qp s p p,, poly p,, poly Dp W + υs ( Dp ) q W p p,, si D υ W + υ p,, poly s, poly p,, si p s, si β poly, si D W i, D p W + υs W Dp i, υs, poly, si, poly D ( υs << Dp W ) W υ i, i, s Poly suppresses base curret, icreases gai 30
16 Outlie ) urret gai i JTs ) osideratios for base dopig 3) osideratios for collector dopig 4) termediate Summary 5) Problems of classical trasistor 6) Poly-Si emitter 7) Short base trasport 8) High frequecy respose 9) oclusios RF: SDF, hapter 0 3 How to make better Trasistor D W D β W D W i, i, p i, i, υs Polysilico mitter Graded ase trasport lassical Shockley trasistor Heterojuctio polar trasistor 3
17 Short-base Quasi-ballistic Trasistor qd qυ W, th D W D W + υ th,, ballistic D υth W + υ,, si th υ th + P 33 Gai i short-base Poly-silico Trasistor D υ W + υ p,, poly s, poly p,, si p s, si,, ballistic υth D W + υ,, si th β, ballistic, ballistic, si, si poly, ballistic, poly, si, si, poly v s υ th D W i, D p W + υs D W + υth W Dp i, υs Assume small ompared to i, υth diffusio velocity υ v s Assume small i, s Large devices, diite diffusio legth > small diffusio velocity > thermal velocity is large > eglect diffusio velocity Quasi-allistic trasport i very short base limits the gai 34
18 Outlie ) urret gai i JTs ) osideratios for base dopig 3) osideratios for collector dopig 4) termediate Summary 5) Problems of classical trasistor 6) Poly-Si emitter 7) Short base trasport 8) High frequecy respose 9) oclusios RF: SDF, hapter 0 35 Topic Map Diode quilibrium D Small sigal Large Sigal ircuits Schottky JT/HT MOS 36
19 Small Sigal Respose log 0 β V (i) P+ P V (out) ω β( ω) β β D ω log 0 f f β f T W W kt + + j, + j, π ft D sat q υ Desire high f T High Low capacitaces Low widths 37 Frequecy Respose The gai of a amplifier is affected by the capacitace associated with its circuit. This capacitace reduces the gai i both the low ad high frequecy rages of operatio. The reductio of gai i the low frequecy bad is due to the couplig ad bypass capacitors selected. They are essetially short circuits i the mid ad high bads. The reductio of gai i the high frequecy bad is due to the iteral capacitace of the amplifyig device, e.g., JT, FT, etc. This capacitace is represeted by capacitors i the small sigal equivalet circuit for these devices. They are essetially ope circuits i the low ad mid bads. 38
20 Small Sigal Respose (ommo mitter) From bers Moll Model D ircuit µ > A small sigal ircuit reverse as, R 0 V (i) P+ P V (out) ( α ) F F π R α α F F R R r π π µ g m V F qv / kt ( ) e F 0 ( α ) d d F F q r dv dv k T π g δ m d( α F F ) q dv k T ( α ) F F m m g δv g υ β q D k T 39 Short ircuit urret Gai µ i gmυ + jω µ υ β ( f ) i υ + jωπ υ + jωµ υ rπ r π π gmυ gm jωt µ gm β ( ft ) jωt + + jωt π + jωµ rπ ( π µ ) π + µ kt k T ω π f g q q T T ( j, j, ) ( d, d, ) m k T dq q d dv d d, d, 40
21 ase Trasit Time Ref. harge cotrol model + P dq d Q q W q W W D ase trasit time 43 ollector Trasit Time lectros ijected ito collector depletio regio very high fields more tha diffusio > drift > acceleratio of carriers harge imaged i collector + P τ W υ sat? i τ t τ q τ W eff, i υ sat i τ q 44
22 Puttig the Terms Together ollector trasit time log0 f T Kirk urret ase trasit time W W + + π ft D υ sat K log0 kt j, j, q + Juctio chargig time Do you see the motivatio to reduce W ad W as much as possible? What problem would you face if you push this too far? creasig too high reduces W ad icreases the overall capacitace > frequecy rolls off. 45 High Frequecy Metrics (curret-gai cutoff frequecy, f T ) τ π f D + υ + + W W kt q Re c cb T sat (power-gai cutoff frequecy, f ma ) ( j, + j, ) + ( R ) f ma f T 8π R bb c 46
23 Summary We have discussed various modificatios of the classical JTs ad eplaied why improvemet of performace has become so difficult i recet years. The small sigal aalysis illustrates the importace of reduced juctio capacitace, resistaces, ad trasit times. lassical homojuctios JTs ca oly go so far, further improvemet is possible with heterojuctio polar trasistors. 47
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